公开(公告)号：US09219019B2

公开(公告)日：2015-12-22

申请号：US14215896

申请日：2014-03-17

Applicant: Texas Instruments Incorporated

Inventor： Alok Kumar Lohia ,  Reynaldo Corpuz Javier ,  Andy Quang Tran

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/498 ,  H01L21/56 ,  H01L21/48 ,  H01L21/78

CPC classification number: H01L23/3107 ,  H01L21/4842 ,  H01L21/56 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49565 ,  H01L23/49838 ,  H01L24/97 ,  H01L2224/48247 ,  H01L2224/97 ,  H01L2924/10254 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1815 ,  H01L2224/85

Abstract: A semiconductor device has a leadframe with a pad and a row of elongated leads with a solderable surfaces in a common plane; a package encapsulating the leadframe with an assembled semiconductor device, leaving the common-plane lead surfaces un-encapsulated and coplanar with the package material between adjacent leads, the row of aligned leads positioned along a package edge; and grooves in the package material cut in the common-plane surface, the grooves extend along a portion of each lead length, have a width and a depth about twice the width, and expose solderable lead surfaces.

Abstract translation: 半导体器件具有引线框架，其具有焊盘和一排具有可焊接表面在公共平面中的细长引线; 封装引线框架与组装的半导体器件的封装，使公共平面引线表面与相邻引线之间的封装材料未封装和共面，沿着封装边缘定位一排排列的引线; 并且在共同平面表面中切割的封装材料中的凹槽沿着每个引线长度的一部分延伸，具有宽度和宽度的两倍，并且暴露可焊接的引线表面。

公开(公告)号：US20150262919A1

公开(公告)日：2015-09-17

申请号：US14213224

申请日：2014-03-14

Applicant: Texas Instruments Incorporated

Inventor： Andy Quang Tran ,  Reynaldo Corpuz Javier ,  Alok Kumar Lohia

IPC: H01L23/495 ,  H01L21/78 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L21/78 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49548 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Semiconductor device (100) comprises a metallic Quad Flat No-Lead/Small Outline No-Lead QFN/SON-type leadframe (101) with a pad (102) and a plurality of leads (103) with solderable surfaces (101a, 110a), at least one set of leads aligned in a row while having one surface in a common plane (170), each lead of the set having a protrusion (110) shaped as a reduced-thickness metal sheet. A package (160) encapsulates the assembly and the leadframe, the package material shaped by sidewalls (161) with the row of leads positioned along an edge of a sidewall and the protrusions extending away from the package sidewalls, the common-plane lead surfaces and the protrusions remaining un-encapsulated. The protruding metal sheets (110) are solder-attached along with the leads to absorb thermo-mechanical stress.

Abstract translation: 半导体器件（100）包括具有焊盘（102）和具有可焊接表面（101a，110a）的多个引线（103）的金属四方扁平无引线/小外形无引线QFN / SON型引线框架（101） 至少一组引线在一行中排列同时具有公共平面（170）中的一个表面，所述组的每个引线具有形成为厚度减小的金属片的突起（110）。 封装（160）封装组件和引线框架，封装材料由侧壁（161）成形，其中一排引线沿着侧壁的边缘定位，并且突出部延伸远离封装侧壁，共面引线表面和 突起保持未封装。 突出的金属片（110）与引线一起焊接附着以吸收热机械应力。

公开(公告)号：US20230377124A1

公开(公告)日：2023-11-23

申请号：US18366111

申请日：2023-08-07

Applicant: Texas Instruments Incorporated

Inventor： Reynaldo Corpuz Javier ,  Alok Kumar Lohia ,  Andy Quang Tran

IPC: G06T7/00 ,  H01L23/495 ,  H01L23/00

CPC classification number: G06T7/0008 ,  H01L23/49568 ,  H01L24/00 ,  H01L23/49503 ,  H01L23/49555 ,  H05K3/3421

Abstract: An IC assembly including an exposed pad integrated circuit (“IC”) package having a thermal pad with a top surface and a bottom surface and with at least one peripheral surface portion extending transversely of and continuous with the bottom surface. The bottom surface and the at least one peripheral surface are exposed through a layer of mold compound. Also, methods of making an exposed pad integrated circuit (“IC”) package assembly. One method includes optically inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board. Another method includes wave soldering an exposed pad of an IC package to a printed circuit board.

公开(公告)号：US20190295935A1

公开(公告)日：2019-09-26

申请号：US16427172

申请日：2019-05-30

Applicant: Texas Instruments Incorporated

Inventor： Reynaldo Corpuz Javier ,  Alok Kumar Lohia ,  Andy Quang Tran

IPC: H01L23/495 ,  H01L23/00 ,  H01L21/48 ,  H01L23/367 ,  H01L23/29

Abstract: A lead frame sheet of flat no-lead lead frames having a semiconductor die on a die pad, terminals, and plastic encapsulation except on a back side of the sheet to provide an exposed thermal die pad, exposed side walls, and exposed back sides of the terminals.A solder wetable metal or metal alloy plating layer is on the back side and on the exposed the walls of the terminals. The exposed thermal pad and the back side of the terminals each include a contact region which lacks the plating layer.

公开(公告)号：US20180277465A1

公开(公告)日：2018-09-27

申请号：US15934516

申请日：2018-03-23

Applicant: Texas Instruments Incorporated

Inventor： Jeffrey Gail Holloway ,  Andy Quang Tran

IPC: H01L23/495 ,  H01L21/48 ,  H01L23/31

Abstract: A semiconductor package includes a semiconductor die and a ceramic package body covering the semiconductor die. The ceramic package body includes a plurality of contact pads. Each of a first plurality of leads includes a top portion and a bottom portion. The top portion of each of the first plurality of leads is electrically connected to a contact pad of the plurality of contact pads. Each of a second plurality of leads includes a top portion and a bottom portion and an interconnection portion between the top portion and the bottom portion. The top portion of each of the second plurality of leads includes separate finger portions that are electrically connected to at least two of the plurality of contact pads.

公开(公告)号：US09721859B2

公开(公告)日：2017-08-01

申请号：US14842535

申请日：2015-09-01

Applicant: Texas Instruments Incorporated

Inventor： Andy Quang Tran ,  Alok Kumar Lohia ,  Reynaldo Corpuz Javier

IPC: H01L21/50 ,  H01L23/10 ,  H01L23/00 ,  H01L23/055

CPC classification number: H01L23/10 ,  H01L21/50 ,  H01L23/055 ,  H01L24/09 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/89 ,  H01L2224/08225 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/1631 ,  H01L2924/16315 ,  H01L2924/1659 ,  H01L2924/1679 ,  H01L2924/18301 ,  H01L2224/45099 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2924/00

Abstract: A method of assembling a semi-hermetic semiconductor package includes bonding a semiconductor die having bond pads to a top side of a base region of a package substrate having vertical side walls that are hollow which define an inner open volume (gap) having an adhesive or thermoplastic material therein. There are a plurality of metal terminals providing top terminal contacts on the top side of the base region and bottom terminal contacts on a bottom side or below the base region. The bond pads are coupled to the top terminal contacts. A lid is placed which provides a top for the semiconductor package, where the lid extends to vertically oriented end protrusions so that the protrusions are positioned within the adhesive or thermoplastic material to secure the protrusions within the adhesive or thermoplastic material to provide a seal for the semiconductor package.

公开(公告)号：US09576886B1

公开(公告)日：2017-02-21

申请号：US15162807

申请日：2016-05-24

Applicant: Texas Instruments Incorporated

Inventor： Reynaldo Corpuz Javier ,  Alok Kumar Lohia ,  Andy Quang Tran

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/367 ,  H01L23/29

CPC classification number: H01L23/49582 ,  H01L21/4821 ,  H01L21/561 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3675 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49568 ,  H01L23/49579 ,  H01L24/09 ,  H01L24/29 ,  H01L24/46 ,  H01L24/97 ,  H01L2224/2908 ,  H01L2224/29144 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: A lead frame sheet of flat no-lead lead frames having a semiconductor die on a die pad, terminals, and plastic encapsulation except on a back side of the sheet to provide an exposed thermal die pad, exposed side walls, and exposed back sides of the terminals. A solder wetable metal or metal alloy plating layer is on the back side and on the exposed the walls of the terminals. The exposed thermal pad and the back side of the terminals each include a contact region which lacks the plating layer.

Abstract translation: 一种扁平无引线引线框架的引线框架，其在芯片焊盘上具有半导体管芯，端子和塑料封装，除了片材的背面之外，以提供暴露的热管芯焊盘，暴露的侧壁和暴露的背面 终端。 焊料可润湿的金属或金属合金镀层位于端子的背面和露出的壁上。 露出的热垫和端子的背面均包括缺少镀层的接触区域。

公开(公告)号：US09373569B1

公开(公告)日：2016-06-21

申请号：US14842460

申请日：2015-09-01

Applicant: Texas Instruments Incorporated

Inventor： Reynaldo Corpuz Javier ,  Alok Kumar Lohia ,  Andy Quang Tran

IPC: H01L21/44 ,  H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31

CPC classification number: H01L23/49582 ,  H01L21/4821 ,  H01L21/561 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3675 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49568 ,  H01L23/49579 ,  H01L24/09 ,  H01L24/29 ,  H01L24/46 ,  H01L24/97 ,  H01L2224/2908 ,  H01L2224/29144 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: A method of forming packaged semiconductor devices includes providing a lead frame sheet of flat no-lead lead frames having a semiconductor die on a die pad, terminals, and plastic encapsulation except on a back side of the sheet to provide an exposed thermal die pad and exposed back sides of the terminals. Partial sawing in saw lanes begins from the back side through the terminals terminating within the plastic encapsulation to provide exposed side walls of the terminals and of the plastic encapsulation. The exposed thermal pad and exposed back side of the terminals are all shorted together to form exposed electrically interconnected metal surfaces (interconnected surfaces). The interconnected surfaces are electroplated with a solder wetable metal or metal alloy plating layer. The interconnected surfaces are decoupled. A second sawing in the saw lanes finishes sawing through the plastic encapsulation to provide singulation, forming a plurality of packaged semiconductor devices.

Abstract translation: 一种形成封装半导体器件的方法包括：提供一个平板无引线引线框架的引线框架片，其具有在芯片焊盘上的半导体管芯，端子和塑料封装，除了片材的背面以提供暴露的热管芯焊盘， 暴露在终端的背面。 锯条中的部分锯切从背面开始，通过终端在塑料封装内终止，以提供端子的暴露侧壁和塑料封装。 端子的暴露的热垫和暴露的背面全部短接在一起形成暴露的电互连金属表面（互连表面）。 互连的表面用可焊接的可润湿金属或金属合金镀层电镀。 互连的表面是去耦的。 在锯条中的第二次锯切完成了通过塑料封装的锯切，以提供单一化，形成多个封装的半导体器件。

公开(公告)号：US20160043064A1

公开(公告)日：2016-02-11

申请号：US14922732

申请日：2015-10-26

Applicant: Texas Instruments Incorporated

Inventor： Andy Quang Tran ,  Lance Wright

IPC: H01L25/16 ,  H01L33/62 ,  H01L31/0232 ,  H01L31/16 ,  H01L33/58 ,  H01L31/18 ,  H01L33/54

CPC classification number: H01L31/16 ,  H01L21/82 ,  H01L25/165 ,  H01L25/167 ,  H01L27/14 ,  H01L31/02002 ,  H01L31/02325 ,  H01L31/08 ,  H01L31/09 ,  H01L31/101 ,  H01L31/18 ,  H01L33/54 ,  H01L33/58 ,  H01L33/62 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/1815 ,  H01L2933/0033 ,  H01L2933/005 ,  H01L2933/0058 ,  H01L2933/0066 ,  H01L2224/45099

Abstract: A method for fabricating a semiconductor proximity sensor includes providing a flat leadframe with a first and a second surface. The second surface is solderable. The leadframe includes a first and a second pad, a plurality of leads, and fingers framing the first pad. The fingers are spaced from the first pad by a gap which is filled with a clear molding compound. A light-emitting diode (LED) chip is assembled on the first pad and encapsulated by a first volume of the clear compound. The first volume outlined as a first lens. A sensor chip is assembled on the second pad and encapsulated by a second volume of the clear compound. The second volume outlined as a second lens. Opaque molding compound fills the space between the first and second volumes of clear compound and forms walls rising from the frame of fingers to create an enclosed cavity for the LED. The pads, leads, and fingers connected to a board using a layer of solder for attaching the proximity sensor.

Abstract translation: 制造半导体接近传感器的方法包括提供具有第一表面和第二表面的扁平引线框架。 第二个表面是可焊接的。 引线框架包括第一和第二焊盘，多个引线和构成第一焊盘的指状物。 指状物通过填充有透明模塑料的间隙与第一垫片隔开。 发光二极管（LED）芯片组装在第一焊盘上并由第一体积的透明化合物封装。 第一卷被列为第一个镜头。 传感器芯片组装在第二焊盘上并被第二体积的透明化合物封装。 第二卷被列为第二个镜头。 不透明的模塑料填充第一和第二体积的透明化合物之间的空间并且形成从手指框架上升的壁以产生用于LED的封闭空腔。 焊盘，引线和手指连接到板上，使用焊料层来附接接近传感器。

公开(公告)号：US09171830B2

公开(公告)日：2015-10-27

申请号：US14627839

申请日：2015-02-20

Applicant: Texas Instruments Incorporated

Inventor： Andy Quang Tran ,  Lance Wright

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L25/16 ,  H01L27/14 ,  H01L21/82 ,  H01L31/0232 ,  H01L31/16 ,  H01L31/18 ,  H01L33/58 ,  H01L33/62

CPC classification number: H01L31/16 ,  H01L21/82 ,  H01L25/165 ,  H01L25/167 ,  H01L27/14 ,  H01L31/02002 ,  H01L31/02325 ,  H01L31/08 ,  H01L31/09 ,  H01L31/101 ,  H01L31/18 ,  H01L33/54 ,  H01L33/58 ,  H01L33/62 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/1815 ,  H01L2933/0033 ,  H01L2933/005 ,  H01L2933/0058 ,  H01L2933/0066 ,  H01L2224/45099

Abstract: A method for fabricating a semiconductor proximity sensor includes providing a flat leadframe with a first and a second surface. The second surface is solderable. The leadframe includes a first and a second pad, a plurality of leads, and fingers framing the first pad. The fingers are spaced from the first pad by a gap which is filled with a clear molding compound. A light-emitting diode (LED) chip is assembled on the first pad and encapsulated by a first volume of the clear compound. The first volume outlined as a first lens. A sensor chip is assembled on the second pad and encapsulated by a second volume of the clear compound. The second volume outlined as a second lens. Opaque molding compound fills the space between the first and second volumes of clear compound, forms shutters for the first and second lenses, and forms walls rising from the frame of fingers to create an enclosed cavity for the LED. The pads, leads, and fingers connected to a board using a layer of solder for attaching the proximity sensor.

Abstract translation: 制造半导体接近传感器的方法包括提供具有第一表面和第二表面的扁平引线框架。 第二个表面是可焊接的。 引线框架包括第一和第二焊盘，多个引线和构成第一焊盘的指状物。 指状物通过填充有透明模塑料的间隙与第一垫片隔开。 发光二极管（LED）芯片组装在第一焊盘上并被第一体积的透明化合物封装。 第一卷被列为第一个镜头。 传感器芯片组装在第二焊盘上并被第二体积的透明化合物封装。 第二卷被列为第二个镜头。 不透明模塑料填充第一和第二体积的透明化合物之间的空间，形成用于第一和第二透镜的百叶窗，并且形成从手指框架上升的壁以产生用于LED的封闭空腔。 焊盘，引线和手指连接到板上，使用焊料层来附接接近传感器。