公开(公告)号：US20080290856A1

公开(公告)日：2008-11-27

申请号：US12158785

申请日：2006-12-13

申请人： Thomas Hoffmann ,  Armin Liero

发明人： Thomas Hoffmann ,  Armin Liero

IPC分类号： G08C17/00

CPC分类号： G01R15/26 ,  G01R1/06777 ,  G01R1/06788

摘要： The invention relates to a device, a probe, and a method for the galvanically decoupling transmission of a measuring signal. A microwave signal is supplied by a transceiver (1) to a sensor (3) by means of a galvanically decoupled waveguide (2). The signal is partially reflected in the sensor (3), the amplitude, phase and/or polarization of the reflected microwave signal containing the information relating to the measuring value. The reflected microwave signal runs through the same waveguide (2) back to the transceiver (1) and is evaluated therein. The invention provides a more simple and economical structure than conventional devices of prior art, as a voltage supply is not required especially on the sensor side as a result of the reflection. In this way, the sensor (3) can also be produced in a very compact manner, minimizing the influence of the measuring signal through the sensor (3).

摘要翻译： 本发明涉及一种用于测量信号的电流去耦传输的装置，探针和方法。 微波信号由收发器（1）通过电流去耦波导（2）提供给传感器（3）。 信号部分地反映在传感器（3）中，反射的微波信号的振幅，相位和/或极化包含与测量值有关的信息。 反射的微波信号通过相同的波导（2）返回到收发器（1）并在其中进行评估。 本发明提供比现有技术的传统装置更简单和经济的结构，因为作为反射的结果，特别是传感器侧不需要电压源。 以这种方式，也可以以非常紧凑的方式制造传感器（3），从而最小化通过传感器（3）的测量信号的影响。

公开(公告)号：US20080290425A1

公开(公告)日：2008-11-27

申请号：US12119972

申请日：2008-05-13

申请人： Luis-Felipe Giles ,  Thomas Hoffmann ,  Chris Stapelmann

发明人： Luis-Felipe Giles ,  Thomas Hoffmann ,  Chris Stapelmann

IPC分类号： H01L29/00 ,  H01L21/425 ,  H01L21/336

CPC分类号： H01L21/3223 ,  H01L21/263 ,  H01L21/26506 ,  H01L29/66575 ,  H01L29/78

摘要： In a method for fabricating a semiconductor element in a substrate, first implantation ions are implanted into the substrate, whereby micro-cavities are produced in a first partial region of the substrate. Furthermore, pre-amorphization ions are implanted into the substrate, whereby a second partial region of the substrate is at least partly amorphized, and whereby crystal defects are produced in the substrate. Furthermore, second implantation ions are implanted into the second partial region of the substrate. Furthermore, the substrate is heated, such that at least some of the crystal defects are eliminated using the second implantation ions. Furthermore, dopant atoms are implanted into the second partial region of the substrate, wherein the semiconductor element is formed using the dopant atoms.

摘要翻译： 在衬底中制造半导体元件的方法中，将第一注入离子注入到衬底中，从而在衬底的第一部分区域中产生微腔。 此外，将非晶化离子注入到基板中，由此基板的第二部分区域至少部分非晶化，并且由此在基板中产生晶体缺陷。 此外，第二注入离子注入基片的第二部分区域。 此外，加热衬底，使得使用第二注入离子去除至少一些晶体缺陷。 此外，掺杂剂原子被注入到衬底的第二部分区域中，其中使用掺杂剂原子形成半导体元件。

公开(公告)号：US20070282705A1

公开(公告)日：2007-12-06

申请号：US11828864

申请日：2007-07-26

申请人： Geoff Chalmers ,  Thomas Hoffmann

发明人： Geoff Chalmers ,  Thomas Hoffmann

IPC分类号： G06Q30/00

CPC分类号： G06Q10/0837 ,  G06Q10/08 ,  G06Q10/087 ,  G06Q30/02 ,  G06Q30/0601 ,  G06Q40/04

摘要： The present invention provides systems and methods for processing return transactions over a network. An embodiment of the invention discloses an online return application that generates an electronic return shipping label that can be delivered to a browser of a customer that wishes to make a return. Also, disclosed is the creation and transmission of label delivery links, which provide for dynamic generation and delivery of shipping labels.

摘要翻译： 本发明提供了通过网络处理返回事务的系统和方法。 本发明的实施例公开了一种在线返回应用程序，其生成可以被递送到希望返回的客户的浏览器的电子退货运输标签。 此外，披露的是标签传送链接的创建和传输，其提供运输标签的动态生成和传递。

公开(公告)号：US07274055B2

公开(公告)日：2007-09-25

申请号：US11171097

申请日：2005-06-29

申请人： Anand Murthy ,  Boyan Boyanov ,  Glenn A. Glass ,  Thomas Hoffmann

发明人： Anand Murthy ,  Boyan Boyanov ,  Glenn A. Glass ,  Thomas Hoffmann

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/7848 ,  H01L21/28518 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/167 ,  H01L29/36 ,  H01L29/41725 ,  H01L29/6628 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/78 ,  H01L29/7833 ,  H01L29/7842 ,  Y10S438/933

摘要： An embodiment of the invention reduces the external resistance of a transistor by utilizing a silicon germanium alloy for the source and drain regions and a nickel silicon germanium self-aligned silicide (i.e., salicide) layer to form the contact surface of the source and drain regions. The interface of the silicon germanium and the nickel silicon germanium silicide has a lower specific contact resistivity based on a decreased metal-semiconductor work function between the silicon germanium and the silicide and the increased carrier mobility in silicon germanium versus silicon. The silicon germanium may be doped to further tune its electrical properties. A reduction of the external resistance of a transistor equates to increased transistor performance both in switching speed and power consumption.

摘要翻译： 本发明的一个实施例通过利用用于源极和漏极区域的硅锗合金和镍硅锗自对准硅化物（即，自对准硅化物）层来形成源极和漏极区域的接触表面来降低晶体管的外部电阻 。 基于硅锗和硅化物之间的金属半导体功函数降低，硅锗与硅硅锗硅的界面具有较低的比接触电阻率，并且硅锗与硅中的载流子迁移率增加。 可以掺杂硅锗以进一步调整其电性能。 降低晶体管的外部电阻等同于在开关速度和功耗方面提高晶体管的性能。

公开(公告)号：US20060065937A1

公开(公告)日：2006-03-30

申请号：US10954914

申请日：2004-09-30

申请人： Thomas Hoffmann ,  Sunit Tyagi ,  Giuseppe Curello ,  Berhard Sell ,  Christopher Auth

发明人： Thomas Hoffmann ,  Sunit Tyagi ,  Giuseppe Curello ,  Berhard Sell ,  Christopher Auth

IPC分类号： H01L29/76 ,  H01L21/336

CPC分类号： H01L29/66636 ,  H01L21/26586 ,  H01L29/1083 ,  H01L29/41783 ,  H01L29/66492 ,  H01L29/7834 ,  H01L29/7848

摘要： A method of providing a halo implant region in a substrate of a MOS device having a gate electrode thereon and defining source/drain regions, a MOS device fabricated according to the above method, and a system comprising the MOS device. The method comprises: defining undercut recesses in the substrate at the source/drain regions thereof, the undercut recesses extending beneath the gate electrode; creating a halo implant region beneath the gate electrode between the recesses; and providing raised source/drain structures in the undercut recesses after creating the halo implant region.

摘要翻译： 在其上具有栅电极并限定源/漏区的MOS器件的衬底中提供卤素注入区的方法，根据上述方法制造的MOS器件和包括MOS器件的系统。 该方法包括：在其源极/漏极区域处限定衬底中的底切凹部，在栅电极下方延伸的底切凹部; 在所述凹部之间的所述栅极电极下面形成晕圈植入区域; 并且在产生晕圈植入区域之后在底切凹槽中提供升高的源极/漏极结构。

公开(公告)号：US06949482B2

公开(公告)日：2005-09-27

申请号：US10731269

申请日：2003-12-08

申请人： Anand Murthy ,  Boyan Boyanov ,  Glenn A. Glass ,  Thomas Hoffmann

发明人： Anand Murthy ,  Boyan Boyanov ,  Glenn A. Glass ,  Thomas Hoffmann

IPC分类号： H01L21/285 ,  H01L21/336 ,  H01L29/78 ,  H01L21/00

CPC分类号： H01L29/7848 ,  H01L21/28518 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/167 ,  H01L29/36 ,  H01L29/41725 ,  H01L29/6628 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/78 ,  H01L29/7833 ,  H01L29/7842 ,  Y10S438/933

摘要： An embodiment of the invention reduces the external resistance of a transistor by utilizing a silicon germanium alloy for the source and drain regions and a nickel silicon germanium self-aligned silicide (i.e., salicide) layer to form the contact surface of the source and drain regions. The interface of the silicon germanium and the nickel silicon germanium silicide has a lower specific contact resistivity based on a decreased metal-semiconductor work function between the silicon germanium and the silicide and the increased carrier mobility in silicon germanium versus silicon. The silicon germanium may be doped to further tune its electrical properties. A reduction of the external resistance of a transistor equates to increased transistor performance both in switching speed and power consumption.

摘要翻译： 本发明的一个实施例通过利用用于源极和漏极区域的硅锗合金和镍硅锗自对准硅化物（即，自对准硅化物）层来形成源极和漏极区域的接触表面来降低晶体管的外部电阻 。 基于硅锗和硅化物之间的金属半导体功函数降低，硅锗与硅硅锗硅的界面具有较低的比接触电阻率，并且硅锗与硅中的载流子迁移率增加。 可以掺杂硅锗以进一步调整其电性能。 降低晶体管的外部电阻等同于在开关速度和功耗方面提高晶体管的性能。

公开(公告)号：US20050104057A1

公开(公告)日：2005-05-19

申请号：US11024259

申请日：2004-12-27

申请人： M. Shaheed ,  Thomas Hoffmann ,  Mark Armstrong ,  Christopher Auth

发明人： M. Shaheed ,  Thomas Hoffmann ,  Mark Armstrong ,  Christopher Auth

IPC分类号： H01L21/336 ,  H01L29/78 ,  H01L29/06

CPC分类号： H01L29/66636 ,  H01L29/78 ,  H01L29/7842 ,  H01L29/7843

摘要： An intentional recess or indentation is created in a region of semiconductor material that will become part of a channel of a metal oxide semiconductor (MOS) transistor structure. A layer is created on a surface of the recess to induce an appropriate type of stress in the channel.

摘要翻译： 在将成为金属氧化物半导体（MOS）晶体管结构的沟道的一部分的半导体材料的区域中产生有意的凹陷或凹陷。 在凹槽的表面上产生一层以在通道中引起适当类型的应力。

公开(公告)号：US08946446B2

公开(公告)日：2015-02-03

申请号：US14110702

申请日：2012-04-13

申请人： Christoph Steeneck ,  Olaf Kinzel ,  Christian Gege ,  Gerald Kleymann ,  Thomas Hoffmann

发明人： Christoph Steeneck ,  Olaf Kinzel ,  Christian Gege ,  Gerald Kleymann ,  Thomas Hoffmann

IPC分类号： C07D209/02 ,  C07D207/00 ,  C07D215/00 ,  C07D401/00 ,  C07D413/00 ,  A61K31/44 ,  A61K31/535 ,  A61K31/397 ,  A61K31/445 ,  A61K31/40 ,  C07D209/30 ,  C07D207/36 ,  C07D401/04 ,  C07D403/04 ,  C07D403/10

CPC分类号： C07D209/30 ,  C07D207/36 ,  C07D401/04 ,  C07D403/04 ,  C07D403/10

摘要： The invention provides modulators for the orphan nuclear receptor RORy and methods for treating RORy mediated diseases by administrating these novel RORy modulators to a human or a mammal in need thereof. Specifically, the present invention provides pyrrolo sulfonamide compounds of Formula (1) and the enantiomers, diastereomers, tautomers, solvates and pharmaceutically acceptable salts thereof.

摘要翻译： 本发明提供了用于孤儿核受体RORy的调节剂和通过将这些新型RORY调节剂施用于有需要的人或哺乳动物来治疗RORy介导的疾病的方法。 具体地说，本发明提供式（1）的吡咯磺酰胺化合物及其对映异构体，非对映异构体，互变异构体，溶剂合物及其药学上可接受的盐。

公开(公告)号：US08735987B1

公开(公告)日：2014-05-27

申请号：US13489824

申请日：2012-06-06

申请人： Thomas Hoffmann ,  Scott E. Thompson ,  Pushkar Ranade

发明人： Thomas Hoffmann ,  Scott E. Thompson ,  Pushkar Ranade

IPC分类号： H01L27/092

CPC分类号： H01L27/1108 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823828 ,  H01L21/823842 ,  H01L21/823878 ,  H01L27/092 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/0649 ,  H01L29/1033 ,  H01L29/161 ,  H01L29/4958 ,  H01L29/4966

摘要： A semiconductor device includes a substrate having a semiconducting surface having formed therein a first active region and a second active region, where the first active region consists of a substantially undoped layer at the surface and a highly doped screening layer of a first conductivity type beneath the first substantially undoped layer, and the second active region consists of a second substantially undoped layer at the surface and a second highly doped screening layer of a second conductivity type beneath the second substantially undoped layer. The semiconductor device also includes a gate stack formed in each of the first active region and the second active region consists of at least one gate dielectric layer and a layer of a metal, where the metal has a workfunction that is substantially midgap with respect to the semiconducting surface.

摘要翻译： 半导体器件包括具有在其中形成有第一有源区和第二有源区的半导体表面的衬底，其中第一有源区由表面处的基本上未掺杂的层和在第一有源区下面的第一导电类型的高掺杂屏蔽层 第一基本上未掺杂的层，并且第二有源区由表面处的第二基本上未掺杂的层和在第二基本未掺杂的层下面的第二导电类型的第二高掺杂屏蔽层组成。 该半导体器件还包括形成在每个第一有源区中的栅极堆叠，而第二有源区由至少一个栅极电介质层和金属层组成，其中金属具有相对于 半导体表面。

公开(公告)号：US08614128B1

公开(公告)日：2013-12-24

申请号：US13591767

申请日：2012-08-22

申请人： Scott E. Thompson ,  Thomas Hoffmann ,  Lance Scudder ,  U. C. Sridharan ,  Dalong Zhao ,  Pushkar Ranade ,  Michael Duane ,  Paul E. Gregory

发明人： Scott E. Thompson ,  Thomas Hoffmann ,  Lance Scudder ,  U. C. Sridharan ,  Dalong Zhao ,  Pushkar Ranade ,  Michael Duane ,  Paul E. Gregory

IPC分类号： H01L21/8234

CPC分类号： H01L27/1104 ,  H01L21/02532 ,  H01L21/823807 ,  H01L21/823892 ,  H01L27/0922 ,  H01L27/11 ,  H01L29/0653 ,  H01L29/16

摘要： Methods for fabricating semiconductor devices and devices therefrom are provided. A method includes providing a substrate having a semiconducting surface with first and second layers, where the semiconducting surface has a plurality of active regions comprising first and second active regions. In the first active region, the first layer is an undoped layer and the second layer is a highly doped screening layer. The method also includes removing a part of the first layer to reduce a thickness of the substantially undoped layer for at least a portion of the first active region without a corresponding thickness reduction of the first layer in the second active region. The method additionally includes forming semiconductor devices in the plurality of active regions. In the method, the part of the first layer removed is selected based on a threshold voltage adjustment required for the substrate in the portion of the first active region.

摘要翻译： 提供了制造半导体器件及其器件的方法。 一种方法包括提供具有第一和第二层的具有半导体表面的衬底，其中半导体表面具有包括第一和第二有源区的多个有源区。 在第一有源区中，第一层是未掺杂层，第二层是高度掺杂的掩膜层。 该方法还包括移除第一层的一部分以减少第一有源区的至少一部分的基本上未掺杂层的厚度，而在第二有源区中没有相应的第一层的厚度减小。 该方法还包括在多个有源区域中形成半导体器件。 在该方法中，基于第一有源区的部分中的衬底所需的阈值电压调整来选择去除第一层的部分。