公开(公告)号：US20180190660A1

公开(公告)日：2018-07-05

申请号：US15465622

申请日：2017-03-22

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Ger-Pin Lin ,  Yung-Ming Wang ,  Tien-Chen Chan ,  Shu-Yen Chan

IPC: H01L27/108 ,  H01L21/265 ,  H01L29/423 ,  H01L29/10 ,  H01L29/49 ,  H01L21/762

CPC classification number: H01L27/10876 ,  H01L21/26513 ,  H01L21/76237 ,  H01L27/10823 ,  H01L29/1037 ,  H01L29/1041 ,  H01L29/105 ,  H01L29/4236 ,  H01L29/495 ,  H01L29/66621 ,  H01L29/78 ,  H01L29/7834

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a memory region defined thereon; forming a trench in the substrate; performing a first ion implantation process to form a first doped region having a first conductive type in the substrate adjacent to the trench; forming a gate electrode in the trench; and performing a second ion implantation process to form a second doped region having a second conductive type in the substrate above the gate electrode.

公开(公告)号：US09966468B2

公开(公告)日：2018-05-08

申请号：US15214429

申请日：2016-07-19

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tien-Chen Chan ,  Yi-Fan Li ,  Li-Wei Feng ,  Ming-Hua Chang ,  Yu-Shu Lin ,  Shu-Yen Chan

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L29/06

CPC classification number: H01L29/7851 ,  H01L21/02164 ,  H01L21/0217 ,  H01L29/0649 ,  H01L29/1054 ,  H01L29/66795 ,  H01L29/785

Abstract: A method for fabricating semiconductor device is disclosed. First, a fin-shaped structure is formed on a substrate, a first liner is formed on the substrate and the fin-shaped structure, a second liner is formed on the first liner, part of the second liner and part of the first liner are removed to expose a top surface of the fin-shaped structure, part of the first liner between the fin-shaped structure and the second liner is removed to form a recess, and an epitaxial layer is formed in the recess.

公开(公告)号：US09899498B2

公开(公告)日：2018-02-20

申请号：US15590510

申请日：2017-05-09

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tien-Chen Chan ,  Yi-Fan Li ,  Yen-Hsing Chen ,  Chun-Yu Chen ,  Chung-Ting Huang ,  Zih-Hsuan Huang ,  Ming-Hua Chang ,  Yu-Shu Lin ,  Shu-Yen Chan

IPC: H01L21/336 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L29/66795 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/1054 ,  H01L29/66636 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device is provided, including a substrate with an isolation layer formed thereon, wherein the substrate has a fin protruding up through the isolation layer to form a top surface and a pair of lateral sidewalls of the fin above the isolation layer; a silicon-germanium (SiGe) layer epitaxially grown on the top surface and the lateral sidewalls of the fin; and a gate stack formed on the isolation layer and across the fin, wherein the fin and the gate stack respectively extend along a first direction and a second direction. The SiGe layer formed on the top surface has a first thickness, the SiGe layer formed on said lateral sidewall has a second thickness, and a ratio of the first thickness to the second thickness is in a range of 1:10 to 1:30.

公开(公告)号：US20170338227A1

公开(公告)日：2017-11-23

申请号：US15652223

申请日：2017-07-17

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Li-Wei Feng ,  Tong-Jyun Huang ,  Shih-Hung Tsai ,  Jia-Rong Wu ,  Tien-Chen Chan ,  Yu-Shu Lin ,  Jyh-Shyang Jenq

IPC: H01L27/088 ,  H01L21/8234 ,  H01L21/311 ,  H01L29/66 ,  H01L29/06

Abstract: A semiconductor device includes at least a substrate, fin-shaped structures, a protection layer, epitaxial layers, and a gate electrode. The fin-shaped structures are disposed in a first region and a second region of the substrate. The protection layer conformally covers the surface of the substrate and the sidewalls of fin-shaped structures. The epitaxial layers respectively conformally and directly cover the fin-shaped structures in the first region. The gate electrode covers the fin-shaped structures in the second region, and the protection layer is disposed between the gate electrode and the fin-shaped structures.

公开(公告)号：US11502180B2

公开(公告)日：2022-11-15

申请号：US16792308

申请日：2020-02-17

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Chia-Wei Wu ,  Ting-Pang Chung ,  Tien-Chen Chan ,  Shu-Yen Chan

IPC: H01L29/423 ,  H01L21/02 ,  H01L27/108 ,  H01L27/12 ,  H01L29/06 ,  H01L29/08 ,  H01L29/49 ,  H01L27/11568 ,  H01L27/11578

Abstract: A semiconductor device includes a substrate having at least a trench formed therein. A conductive material fills a lower portion of the trench. A barrier layer is between the conductive material and the substrate. An insulating layer is in the trench and completely covers the conductive material and the barrier layer, wherein a portion of the insulating layer covering the barrier layer has a bird's peak profile.

公开(公告)号：US10608086B2

公开(公告)日：2020-03-31

申请号：US15854769

申请日：2017-12-27

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Ger-Pin Lin ,  Tien-Chen Chan ,  Shu-Yen Chan

IPC: H01L27/108 ,  H01L21/265 ,  H01L29/423 ,  H01L29/08 ,  H01L21/223 ,  H01L29/167 ,  H01L23/535

Abstract: The present invention provides a semiconductor structure, the semiconductor structure includes a substrate, at least one active area is defined on the substrate, a buried word line is disposed in the substrate, a source/drain region disposed beside the buried word line, a diffusion barrier region, disposed at the top of the source/drain region, the diffusion barrier region comprises a plurality of doping atoms selected from the group consisting of carbon atoms, nitrogen atoms, germanium atoms, oxygen atoms, helium atoms and xenon atoms, a dielectric layer disposed on the substrate, and a contact structure disposed in the dielectric layer, and electrically connected to the source/drain region.

公开(公告)号：US20190312036A1

公开(公告)日：2019-10-10

申请号：US16443880

申请日：2019-06-18

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Tsuo-Wen Lu ,  Ger-Pin Lin ,  Tien-Chen Chan ,  Shu-Yen Chan

IPC: H01L27/108 ,  H01L21/28 ,  H01L29/51 ,  H01L21/02 ,  H01L29/423 ,  H01L29/66

Abstract: A semiconductor device includes a semiconductor substrate having a gate trench including of an upper trench and a lower trench. The upper trench is wider than the lower trench. A gate is embedded in the gate trench. The gate includes an upper portion and a lower portion. A first gate dielectric layer is between the upper portion and a sidewall of the upper trench. The first gate dielectric layer has a first thickness. A second gate dielectric layer is between the lower portion and a sidewall of the lower trench and between the lower portion and a bottom surface of the lower trench. The second gate dielectric layer has a second thickness that is smaller than the first thickness.

公开(公告)号：US20190067293A1

公开(公告)日：2019-02-28

申请号：US15712133

申请日：2017-09-21

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Ger-Pin Lin ,  Kuan-Chun Lin ,  Chi-Mao Hsu ,  Shu-Yen Chan ,  Shih-Fang Tzou ,  Tsuo-Wen Lu ,  Tien-Chen Chan ,  Feng-Yi Chang ,  Shih-Kuei Yen ,  Fu-Che Lee

IPC: H01L27/108 ,  H01L21/28

Abstract: A method of fabricating a buried word line structure includes providing a substrate with a word line trench therein. Two source/drain doped regions are disposed in the substrate at two sides of the word line trench. Later, a silicon oxide layer is formed to cover the word line trench. A titanium nitride layer is formed to cover the silicon oxide layer. Next, a tilt ion implantation process is performed to implant silicon atoms into the titanium nitride layer to transform part of the titanium nitride layer into a titanium silicon nitride layer. A conductive layer is formed in the word line trench. Subsequently, part of the conductive layer, part of the titanium silicon nitride layer and part of the silicon oxide layer are removed to form a recess. Finally, a cap layer fills in the recess.

公开(公告)号：US20190013204A1

公开(公告)日：2019-01-10

申请号：US15659653

申请日：2017-07-26

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Tien-Chen Chan ,  Ger-Pin Lin ,  Tsuo-Wen Lu ,  Chin-Wei Wu ,  Yu-Chun Wang ,  Shu-Yen Chan

IPC: H01L21/28 ,  H01L29/66 ,  H01L21/3105 ,  H01L21/02 ,  H01L21/74 ,  H01L23/535 ,  H01L29/78

Abstract: A method of fabricating a buried word line includes forming a trench in a substrate. Next, a deposition process is performed to form a silicon layer on a sidewall and a bottom at the inner side of the trench. After the deposition process, a gate dielectric layer is formed in the trench. Finally, a conductive layer is formed to fill in the trench.

公开(公告)号：US20180212030A1

公开(公告)日：2018-07-26

申请号：US15873904

申请日：2018-01-18

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Chia-Wei Wu ,  Ting-Pang Chung ,  Tien-Chen Chan ,  Shu-Yen Chan

IPC: H01L29/423 ,  H01L29/49 ,  H01L21/02 ,  H01L29/06 ,  H01L27/12 ,  H01L29/08

CPC classification number: H01L29/4236 ,  H01L21/02233 ,  H01L21/02244 ,  H01L21/02255 ,  H01L27/108 ,  H01L27/10823 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10891 ,  H01L27/12 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/4238 ,  H01L29/4908

Abstract: A semiconductor device and a method of forming the same are disclosed. First, a substrate having a main surface is provided. At least a trench is formed in the substrate. A barrier layer is formed in the trench and a conductive material is formed on the barrier layer and filling up the trench. The barrier layer and the conductive material are then recessed to be lower than the upper surface of the substrate. After that, an oxidation process is performed to oxidize the barrier layer and the conductive material thereby forming an insulating layer.