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公开(公告)号：US20090024799A1
公开(公告)日：2009-01-22
申请号：US11880357
申请日：2007-07-20
IPC分类号： G06F12/08
CPC分类号： G06F1/3287 , G06F1/3203 , G06F1/3275 , G06F12/0811 , G06F12/0831 , G06F12/084 , G06F2212/1024 , G06F2212/1028 , G06F2212/1048 , Y02D10/13 , Y02D10/14 , Y02D50/20
摘要： A technique to retain cached information during a low power mode, according to at least one embodiment. In one embodiment, information stored in a processor's local cache is saved to a shared cache before the processor is placed into a low power mode, such that other processors may access information from the shared cache instead of causing the low power mode processor to return from the low power mode to service an access to its local cache.
摘要翻译： 根据至少一个实施例的在低功率模式下保持缓存信息的技术。 在一个实施例中，存储在处理器的本地高速缓存中的信息在处理器被置于低功率模式之前被保存到共享高速缓存，使得其他处理器可以从共享高速缓存访问信息，而不是使低功率模式处理器从 低功耗模式来访问其本地缓存。
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22.发明申请Method, apparatus, and system for increasing single core performance in a multi-core microprocessor 有权用于增加多核微处理器中单核性能的方法，装置和系统公开(公告)号：US20080005592A1
公开(公告)日：2008-01-03
申请号：US11477751
申请日：2006-06-28
申请人： Jose Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan
发明人： Jose Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan
IPC分类号： G06F1/00
CPC分类号： G06F1/206
摘要： A method, system, and apparatus to enable at least one active core in a multi-core processor to operate at a higher operating point while at least one other core in the multi-core processor is in an idle state. When the idle core exits the idle state, the operating point may be reduced after a hysteresis timer has expired.
摘要翻译： 一种使多核处理器中的至少一个活动核心能够在较高工作点运行并且多核处理器中的至少一个其他核心处于空闲状态的方法，系统和装置。 当空闲磁芯退出空闲状态时，在滞后计时器到期后，工作点可能会减少。
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公开(公告)号：US07149645B2
公开(公告)日：2006-12-12
申请号：US11024679
申请日：2004-12-30
摘要： A device and method for continually monitoring multiple thermal sensors located at hotspots across a processor. The sensors are connected to a sensor cycling and selection block located at a periphery of the die. The output from the sensor selection block is converted into a digital temperature code. Based on the digital temperature code, thermal events trigger various thermal controls. The thermal event triggers may be software-programmable, providing flexible temperature management.
摘要翻译： 一种用于连续监测位于热点处的多个热传感器的装置和方法。 传感器连接到位于模具周边的传感器循环和选择块。 传感器选择块的输出转换为数字温度代码。 基于数字温度代码，热事件触发各种热控制。 热事件触发器可以是软件可编程的，提供灵活的温度管理。
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公开(公告)号：US20060164123A1
公开(公告)日：2006-07-27
申请号：US11393934
申请日：2006-03-30
申请人： Varghese George
发明人： Varghese George
IPC分类号： H03K19/0175
CPC分类号： H03K19/01759
摘要： The present invention is directed to programmable bidirectional buffers and methods for programming such buffers. One method of according to an aspect of the present invention is a method of configuring a bidirectional buffer including first and second signal nodes. The method includes applying a configuration signal on one of the first and second signal nodes and configuring the buffer responsive to the applied configuration signal.
摘要翻译： 本发明涉及用于编程这种缓冲器的可编程双向缓冲器和方法。 根据本发明的一个方面的一种方法是配置包括第一和第二信号节点的双向缓冲器的方法。 该方法包括在第一和第二信号节点之一上应用配置信号并且响应于所应用的配置信号来配置缓冲器。
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25.发明授权Selective interrupt delivery to multiple processors having independent operating systems 失效选择性中断传递到具有独立操作系统的多个处理器公开(公告)号：US06976099B2
公开(公告)日：2005-12-13
申请号：US10865220
申请日：2004-06-09
CPC分类号： G06F9/4812 , G06F13/24 , Y02D10/14 , Y02D10/24
摘要： A method of and apparatus for selective delivery of an interrupt to one of multiple processors having independent operating systems is described. The interrupts are generated from various platform devices in the computer system. Depending on the mode of operation of the system, a controller is configured to deliver interrupts to a co-processor when the host processor is off, without turning on the host processor. The interrupt may be delivered to the correct processor using wither a bus-based message or a dedicated interrupt line.
摘要翻译： 描述了一种用于向具有独立操作系统的多个处理器之一选择性地传递中断的方法和装置。 中断由计算机系统中的各种平台设备生成。 根据系统的操作模式，控制器被配置为在主处理器关闭时向协处理器传送中断，而不打开主机处理器。 可以使用基于总线的消息或专用中断线将中断传送到正确的处理器。
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26.发明申请Method, system, and apparatus for dynamically configuring the operating point utilized for thermal management of an integrated circuit 有权用于动态地配置用于集成电路的热管理的工作点的方法，系统和装置公开(公告)号：US20050091548A1
公开(公告)日：2005-04-28
申请号：US10696469
申请日：2003-10-28
CPC分类号： G06F1/324 , G06F1/206 , G06F1/3203 , G06F1/3296 , Y02D10/126 , Y02D10/16 , Y02D10/172
摘要： Methods and circuits to define a thermal operating mode for a integrated device by defining an operating voltage and a frequency range.
摘要翻译： 通过定义工作电压和频率范围来定义集成器件的热操作模式的方法和电路。
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27.发明授权公开(公告)号：US08560871B2
公开(公告)日：2013-10-15
申请号：US13711260
申请日：2012-12-11
申请人： Jose P. Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan , Nathan Ofer , Tomer Ziv
发明人： Jose P. Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan , Nathan Ofer , Tomer Ziv
CPC分类号： G06F15/82 , G06F1/08 , G06F1/206 , G06F1/3203 , G06F1/324 , G06F9/06 , G06F9/30145 , G06F15/76 , Y02D10/126 , Y02D10/16
摘要： With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
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公开(公告)号：US08527709B2
公开(公告)日：2013-09-03
申请号：US11880357
申请日：2007-07-20
CPC分类号： G06F1/3287 , G06F1/3203 , G06F1/3275 , G06F12/0811 , G06F12/0831 , G06F12/084 , G06F2212/1024 , G06F2212/1028 , G06F2212/1048 , Y02D10/13 , Y02D10/14 , Y02D50/20
摘要： A technique to retain cached information during a low power mode, according to at least one embodiment. In one embodiment, information stored in a processor's local cache is saved to a shared cache before the processor is placed into a low power mode, such that other processors may access information from the shared cache instead of causing the low power mode processor to return from the low power mode to service an access to its local cache.
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公开(公告)号：US20130212370A1
公开(公告)日：2013-08-15
申请号：US13842974
申请日：2013-03-15
IPC分类号： G06F21/57
CPC分类号： G06F21/57 , G06F1/324 , G06F1/3296 , G06F21/575 , G06F21/70 , G06F21/81 , G06F2221/2101 , Y02D10/126
摘要： A system and method is provided for establishing safe processor operating points. Some embodiments may include a tamper resistant storage element that stores information regarding one or more operating points of an adjustable processor operating parameter. Some embodiments may further include an element to determine what the current processor operating point is of the operating parameter, and an element to compare the current operating point of the operating parameter with the stored information.
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30.发明授权Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor 失效用于优化多点微处理器中的频率和性能的方法，装置和系统公开(公告)号：US08356197B2
公开(公告)日：2013-01-15
申请号：US13156267
申请日：2011-06-08
申请人： Jose P Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan , Nathan J Ofer , Tomer Ziv
发明人： Jose P Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan , Nathan J Ofer , Tomer Ziv
CPC分类号： G06F15/82 , G06F1/08 , G06F1/206 , G06F1/3203 , G06F1/324 , G06F9/06 , G06F9/30145 , G06F15/76 , Y02D10/126 , Y02D10/16
摘要： With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
摘要翻译： 随着对多核处理器的进展，每个核心都不能容易地确定另一个模具相对于空闲或活动状态的状态。 讨论了在多芯片微处理器中利用接口在多个核心之间传输核心状态的提议。 因此，这通过允许基于利用每个核心状态来设置性能和频率的最佳设置来促进热管理。
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