公开(公告)号：US08844461B2

公开(公告)日：2014-09-30

申请号：US11735989

申请日：2007-04-16

申请人： William Thie ,  John M. Boyd ,  Fritz C. Redeker ,  Yezdi Dordi ,  John Parks ,  Tiruchirapalli Arunagiri ,  Aleksander Owczarz ,  Todd Balisky ,  Clint Thomas ,  Jacob Wylie ,  Alan M. Schoepp

发明人： William Thie ,  John M. Boyd ,  Fritz C. Redeker ,  Yezdi Dordi ,  John Parks ,  Tiruchirapalli Arunagiri ,  Aleksander Owczarz ,  Todd Balisky ,  Clint Thomas ,  Jacob Wylie ,  Alan M. Schoepp

IPC分类号： B05C11/00 ,  B05D1/28 ,  C23C18/16

CPC分类号： C23C18/1628 ,  Y10T137/87652

摘要： A chemical fluid handling system is defined to supply a number of chemicals to a number of fluid inputs of a mixing manifold. The chemical fluid handling system includes a number of fluid recirculation loops for separately pre-conditioning and controlling the supply of each of the number of chemicals. Each of the fluid recirculation loops is defined to degas, heat, and filter a particular one of the number of chemical components. The mixing manifold is defined to mix the number of chemicals to form the electroless plating solution. The mixing manifold includes a fluid output connected to a supply line. The supply line is connected to supply the electroless plating solution to a fluid bowl within an electroless plating chamber.

摘要翻译： 化学流体处理系统被定义为向混合歧管的多个流体输入提供多个化学品。 化学流体处理系统包括多个流体再循环回路，用于分别预处理和控制每个化学物质的供应。 每个流体循环回路被定义为对特定的一个化学成分进行脱气，加热和过滤。 混合歧管被定义为混合化学品的数量以形成化学镀溶液。 混合歧管包括连接到供应管线的流体输出。 供电线连接以将化学镀溶液供应到化学镀室内的流体碗。

公开(公告)号：US20120045897A1

公开(公告)日：2012-02-23

申请号：US13284709

申请日：2011-10-28

申请人： William Thie ,  John M. Boyd ,  Fritz C. Redeker ,  Yezdi Dordi ,  John Parks ,  Tiruchirapalli Arunagiri ,  Aleksander Owczarz ,  Todd Balisky ,  Clint Thomas ,  Jacob Wylie ,  Alan M. Schoepp

发明人： William Thie ,  John M. Boyd ,  Fritz C. Redeker ,  Yezdi Dordi ,  John Parks ,  Tiruchirapalli Arunagiri ,  Aleksander Owczarz ,  Todd Balisky ,  Clint Thomas ,  Jacob Wylie ,  Alan M. Schoepp

IPC分类号： H01L21/30

CPC分类号： H01L21/288 ,  C23C18/1619 ,  C23C18/1632 ,  H01L21/76873

摘要： A dry-in/dry-out system is disclosed for wafer electroless plating. The system includes an upper zone for wafer ingress/egress and drying operations. Proximity heads are provided in the upper zone to perform the drying operations. The system also includes a lower zone for electroless plating operations. The lower zone includes an electroless plating apparatus that implements a wafer submersion by fluid upwelling method. The upper and lower zones of the system are enclosed by a dual-walled chamber, wherein the inner wall is a chemically inert plastic and the outer wall is a structural metal. The system interfaces with a fluid handling system which provides the necessary chemistry supply and control for the system. The system is ambient controlled. Also, the system interfaces with an ambient controlled managed transfer module (MTM).

摘要翻译： 公开了一种用于晶片无电镀的干/干输出系统。 该系统包括用于晶片入口/出口和干燥操作的上部区域。 靠近头部设置在上部区域以执行干燥操作。 该系统还包括用于无电镀操作的下部区域。 下部区域包括通过流体上升流法实现晶片浸没的化学镀设备。 系统的上部和下部区域由双壁室围住，其中内壁是化学惰性塑料，外壁是结构金属。 系统与流体处理系统接口，为系统提供必要的化学物质供应和控制。 系统是环境控制的。 此外，系统与环境受控的托管传输模块（MTM）接口。

公开(公告)号：US20080142971A1

公开(公告)日：2008-06-19

申请号：US11638413

申请日：2006-12-14

申请人： Yezdi Dordi ,  John M. Boyd ,  Fritz C. Redeker ,  William Thie ,  Tiruchirapalli Arunagiri ,  Hyungsuk Alexander Yoon

发明人： Yezdi Dordi ,  John M. Boyd ,  Fritz C. Redeker ,  William Thie ,  Tiruchirapalli Arunagiri ,  Hyungsuk Alexander Yoon

IPC分类号： H01L23/52 ,  H01L21/4763

CPC分类号： H01L23/53238 ,  H01L21/28562 ,  H01L21/76846 ,  H01L21/76856 ,  H01L21/76862 ,  H01L21/76873 ,  H01L21/76874 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

摘要： An interconnect structure is provided, including a layer of dielectric material having at least one opening and a first barrier layer on sidewalls defining the opening. A ruthenium-containing second barrier layer overlays the first barrier layer, the second barrier layer having a ruthenium zone, a ruthenium oxide zone, and a ruthenium-rich zone. The ruthenium zone is interposed between the first barrier layer and the ruthenium oxide zone. The ruthenium oxide zone is interposed between the ruthenium zone and the ruthenium-rich zone.

摘要翻译： 提供互连结构，包括具有至少一个开口的介电材料层和在限定开口的侧壁上的第一阻挡层。 含钌的第二阻挡层覆盖第一阻挡层，第二阻挡层具有钌区，氧化钌区和富钌区。 钌区介于第一阻挡层和氧化钌区之间。 钌氧化物区位于钌区和富钌区之间。

公开(公告)号：US08485120B2

公开(公告)日：2013-07-16

申请号：US11735987

申请日：2007-04-16

申请人： William Thie ,  John M. Boyd ,  Fritz C. Redeker ,  Yezdi Dordi ,  John Parks ,  Tiruchirapalli Arunagiri ,  Aleksander Owczarz ,  Todd Balisky ,  Clint Thomas ,  Jacob Wylie ,  Alan M. Schoepp

发明人： William Thie ,  John M. Boyd ,  Fritz C. Redeker ,  Yezdi Dordi ,  John Parks ,  Tiruchirapalli Arunagiri ,  Aleksander Owczarz ,  Todd Balisky ,  Clint Thomas ,  Jacob Wylie ,  Alan M. Schoepp

IPC分类号： B05C11/00 ,  B05D1/28

CPC分类号： H01L21/02104 ,  C23C18/1619 ,  H01L21/67005 ,  H01L21/6715

摘要： A semiconductor wafer electroless plating apparatus includes a platen and a fluid bowl. The platen has a top surface defined to support a wafer, and an outer surface extending downward from a periphery of the top surface to a lower surface of the platen. The fluid bowl has an inner volume defined by an interior surface so as to receive the platen, and wafer to be supported thereon, within the inner volume. A seal is disposed around the interior surface of the fluid bowl so as to form a liquid tight barrier when engaged between the interior surface of the fluid bowl and the outer surface of the platen. A number of fluid dispense nozzles are positioned to dispense electroplating solution within the fluid bowl above the seal so as to rise up and flow over the platen, thereby flowing over the wafer when present on the platen.

摘要翻译： 半导体晶片化学镀设备包括压板和流体碗。 压板具有限定为支撑晶片的顶表面和从顶表面的周边向下延伸到压板的下表面的外表面。 流体碗具有由内表面限定的内部容积，以便在内部容积内容纳压板和要支撑在其上的晶片。 密封件设置在流体碗的内表面周围，以便当接合在流体碗的内表面和压板的外表面之间时形成液密屏障。 多个流体分配喷嘴被定位成在密封件上方的流体碗内分配电镀溶液，以便在压板上升起并流动，从而当存在于压板上时流过晶片。

公开(公告)号：US20080251148A1

公开(公告)日：2008-10-16

申请号：US11735989

申请日：2007-04-16

申请人： William Thie ,  John M. Boyd ,  Fritz C. Redeker ,  Yezdi Dordi ,  John Parks ,  Tiruchirapalli Arunagiri ,  Aleksander Owczarz ,  Todd Balisky ,  Clint Thomas ,  Jacob Wylie

发明人： William Thie ,  John M. Boyd ,  Fritz C. Redeker ,  Yezdi Dordi ,  John Parks ,  Tiruchirapalli Arunagiri ,  Aleksander Owczarz ,  Todd Balisky ,  Clint Thomas ,  Jacob Wylie

IPC分类号： B01F5/00

CPC分类号： C23C18/1628 ,  Y10T137/87652

摘要： A chemical fluid handling system is defined to supply a number of chemicals to a number of fluid inputs of a mixing manifold. The chemical fluid handling system includes a number of fluid recirculation loops for separately pre-conditioning and controlling the supply of each of the number of chemicals. Each of the fluid recirculation loops is defined to degas, heat, and filter a particular one of the number of chemical components. The mixing manifold is defined to mix the number of chemicals to form the electroless plating solution. The mixing manifold includes a fluid output connected to a supply line. The supply line is connected to supply the electroless plating solution to a fluid bowl within an electroless plating chamber.

摘要翻译： 化学流体处理系统被定义为向混合歧管的多个流体输入提供多个化学品。 化学流体处理系统包括多个流体再循环回路，用于分别预处理和控制每个化学物质的供应。 每个流体循环回路被定义为对特定的一个化学成分进行脱气，加热和过滤。 混合歧管被定义为混合化学品的数量以形成化学镀溶液。 混合歧管包括连接到供应管线的流体输出。 供电线连接以将化学镀溶液供应到化学镀室内的流体碗。

公开(公告)号：US20080057182A1

公开(公告)日：2008-03-06

申请号：US11611758

申请日：2006-12-15

申请人： John Boyd ,  Yezdi Dordi ,  Tiruchirapalli Arunagiri ,  Benjamin Mooring ,  John Parks ,  William Thie ,  Fritz Redeker ,  Arthur Howald ,  Alan Schoepp ,  David Hemker

发明人： John Boyd ,  Yezdi Dordi ,  Tiruchirapalli Arunagiri ,  Benjamin Mooring ,  John Parks ,  William Thie ,  Fritz Redeker ,  Arthur Howald ,  Alan Schoepp ,  David Hemker

IPC分类号： B05D5/12 ,  B05D1/36

CPC分类号： H01L21/67207 ,  H01L21/76843 ,  H01L21/76877

摘要： A method for filling a trench of a substrate in a controlled environment is provided. The method initiates with etching a trench in the substrate in a first chamber of a cluster tool. A barrier layer configured to prevent electromigration is deposited over an exposed surface of the trench in a second chamber of the cluster tool and the trench is filled with a gap fill material deposited directly onto the barrier layer in the cluster tool. A semiconductor device fabricated by the method is also provided.

摘要翻译： 提供了一种用于在受控环境中填充衬底的沟槽的方法。 该方法通过在簇工具的第一室中蚀刻衬底中的沟槽来启动。 构造成防止电迁移的阻挡层沉积在簇工具的第二腔中的沟槽的暴露表面上，并且沟槽填充有直接沉积在簇工具中的阻挡层上的间隙填充材料。 还提供了通过该方法制造的半导体器件。

公开(公告)号：US07592259B2

公开(公告)日：2009-09-22

申请号：US11641364

申请日：2006-12-18

申请人： Yezdi Dordi ,  John Boyd ,  Fritz Redeker ,  William Thie ,  Tiruchirapalli Arunagiri ,  Alex Yoon

发明人： Yezdi Dordi ,  John Boyd ,  Fritz Redeker ,  William Thie ,  Tiruchirapalli Arunagiri ,  Alex Yoon

IPC分类号： H01L21/44 ,  H01L21/4763

CPC分类号： C23C8/02 ,  C23C8/80 ,  C23C10/02 ,  C23C10/60 ,  C23C16/54 ,  C23C16/56 ,  C23C18/1601 ,  C23C18/1632 ,  C23C18/54 ,  C23C26/00 ,  C23C28/023 ,  C23C28/322 ,  C23C28/34 ,  C25D7/123 ,  C25D17/001 ,  H01L21/67161 ,  H01L21/67207 ,  H01L21/76855 ,  H01L21/76861 ,  H01L21/76862 ,  H01L21/76873

摘要： This invention pertains to methods and systems for fabricating semiconductor devices. One aspect of the present invention is a method of depositing a gapfill copper layer onto barrier layer for semiconductor device metallization. In one embodiment, the method includes forming the barrier layer on a surface of a substrate and subjecting the barrier layer to a process condition so as to form a removable passivated surface on the barrier layer. The method further includes removing the passivated surface from the barrier layer and depositing the gapfill copper layer onto the barrier layer. Another aspect of the present invention is an integrated system for depositing a copper layer onto a barrier layer for semiconductor device metallization. In one embodiment, the integrated system comprises at least one process module configured for barrier layer deposition and passivated surface formation and at least one other process module configured for passivated surface removal and deposition of copper onto the barrier layer. The system further includes at least one transfer module coupled so that the substrate can be transferred between the modules substantially without exposure to an oxide-forming environment.

摘要翻译： 本发明涉及用于制造半导体器件的方法和系统。 本发明的一个方面是在用于半导体器件金属化的阻挡层上沉积间隙填充铜层的方法。 在一个实施例中，该方法包括在衬底的表面上形成阻挡层，并使阻挡层经受处理条件，以便在阻挡层上形成可移除的钝化表面。 该方法还包括从阻挡层去除钝化表面并将间隙填充铜层沉积到阻挡层上。 本发明的另一方面是用于在用于半导体器件金属化的阻挡层上沉积铜层的集成系统。 在一个实施例中，集成系统包括被配置用于阻挡层沉积和钝化表面形成的至少一个工艺模块和被配置用于钝化表面去除和沉积到阻挡层上的至少一个其它工艺模块。 所述系统还包括至少一个传送模块，所述至少一个传送模块被耦合，使得所述衬底可以在所述模块之间基本上不被暴露于形成氧化物的环境

公开(公告)号：US08133812B2

公开(公告)日：2012-03-13

申请号：US12562955

申请日：2009-09-18

申请人： Yezdi Dordi ,  John Boyd ,  Fritz Redeker ,  William Thie ,  Tiruchirapalli Arunagiri ,  Alex Yoon

发明人： Yezdi Dordi ,  John Boyd ,  Fritz Redeker ,  William Thie ,  Tiruchirapalli Arunagiri ,  Alex Yoon

IPC分类号： H01L21/44 ,  H01L21/4763

CPC分类号： C23C8/02 ,  C23C8/80 ,  C23C10/02 ,  C23C10/60 ,  C23C16/54 ,  C23C16/56 ,  C23C18/1601 ,  C23C18/1632 ,  C23C18/54 ,  C23C26/00 ,  C23C28/023 ,  C23C28/322 ,  C23C28/34 ,  C25D7/123 ,  C25D17/001 ,  H01L21/67161 ,  H01L21/67207 ,  H01L21/76855 ,  H01L21/76861 ,  H01L21/76862 ,  H01L21/76873

摘要： This invention pertains to methods and systems for fabricating semiconductor devices. One aspect of the present invention is a method of depositing a gapfill copper layer onto a barrier layer for semiconductor device metallization. In one embodiment, the method includes forming the barrier layer on a surface of a substrate and subjecting the barrier layer to a process condition so as to form a removable passivated surface on the barrier layer. The method further includes removing the passivated surface from the barrier layer and depositing the gapfill copper layer onto the barrier layer. Another aspect of the present invention is an integrated system for depositing a copper layer onto a barrier layer for semiconductor device metallization. In one embodiment, the integrated system comprises at least one process module configured for barrier layer deposition and passivated surface formation and at least one other process module configured for passivated surface removal and deposition of copper onto the barrier layer. The system further includes at least one transfer module coupled so that the substrate can be transferred between the modules substantially without exposure to an oxide-forming environment.

摘要翻译： 本发明涉及用于制造半导体器件的方法和系统。 本发明的一个方面是在用于半导体器件金属化的阻挡层上沉积间隙填充铜层的方法。 在一个实施例中，该方法包括在衬底的表面上形成阻挡层，并使阻挡层经受处理条件，以便在阻挡层上形成可移除的钝化表面。 该方法还包括从阻挡层去除钝化表面并将间隙填充铜层沉积到阻挡层上。 本发明的另一方面是用于在用于半导体器件金属化的阻挡层上沉积铜层的集成系统。 在一个实施例中，集成系统包括被配置用于阻挡层沉积和钝化表面形成的至少一个工艺模块和被配置用于钝化表面去除和沉积到阻挡层上的至少一个其它工艺模块。 所述系统还包括至少一个传送模块，所述至少一个传送模块被耦合，使得所述衬底可以在所述模块之间基本上不被暴露于形成氧化物的环境

公开(公告)号：US20080146025A1

公开(公告)日：2008-06-19

申请号：US11641364

申请日：2006-12-18

申请人： Yezdi Dordi ,  John Boyd ,  Fritz Redeker ,  William Thie ,  Tiruchirapalli Arunagiri ,  Alex Yoon

发明人： Yezdi Dordi ,  John Boyd ,  Fritz Redeker ,  William Thie ,  Tiruchirapalli Arunagiri ,  Alex Yoon

IPC分类号： H01L21/4763 ,  C25D3/38

CPC分类号： C23C8/02 ,  C23C8/80 ,  C23C10/02 ,  C23C10/60 ,  C23C16/54 ,  C23C16/56 ,  C23C18/1601 ,  C23C18/1632 ,  C23C18/54 ,  C23C26/00 ,  C23C28/023 ,  C23C28/322 ,  C23C28/34 ,  C25D7/123 ,  C25D17/001 ,  H01L21/67161 ,  H01L21/67207 ,  H01L21/76855 ,  H01L21/76861 ,  H01L21/76862 ,  H01L21/76873

摘要： This invention pertains to methods and systems for fabricating semiconductor devices. One aspect of the present invention is a method of depositing a gapfill copper layer onto barrier layer for semiconductor device metallization. In one embodiment, the method includes forming the barrier layer on a surface of a substrate and subjecting the barrier layer to a process condition so as to form a removable passivated surface on the barrier layer. The method further includes removing the passivated surface from the barrier layer and depositing the gapfill copper layer onto the barrier layer. Another aspect of the present invention is an integrated system for depositing a copper layer onto a barrier layer for semiconductor device metallization. In one embodiment, the integrated system comprises at least one process module configured for barrier layer deposition and passivated surface formation and at least one other process module configured for passivated surface removal and deposition of copper onto the barrier layer. The system further includes at least one transfer module coupled so that the substrate can be transferred between the modules substantially without exposure to an oxide-forming environment.

摘要翻译： 本发明涉及用于制造半导体器件的方法和系统。 本发明的一个方面是在用于半导体器件金属化的阻挡层上沉积间隙填充铜层的方法。 在一个实施例中，该方法包括在衬底的表面上形成阻挡层，并使阻挡层经受处理条件，以便在阻挡层上形成可移除的钝化表面。 该方法还包括从阻挡层去除钝化表面并将间隙填充铜层沉积到阻挡层上。 本发明的另一方面是用于在用于半导体器件金属化的阻挡层上沉积铜层的集成系统。 在一个实施例中，集成系统包括被配置用于阻挡层沉积和钝化表面形成的至少一个工艺模块和被配置用于钝化表面去除和沉积到阻挡层上的至少一个其它工艺模块。 所述系统还包括至少一个传送模块，所述至少一个传送模块被耦合，使得所述基板可以在所述模块之间基本上不被暴露于氧化物形成环境中。

公开(公告)号：US20100009535A1

公开(公告)日：2010-01-14

申请号：US12562955

申请日：2009-09-18

申请人： Yezdi Dordi ,  John Boyd ,  Fritz Redeker ,  William Thie ,  Tiruchirapalli Arunagiri ,  Alex Yoon

发明人： Yezdi Dordi ,  John Boyd ,  Fritz Redeker ,  William Thie ,  Tiruchirapalli Arunagiri ,  Alex Yoon

IPC分类号： H01L21/768 ,  C23C16/00 ,  C25B9/00

CPC分类号： C23C8/02 ,  C23C8/80 ,  C23C10/02 ,  C23C10/60 ,  C23C16/54 ,  C23C16/56 ,  C23C18/1601 ,  C23C18/1632 ,  C23C18/54 ,  C23C26/00 ,  C23C28/023 ,  C23C28/322 ,  C23C28/34 ,  C25D7/123 ,  C25D17/001 ,  H01L21/67161 ,  H01L21/67207 ,  H01L21/76855 ,  H01L21/76861 ,  H01L21/76862 ,  H01L21/76873

摘要： This invention pertains to methods and systems for fabricating semiconductor devices. One aspect of the present invention is a method of depositing a gapfill copper layer onto a barrier layer for semiconductor device metallization. In one embodiment, the method includes forming the barrier layer on a surface of a substrate and subjecting the barrier layer to a process condition so as to form a removable passivated surface on the barrier layer. The method further includes removing the passivated surface from the barrier layer and depositing the gapfill copper layer onto the barrier layer. Another aspect of the present invention is an integrated system for depositing a copper layer onto a barrier layer for semiconductor device metallization. In one embodiment, the integrated system comprises at least one process module configured for barrier layer deposition and passivated surface formation and at least one other process module configured for passivated surface removal and deposition of copper onto the barrier layer. The system further includes at least one transfer module coupled so that the substrate can be transferred between the modules substantially without exposure to an oxide-forming environment.

摘要翻译： 本发明涉及用于制造半导体器件的方法和系统。 本发明的一个方面是在用于半导体器件金属化的阻挡层上沉积间隙填充铜层的方法。 在一个实施例中，该方法包括在衬底的表面上形成阻挡层，并使阻挡层经受处理条件，以便在阻挡层上形成可移除的钝化表面。 该方法还包括从阻挡层去除钝化表面并将间隙填充铜层沉积到阻挡层上。 本发明的另一方面是用于在用于半导体器件金属化的阻挡层上沉积铜层的集成系统。 在一个实施例中，集成系统包括被配置用于阻挡层沉积和钝化表面形成的至少一个工艺模块和被配置用于钝化表面去除和沉积到阻挡层上的至少一个其它工艺模块。 所述系统还包括至少一个传送模块，所述至少一个传送模块被耦合，使得所述衬底可以在所述模块之间基本上不被暴露于形成氧化物的环境