Abstract:
A phase locked loop that generates an internal clock by controlling a delay time of a delay cell according to conditions of PVT, thereby improving a jitter characteristic of the internal clock. The delay cell includes a first current controller for controlling first and second currents in response to a control voltage, and a second current controller for controlling the first and second currents in response to frequency range selection signals. The phase locked loop includes a phase comparator for comparing a reference clock with a feedback clock, a control voltage generator for generating a control voltage corresponding to an output of the phase comparator, and a voltage controlled oscillator for generating an internal clock having a frequency in response to the control voltage and one or more frequency range control signals, wherein the feedback clock is generated using the internal clock.
Abstract:
Semiconductor memory devices and a method thereof are provided. An example semiconductor memory device may include a control signal generation unit configured to generate a plurality of control signals in response to a bias current, a reference current generation unit configured to generate a reference current in response to the plurality of control signals and a sense amplifier configured to sense and amplify data stored in a given memory cell based on the reference current and a current on a bit line connected to the memory cell. Another example semiconductor memory device may include a memory bank including a plurality of memory cells and a sense amplifier bank including a plurality of sense amplifier units sharing a common line, each of the sense amplifier units including a current source configured to form a current path between the common line and a first voltage supply in response to an enable signal and a gating signal and a sense amplifier configured to sense and amplify data stored in a corresponding memory cell among the plurality of memory cells based on a signal on a bit line connected with the corresponding memory cell and a signal on the common line.
Abstract:
The invention relates to a voltage regulator for operation of a semiconductor memory device. In embodiments, the voltage regulator includes a standby regulator unit and an active regulating unit. Embodiments of the invention decouple the operation of the standby regulating unit and the active regulating unit of a voltage regulator so that both can operate simultaneously, for example during a read operation. In embodiments of the invention, the standby regulating unit includes a short pulse generator and a feedback loop to disable the standby regulating unit for a predetermined amount of time.
Abstract:
The present invention relates to a dishwasher. In more detail, the present invention provides a dishwasher including a sump housing for holding washing water, a washing water pumping unit for pumping the washing water, a drain chamber for receiving the washing water pumped thus, a soil chamber for receiving the washing water through the drain chamber, a guide assembly for guiding the washing water pumped thus to be provided to the soil chamber via the drain chamber, and a sump cover covered on an upper surface of the sump housing for filtering the washing water overflowed from the soil chamber, thereby filtering the washing water effectively, and improving recovery ratio of the washing water to reduce consumption of the washing water and power.
Abstract:
A NOR flash memory is disclosed including a memory cell, sense amplifier output driver, and control circuit. A sense period for a sense operation performed by the sense amplifier is made synchronous with a clock signal so as to avoid power supply or ground signal noise generated by operation of the output driver.
Abstract:
The present invention discloses an on die termination circuit. The on die termination circuit used in a DDR2 employs transmission gates as pull-up and pull-down switches, equalizes pull-up and pull-down resistance values by changing connection relations between switches and resistors, and maintains a constant voltage of an input pin.
Abstract:
A flash memory device includes a memory cell array including a plurality of memory cells. The flash memory device also includes a voltage generating circuit which generates a plurality of constant voltages to be applied to the memory cell array, the voltage generating circuit including a plurality of voltage regulators which generate at least two constant voltages, each having a constant voltage difference.
Abstract:
A method for forming a feature in an etch layer is provided. A photoresist layer is formed over the etch layer. The photoresist layer is patterned to form photoresist features with photoresist sidewalls. A control layer is formed over the photoresist layer and bottoms of the photoresist features. A conformal layer is deposited over the sidewalls of the photoresist features and control layer to reduce the critical dimensions of the photoresist features. Openings in the control layer are opened with a control layer breakthrough chemistry. Features are etched into the etch layer with an etch chemistry, which is different from the control layer break through chemistry, wherein the control layer is more etch resistant to the etch with the etch chemistry than the conformal layer.
Abstract:
Provided is a dishwasher having an improved structure. The dishwasher includes a sump for collecting washing water for washing a contaminated dish, and a main motor for circulating the washing water collected in the sump. Furthermore, the dishwasher includes a washing pump having an impeller connected with the main motor to pump the washing water, and a discharge pump disposed at a predetermined portion of the sump for discharging the washing water. Also in the dishwasher, a lower housing having a contaminant chamber is disposed on a substantially same plane as the impeller for filtering some of the washing water. According to the present invention, the dishwasher can increase the dishwashing space and discharge contaminant in an inside of the dishwasher with ease.
Abstract:
A dishwasher for completely collecting used wash water into a sump is disclosed, the dishwasher including a housing; a tub provided in the housing and receiving dishes to be washed; a sump provided at the tub so as to receive wash water and including an upper end configured not to protrude from a bottom surface of the tub; and a sprayer mounted in the tub so as to spray the wash water of the sump on the dishes.