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    Apparatus and method for generating ions of an ion implanter
    31.
    发明申请
    Apparatus and method for generating ions of an ion implanter 有权
    用于产生离子注入机离子的装置和方法

    公开(公告)号：US20070152165A1

    公开(公告)日：2007-07-05

    申请号：US11453075

    申请日：2006-06-15

    Applicant: Seong Gu Kim ,  Jai Kwang Shin ,  Jae Joon Oh

    Inventor： Seong Gu Kim ,  Jai Kwang Shin ,  Jae Joon Oh

    IPC: H01J27/00

    CPC classification number: H01J37/08 ,  H01J27/024 ,  H01J27/08 ,  H01J37/3171

    Abstract: An ion generator of an ion implanter, the ion generator includes: an arc chamber provided with a slit for ion extraction and forming an equipotential surface with a first voltage; a filament installed inside of the arc chamber, heated to a predetermined temperature and generating electrons; magnetic field devices provided outside of the arc chamber and supplied with a current from a current source and generating a magnetic field in the arc chamber; a gas discharge device injecting a predetermined gas into the arc chamber; and an electrode positioned opposite to the slit and supplied with a second voltage having a high voltage than the first voltage from a voltage source and generating a magnetic field in the arc chamber.

    Abstract translation: 离子注入机的离子发生器，所述离子发生器包括：电弧室，设置有用于离子提取的狭缝并形成具有第一电压的等电位面; 安装在电弧室内的灯丝，加热到预定温度并产生电子; 磁场装置设置在电弧室外部，并从电流源提供电流并在电弧室中产生磁场; 将预定气体注入到电弧室中的气体放电装置; 以及电极，与所述狭缝相对设置，并且从电压源提供具有比所述第一电压高的电压的第二电压并在所述电弧室中产生磁场。

    Plasma doping method and plasma doping apparatus for performing the same
    32.
    发明申请
    Plasma doping method and plasma doping apparatus for performing the same 审中-公开
    等离子体掺杂法和等离子体掺杂装置

    公开(公告)号：US20070087584A1

    公开(公告)日：2007-04-19

    申请号：US11542639

    申请日：2006-10-04

    Applicant: Gyeong-Su Keum ,  Ji-Hyun Hur ,  Jai-Hyung Won ,  No-Hyun Huh ,  Jae-Joon Oh

    Inventor： Gyeong-Su Keum ,  Ji-Hyun Hur ,  Jai-Hyung Won ,  No-Hyun Huh ,  Jae-Joon Oh

    IPC: H01L21/31 ,  H01L21/469 ,  H01L29/76 ,  H01L29/94 ,  H01L31/00

    CPC classification number: H01J37/32422 ,  H01J37/32412 ,  H01J37/32577 ,  H01L21/2236

    Abstract: In a method of doping ions into an object, such as a substrate, using plasma, a doping gas may be provided between first and second electrodes in a chamber. An electric field may be formed between the first and the second electrodes to excite the doping gas to a plasma state. The electric field may be formed by applying a first power having a first positive electric potential and a second power having a second positive electric potential, the second positive electric potential being higher than the first positive electric potential. The electric field may be reversed in direction by blocking the second power from being applied to the second electrode. Accumulated ions on the substrate may be effectively neutralized by introducing electrons toward the substrate so that arcing generation may be prevented.

    Abstract translation: 在使用等离子体将离子掺杂到诸如衬底的物体的方法中，可以在腔室中的第一和第二电极之间提供掺杂气体。 可以在第一和第二电极之间形成电场，以将掺杂气体激发到等离子体状态。 电场可以通过施加具有第一正电位的第一电力和具有第二正电位的第二电力而形成，第二正电位高于第一正电位。 电场可以通过阻止第二功率施加到第二电极而在方向上反转。 可以通过向基板引入电子来有效地中和衬底上的累积离子，从而可以防止产生电弧。

    Power electronic devices, methods of manufacturing the same, and integrated circuit modules including the same
    35.
    发明授权
    Power electronic devices, methods of manufacturing the same, and integrated circuit modules including the same 有权
    电力电子装置及其制造方法以及包括其的集成电路模块

    公开(公告)号：US08513705B2

    公开(公告)日：2013-08-20

    申请号：US12923126

    申请日：2010-09-03

    Applicant: Jong-seob Kim ,  Ki-ha Hong ,  Jae-joon Oh ,  Hyuk-soon Choi ,  In-jun Whang ,  Jai-kwang Shin

    Inventor： Jong-seob Kim ,  Ki-ha Hong ,  Jae-joon Oh ,  Hyuk-soon Choi ,  In-jun Whang ,  Jai-kwang Shin

    IPC: H01L29/778 ,  H01L21/335

    CPC classification number: H01L29/207 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787

    Abstract: Power electronic devices including 2-dimensional electron gas (2DEG) channels and methods of manufacturing the same. A power electronic device includes lower and upper material layers for forming a 2DEG channel, and a gate contacting an upper surface of the upper material layer. A region below the gate of the 2DEG channel is an off region where the density of a 2DEG is reduced or zero. The entire upper material layer may be continuous and may have a uniform thickness. A region of the upper material layer under the gate contains an impurity for reducing or eliminating a lattice constant difference between the lower and upper material layers.

    Abstract translation: 包括二维电子气体（2DEG）通道的电力电子装置及其制造方法。 电力电子设备包括用于形成2DEG通道的下部和上部材料层，以及与上部材料层的上表面接触的栅极。 2DEG通道的栅极下方的区域是2DEG的密度减小或为零的截止区域。 整个上部材料层可以是连续的并且可以具有均匀的厚度。 在栅极下方的上部材料层的区域包含用于减少或消除下部和上部材料层之间的晶格常数差的杂质。

    HIGH ELECTRON MOBILITY TRANSISTOR HAVING REDUCED THRESHOLD VOLTAGE VARIATION AND METHOD OF MANUFACTURING THE SAME
    36.
    发明申请
    HIGH ELECTRON MOBILITY TRANSISTOR HAVING REDUCED THRESHOLD VOLTAGE VARIATION AND METHOD OF MANUFACTURING THE SAME 有权
    具有降低的阈值电压变化的高电子动力晶体管及其制造方法

    公开(公告)号：US20130099285A1

    公开(公告)日：2013-04-25

    申请号：US13517815

    申请日：2012-06-14

    Applicant: In-jun Hwang ,  Jae-joon Oh ,  Jae-won Lee ,  Hyo-ji Choi

    Inventor： In-jun Hwang ,  Jae-joon Oh ,  Jae-won Lee ,  Hyo-ji Choi

    IPC: H01L29/778

    CPC classification number: H01L29/2003 ,  H01L29/1029 ,  H01L29/1608 ,  H01L29/42316 ,  H01L29/42376 ,  H01L29/7786 ,  H01L29/7789

    Abstract: According to example embodiments a transistor includes a channel layer on a substrate, a first channel supply layer on the channel, a depletion layer, a second channel supply layer, source and drain electrodes on the first channel supply layer, and a gate electrode on the depletion layer. The channel includes a 2DEG channel configured to generate a two-dimensional electron gas and a depletion area. The first channel supply layer corresponds to the 2DEG channel and defines an opening that exposes the depletion area. The depletion layer is on the depletion area of the channel layer. The second channel supply layer is between the depletion layer and the depletion area.

    Abstract translation: 根据示例性实施例，晶体管包括衬底上的沟道层，沟道上的第一沟道供应层，耗尽层，第二沟道供应层，第一沟道供应层上的源电极和漏电极，以及栅电极 耗尽层 通道包括被配置为产生二维电子气和耗尽区的2DEG通道。 第一通道供应层对应于2DEG通道并且限定暴露耗尽区的开口。 耗尽层在通道层的耗尽区上。 第二通道供应层位于耗尽层和耗尽区之间。

    POWER ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME
    38.
    发明申请
    POWER ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    电力电子设备及其制造方法

    公开(公告)号：US20120037958A1

    公开(公告)日：2012-02-16

    申请号：US13208671

    申请日：2011-08-12

    Applicant: In-jun Hwang ,  Jai-kwang Shin ,  Jae-joon Oh ,  Jong-seob Kim ,  Hyuk-soon Choi ,  Ki-ha Hong

    Inventor： In-jun Hwang ,  Jai-kwang Shin ,  Jae-joon Oh ,  Jong-seob Kim ,  Hyuk-soon Choi ,  Ki-ha Hong

    IPC: H01L29/778 ,  H01L21/335

    CPC classification number: H01L29/7787 ,  H01L29/2003 ,  H01L29/408 ,  H01L29/66462

    Abstract: According to an example embodiment, a power electronic device includes a first semiconductor layer, a second semiconductor layer on a first surface of the first semiconductor layer, and a source, a drain, and a gate on the second semiconductor layer. The source, drain and gate are separate from one another. The power electronic device further includes a 2-dimensional electron gas (2DEG) region at an interface between the first semiconductor layer and the second semiconductor layer, a first insulating layer on the gate and a second insulating layer adjacent to the first insulating layer. The first insulating layer has a first dielectric constant and the second insulating layer has a second dielectric constant less than the first dielectric constant.

    Abstract translation: 根据示例性实施例，功率电子器件包括第一半导体层，第一半导体层的第一表面上的第二半导体层以及第二半导体层上的源极，漏极和栅极。 源极，漏极和栅极彼此分开。 电力电子设备还包括在第一半导体层和第二半导体层之间的界面处的二维电子气体（2DEG）区域，栅极上的第一绝缘层和与第一绝缘层相邻的第二绝缘层。 第一绝缘层具有第一介电常数，第二绝缘层具有小于第一介电常数的第二介电常数。

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