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    Integrated circuit structure formed by damascene process
    31.
    发明申请
    Integrated circuit structure formed by damascene process 有权

    公开(公告)号：US20050051818A1

    公开(公告)日：2005-03-10

    申请号：US10655666

    申请日：2003-09-05

    Applicant: Mark Tuttle

    Inventor： Mark Tuttle

    IPC: G11B5/147 ,  G11C11/00 ,  G11C11/15 ,  H01L31/113 ,  H01L43/12

    CPC classification number: H01L43/12

    Abstract: An integrated circuit structure is formed using a damascene process that involves forming a trench or cavity for the structure in a temporary layer of material. A conductive material, such as copper, can then be deposited on the temporary layer to overfill the trench or cavity, and the excess conductive material can be removed by polishing down to the surface of the temporary layer. The integrated circuit structure can then be exposed by removing the temporary layer. One example of an integrated circuit structure that can be formed using this method is an upper electrode in an MRAM array. By using the process to form an upper electrode in an MRAM array, the process of forming a magnetic keeper around the upper electrode is advantageously simplified.

    Radio Frequency Identification Device Operating Methods, Radio Frequency Identification Device Configuration Methods, and Radio Frequency Identification Devices
    33.
    发明申请
    Radio Frequency Identification Device Operating Methods, Radio Frequency Identification Device Configuration Methods, and Radio Frequency Identification Devices 失效
    射频识别装置操作方法，射频识别装置配置方法和射频识别装置

    公开(公告)号：US20080100422A1

    公开(公告)日：2008-05-01

    申请号：US11968561

    申请日：2008-01-02

    Applicant: Mark Tuttle ,  John Tuttle

    Inventor： Mark Tuttle ,  John Tuttle

    IPC: H04Q5/22

    CPC classification number: H01Q1/2225 ,  G01S13/767 ,  G01S13/78 ,  G06K7/10346 ,  G06K19/0723 ,  G06K19/0726 ,  G06K19/07749 ,  H01Q1/22 ,  H01Q7/00

    Abstract: An adjustable radio frequency data communications device has a monolithic semiconductor integrated circuit with integrated circuitry, interrogation receiving circuitry provided on the monolithic integrated circuit forming at least part of the integrated circuitry and configured to receive an interrogation signal from the interrogator unit, an antenna electrically coupled to the interrogation receiving circuitry and configured to communicate with the remote interrogator unit, a power source electrically coupled to the integrated circuitry and configured to generate operating power for the communications device, and at least one of the antenna and the interrogation receiving circuitry having reconfigurable electrical characteristics, the electrical characteristics being reconfigurable to selectively tune the at least one of the antenna and the interrogation receiving circuitry within a range of tuned and detuned states to realize a desired receiver sensitivity of the communications device. Additionally, a method for tuning receiver sensitivity and/or transmitter sensitivity according to construction of the above device is disclosed.

    Abstract translation: 一种可调节射频数据通信设备具有集成电路的单片半导体集成电路，在单片集成电路上提供的询问接收电路，其形成集成电路的至少一部分并且被配置为从询问器单元接收询问信号，天线电耦合 所述询问接收电路被配置为与所述远程询问器单元通信;电源，其耦合到所述集成电路并且被配置为生成所述通信设备的操作功率，并且所述天线和所述询问接收电路中的至少一个具有可重新配置的电 特性，电特性是可重构的，以在调谐和失谐状态的范围内选择性地调谐天线和询问接收电路中的至少一个，以实现通信设备的期望接收机灵敏度 e。 此外，公开了根据上述装置的结构来调整接收机灵敏度和/或发射机灵敏度的方法。

    Interconnect for testing semiconductor components
    37.
    发明授权
    Interconnect for testing semiconductor components 有权

    公开(公告)号：US07304491B2

    公开(公告)日：2007-12-04

    申请号：US11516328

    申请日：2006-09-06

    Applicant: Warren M. Farnworth ,  Mark Tuttle

    Inventor： Warren M. Farnworth ,  Mark Tuttle

    IPC: G01R31/26

    CPC classification number: G01R31/2886

    Abstract: An interconnect for testing semiconductor components includes interconnect contacts configured for bonding to, and then separation from component contacts on the components. The interconnect can be utilized with a method that includes the steps of bonding the interconnect to the component to form bonded electrical connections, applying test signals through the bonded electrical connections, and then separating the interconnect from the component. The bonding step can be performed using metallurgical bonding, and the separating step can be performed using solder-wettable and solder non-wettable metal layers on the interconnect or the component. During the separating step the solder-wettable layers are dissolved, reducing adhesion of the bonded electrical connections, and permitting separation of the component and interconnect.

    MAGNETIC TUNNELING JUNCTION ANTIFUSE DEVICE
    38.
    发明申请
    MAGNETIC TUNNELING JUNCTION ANTIFUSE DEVICE 有权
    磁铁隧道防爆装置

    公开(公告)号：US20070127303A1

    公开(公告)日：2007-06-07

    申请号：US11626256

    申请日：2007-01-23

    Applicant: Mirmajid Seyyedy ,  Mark Tuttle ,  Glen Hush

    Inventor： Mirmajid Seyyedy ,  Mark Tuttle ,  Glen Hush

    IPC: G11C17/18

    CPC classification number: H01L27/222 ,  G11C11/005 ,  G11C11/15 ,  G11C17/16 ,  G11C17/165 ,  H01L23/5252 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: An MRAM device having a plurality of MRAM cells formed of a fixed magnetic layer, a second soft magnetic layer and a dielectric layer interposed between the fixed magnetic layer and the soft magnetic layer. The MRAM cells are all formed simultaneously and at least some of the MRAM cells are designed to function as antifuse devices whereby the application of a selected electrical potential can short the antifuse device to thereby affect the functionality of the MRAM device.

    Abstract translation: 具有由固定磁性层形成的多个MRAM单元的MRAM器件，第二软磁性层和介于该固定磁性层与软磁性层之间的电介质层。 MRAM单元都是同时形成的，并且至少一些MRAM单元被设计为用作反熔丝器件，由此施加所选择的电位可以使反熔丝器件短路从而影响MRAM器件的功能。

    Method for testing semiconductor components using bonded electrical connections
    39.
    发明申请
    Method for testing semiconductor components using bonded electrical connections 有权

    公开(公告)号：US20070126459A1

    公开(公告)日：2007-06-07

    申请号：US11698678

    申请日：2007-01-26

    Applicant: Warren Farnworth ,  Mark Tuttle

    Inventor： Warren Farnworth ,  Mark Tuttle

    IPC: G01R31/26

    CPC classification number: G01R31/2886

    Abstract: A method for testing a semiconductor component includes the steps of bonding an interconnect to the component to form bonded electrical connections, applying test signals through the bonded electrical connections, and then separating the interconnect from the component. The bonding step can be performed using metallurgical bonding, and the separating step can be performed using solder-wettable and solder non-wettable metal layers on the interconnect or the component. During the separating step the solder-wettable layers are dissolved, reducing adhesion of the bonded electrical connections, and permitting separation of the component and interconnect. The interconnect includes interconnect contacts configured for bonding to, and then separation from component contacts on the components. A system includes the interconnect, an alignment system for aligning the substrate to the interconnect, a bonding system for bonding the component to the interconnect, and a heating system for heating the component and the interconnect for separation.

    Electronic communication devices, methods of forming electrical communication devices, and communications methods
    40.
    发明申请
    Electronic communication devices, methods of forming electrical communication devices, and communications methods 有权
    电子通信装置，形成电通信装置的方法和通信方法

    公开(公告)号：US20070007345A1

    公开(公告)日：2007-01-11

    申请号：US11519246

    申请日：2006-09-11

    Applicant: Mark Tuttle

    Inventor： Mark Tuttle

    IPC: G06K7/00

    CPC classification number: G06K7/0008 ,  G06K19/07749 ,  G06K19/07771 ,  G06K19/07786

    Abstract: The present invention provides electronic communication devices, methods of forming electrical communication devices, and communications methods. An electronic communication device adapted to receive electronic signals includes: a housing comprising a substrate and an encapsulant; an integrated circuit provided within the housing and comprising transponder circuitry operable to communicate an identification signal responsive to receiving a polling signal; an antenna provided within the housing and being coupled with the transponder circuitry; and a ground plane provided within the housing and being spaced from the antenna and configured to shield some of the electronic signals from the antenna and reflect others of the electronic signals towards the antenna. A method of forming an electronic signal communication device includes providing a substrate having a support surface; providing a conductive layer adjacent at least a portion of the support surface; providing a dielectric layer over the conductive layer; providing an antenna over the dielectric layer; coupling an integrated circuit with the antenna; and encapsulating the antenna, the dielectric layer, and the integrated circuit using a flowable encapsulant.

    Abstract translation: 本发明提供电子通信设备，形成电通信设备的方法和通信方法。 适于接收电子信号的电子通信设备包括：壳体，包括衬底和密封剂; 设置在所述外壳内的集成电路，包括响应于接收到轮询信号而传送识别信号的应答器电路; 设置在壳体内并与应答器电路耦合的天线; 以及设置在壳体内并与天线间隔开并被配置为将一些电子信号与天线隔离并将其它电子信号反射向天线的接地平面。 一种形成电子信号通信装置的方法包括提供具有支撑表面的基板; 提供邻近所述支撑表面的至少一部分的导电层; 在所述导电层上提供介电层; 在电介质层上提供天线; 将集成电路与天线耦合; 并使用可流动的密封剂封装天线，电介质层和集成电路。

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