Abstract:
An inkjet print head and a manufacturing method thereof capable of simplifying a manufacturing process without performing an additional process to form a heater layer that includes a substrate, a heating element stacked on the substrate to heat the ink, a transistor having a gate electrode to drive the heating element, a chamber layer to form an ink chamber filled with the ink above the heating element, and a nozzle layer stacked on the chamber layer to form a nozzle to eject the ink, wherein the gate electrode and the heating element include a metal silicide film formed through a salicide process.
Abstract:
Disclosed is a catalytic cracking process for the production of light olefins from a hydrocarbon feedstock using fast fluidization, which is a preferred process for more efficiently increasing the production of light olefin hydrocarbons. According to this invention, a fast fluidization regime is applied to a fluidized bed catalytic cracking process of producing light olefins using zeolite, such that a volume fraction and distribution of the catalyst sufficient to induce the catalytic cracking reaction can be provided, thus effectively enhancing the production of light olefin hydrocarbons, in particular, ethylene and propylene, at high selectivity.
Abstract:
An inkjet printer head includes a substrate, an insulating layer having a groove and disposed on the substrate, a heating member having a concavely curved upper surface and disposed on an upper portion of the groove, an electrode to make contact with the heating member to apply electric current to the heating member, a chamber layer disposed on the heating member, and a nozzle layer having one or more nozzles and disposed on the chamber layer. According to the inkjet printer head, the heating member has a curved structure to increase a length of the heating member, so that resistance of the heating member can be increased. Thus, the heating member can stably operate regardless of current variation applied thereto, and the printing work can be performed.
Abstract:
There is provided a bipolar transistor (with a respective fabrication method) that provides superior noise characteristics and gain diffusion. The fabricating method includes forming a first base region at a collector region, which in turn is formed on a substrate. A first silicon layer is formed on the base region, and a second silicon layer is formed on the first silicon layer using a forming method different from the method used in forming the first silicon layer. An emitter region is then formed from impurities at the base region by performing a thermal process.
Abstract:
Provided is a modulation-index adjustable amplitude shift keying (ASK) transmitter including: a bias current supply unit supplying one or more bias currents in response to a digital signal that is to be transmitted and one or more bias current control signals; and a modulation signal generator generating a modulation signal corresponding to the digital signal by modulating a carrier signal in response to the one or more bias currents.
Abstract:
A user terminal, an image display device, and a method for adjusting a light source thereof, are provided. A user terminal is connected with an image display device and comprises a first interface unit which receives a color coordinate of an ambient light; a second interface unit which receives a color coordinate of an internal light source of the image display device; and a control unit which calculates a luminance value from the received color coordinate of the ambient light and the received color coordinate of the internal light source, and transmits the calculated luminance value to the image display device via the second interface unit. The image display device adjusts the internal light source of the image display device based on the calculated luminance value. Thus, the light source of a backlight unit can be adjusted based on the ambient light.
Abstract:
A photo-detecting device includes a buried doping layer of a first conductivity type and disposed at an upper portion of a silicon substrate. A first silicon epitaxial layer of first conductivity type is disposed on the buried doping layer, and a second silicon epitaxial layer of second conductivity type is disposed on the first silicon epitaxial layer. An isolation doping layer doped of first conductivity type is disposed at a predetermined region of the second silicon epitaxial layer to define a body region of second conductivity type. A silicon germanium epitaxial layer of second conductivity type is disposed on the body region.
Abstract:
A system for sensing an alarm indicating a failure happening on a trunk in an Asynchronous Transfer Mode (ATM) network. In the system, upon failure to receive an alarm indicating a failure occurrence on the trunk, a base station controller (BSC) determines whether a Loss of Cell Delineation (LCD) alarm happens due to a failure to normally receive data through the trunk. A failure manager manages a failure according to a report on the LCD alarm, received from the BSC. A base station transceiver subsystem (BTS), if it perceives a failure has happened on the trunk, informs the failure manager of the occurrence of the LCD alarm.
Abstract:
A synchronous dynamic random access memory capable of accessing data in a memory cell array therein in synchronism with a system clock from an external system such as a central processing unit (CPU). The synchronous DRAM receives an external clock and includes a plurality of memory banks each including a plurality of memory cells and operable in either an active cycle or a precharge cycle, a circuit for receiving a row address strobe signal and latching a logic level of the row address strobe signal in response to the clock, an address input circuit for receiving an externally generated address selecting one of the memory banks, and a circuit for receiving the latched logic level and the address from the address input circuit and for outputting an activation signal to the memory bank selected by the address and an inactivation signals to unselected memory banks when the latched logic level is a first logic level, so that the selected memory bank responsive to the activation signal operates in the active cycle while the unselected memory banks responsive to the inactivation signals operate in the precharge cycle.
Abstract:
An apparatus for generating superheated vapor using waste heat recovery. A housing has an inlet tank and an outlet tank at both ends. Exhaust gas is introduced through the inlet tank, and is discharged through the outlet tank. A plurality of wave fin structures are disposed inside the housing so as to be spaced apart from each other at predetermined distances in a top-bottom direction, and include a plurality of peaks and a plurality of valleys which are connected in a transverse direction so as to form wave-like structures in a direction in which the exhaust gas flows. A plurality of working fluid tubes alternate with the plurality of wave fin structures. An inlet pipe through which working fluid is introduced and an outlet pipe through which the working fluid is discharged are disposed on a side surface of the housing.