公开(公告)号：US11610775B2

公开(公告)日：2023-03-21

申请号：US16318094

申请日：2017-07-14

申请人： ASM IP Holding B.V.

发明人： Viljami Pore ,  Werner Knaepen ,  Bert Jongbloed ,  Dieter Pierreux ,  Steven R. A. Van Aerde ,  Suvi Haukka ,  Atsuki Fukazawa ,  Hideaki Fukuda

IPC分类号： H01L21/02 ,  H01J37/32 ,  C23C16/455 ,  H01L21/762 ,  C23C16/04 ,  C23C16/40

摘要： According to the invention there is provided a method of filling one or more gaps created during manufacturing of a feature on a substrate by providing a deposition method comprising; introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant; introducing a second reactant to the substrate with a second dose. The first reactant is introduced with a subsaturating first dose reaching only a top area of the surface of the one or more gaps and the second reactant is introduced with a saturating second dose reaching a bottom area of the surface of the one or more gaps. A third reactant may be provided to the substrate in the reaction chamber with a third dose, the third reactant reacting with at least one of the first and second reactant.

公开(公告)号：US11532757B2

公开(公告)日：2022-12-20

申请号：US15726959

申请日：2017-10-06

申请人： ASM IP Holding B.V.

发明人： Pauline Calka ,  Qi Xie ,  Dieter Pierreux ,  Bert Jongbloed

IPC分类号： H01L29/792 ,  C23C16/30 ,  H01L27/11582 ,  C23C16/455 ,  H01L27/1157 ,  H01L21/02 ,  C23C16/34 ,  H01L27/11524 ,  H01L27/11551 ,  H01L29/66

摘要： A semiconductor device and method for manufacturing the semiconductor device are disclosed. Specifically, the semiconductor device may include a charge trapping layer with improved retention and speed for VNAND applications. The charge trapping layer may comprise an aluminum nitride (AlN) or aluminum oxynitride (AlON) layer.

公开(公告)号：US20220389578A1

公开(公告)日：2022-12-08

申请号：US17885810

申请日：2022-08-11

申请人： ASM IP Holding B.V.

发明人： Jan Willem Maes ,  Werner Knaepen ,  Krzysztof Kamil Kachel ,  David Kurt De Roest ,  Bert Jongbloed ,  Dieter Pierreux

IPC分类号： C23C16/455 ,  C23C16/44 ,  H01L21/033 ,  C23C16/448 ,  C23C16/04 ,  C23C16/52 ,  C23C16/56

摘要： A sequential infiltration synthesis apparatus comprising: a reaction chamber constructed and arranged to hold at least a first substrate; a precursor distribution and removal system to provide to and remove from the reaction chamber a vaporized first or second precursor; and, a sequence controller operably connected to the precursor distribution and removal system and comprising a memory provided with a program to execute infiltration of an infiltrateable material provided on the substrate when run on the sequence controller by: activating the precursor distribution and removal system to provide and maintain the first precursor for a first period T1 in the reaction chamber; activating the precursor distribution and removal system to remove a portion of the first precursor from the reaction chamber for a second period T2; and, activating the precursor distribution and removal system to provide and maintain the second precursor for a third period T3 in the reaction chamber. The program in the memory is programmed with the first period T1 longer than the second period T2.

公开(公告)号：US11107676B2

公开(公告)日：2021-08-31

申请号：US16827506

申请日：2020-03-23

申请人： ASM IP Holding B.V.

发明人： Viljami Pore ,  Werner Knaepen ,  Bert Jongbloed ,  Dieter Pierreux ,  Gido Van Der Star ,  Toshiya Suzuki

IPC分类号： H01L21/02 ,  C23C16/04 ,  C23C16/455 ,  C23C16/50 ,  H01L21/762

摘要： There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.

公开(公告)号：US20210071298A1

公开(公告)日：2021-03-11

申请号：US16952363

申请日：2020-11-19

申请人： ASM IP Holding B.V.

发明人： Jan Willem Maes ,  Werner Knaepen ,  Krzysztof Kamil Kachel ,  David Kurt de Roest ,  Bert Jongbloed ,  Dieter Pierreux

IPC分类号： C23C16/455 ,  C23C16/44 ,  H01L21/033 ,  C23C16/448 ,  C23C16/04 ,  C23C16/52 ,  C23C16/56

摘要： A sequential infiltration synthesis apparatus comprising: a reaction chamber constructed and arranged to hold at least a first substrate; a precursor distribution and removal system to provide to and remove from the reaction chamber a vaporized first or second precursor; and, a sequence controller operably connected to the precursor distribution and removal system and comprising a memory provided with a program to execute infiltration of an infiltrateable material provided on the substrate when run on the sequence controller by: activating the precursor distribution and removal system to provide and maintain the first precursor for a first period T1 in the reaction chamber; activating the precursor distribution and removal system to remove a portion of the first precursor from the reaction chamber for a second period T2; and, activating the precursor distribution and removal system to provide and maintain the second precursor for a third period T3 in the reaction chamber. The program in the memory is programmed with the first period T1 longer than the second period T2.

公开(公告)号：US20210057275A1

公开(公告)日：2021-02-25

申请号：US16995281

申请日：2020-08-17

申请人： ASM IP Holding B.V.

发明人： Dieter Pierreux ,  Steven van Aerde ,  Bert Jongbloed

IPC分类号： H01L21/768 ,  H01L27/11556 ,  H01L27/11582 ,  G11C5/02 ,  G11C5/06 ,  H01L23/538

摘要： A method for forming a structure with a hole on a substrate is disclosed. The method may comprise: depositing a first structure on the substrate; etching a first part of the hole in the first structure; depositing a plug fill in the first part of the hole; depositing a second structure on top of the first structure; etching a second part of the hole substantially aligned with the first part of the hole in the second structure; and, etching the plug fill of the first part of the hole and thereby opening up the hole by dry etching. In this way 3-D NAND device may be provided.

公开(公告)号：US20200270752A1

公开(公告)日：2020-08-27

申请号：US16797346

申请日：2020-02-21

申请人： ASM IP Holding B.V.

发明人： Dieter Pierreux ,  Werner Knaepen ,  Bert Jongbloed ,  Jeroen Fluit

IPC分类号： C23C16/48 ,  C23C16/458 ,  C23C16/44 ,  C23C16/455

摘要： The disclosure relates to a substrate processing apparatus, comprising: a first reactor constructed and arranged to process a rack with a plurality of substrates therein; a second reactor constructed and arranged to process a substrate; and, a substrate transfer device constructed and arranged to transfer substrates to and from the first and second reactor. The second reactor may be provided with an illumination system constructed and arranged to irradiate ultraviolet radiation within a range from 100 to 500 nanometers onto a top surface of at least a substrate in the second reactor.

公开(公告)号：US10453685B2

公开(公告)日：2019-10-22

申请号：US15476752

申请日：2017-03-31

申请人： ASM IP Holding B.V.

发明人： Kelly Houben ,  Steven R. A. Van Aerde ,  Maarten Stokhof ,  Bert Jongbloed ,  Dieter Pierreux ,  Werner Knaepen

IPC分类号： H01L21/311 ,  H01L21/033

摘要： The invention relates to a method of forming a semiconductor device by patterning a substrate by providing an amorphous silicon layer on the substrate and forming a hard mask layer on the amorphous silicon layer. The amorphous silicon layer is provided with an anti-crystallization dopant to keep the layer amorphous at increased temperatures (relative to not providing the anti-crystallization dopant). The hard mask layer may comprise silicon and nitrogen.

公开(公告)号：US20180171475A1

公开(公告)日：2018-06-21

申请号：US15380921

申请日：2016-12-15

申请人： ASM IP Holding B.V.

发明人： Jan Willem Maes ,  Werner Knaepen ,  Krzysztof Kamil Kachel ,  David Kurt De Roest ,  Bert Jongbloed ,  Dieter Pierreux

IPC分类号： C23C16/455 ,  C23C16/52 ,  C23C16/56 ,  C23C16/448 ,  C23C16/04

CPC分类号： C23C16/45523 ,  C23C16/042 ,  C23C16/045 ,  C23C16/4412 ,  C23C16/448 ,  C23C16/4485 ,  C23C16/45527 ,  C23C16/52 ,  C23C16/56 ,  H01L21/0332 ,  H01L21/0337

摘要： A sequential infiltration synthesis apparatus comprising: a reaction chamber constructed and arranged to hold at least a first substrate; a precursor distribution and removal system to provide to and remove from the reaction chamber a vaporized first or second precursor; and, a sequence controller operably connected to the precursor distribution and removal system and comprising a memory provided with a program to execute infiltration of an infiltrateable material provided on the substrate when run on the sequence controller by: activating the precursor distribution and removal system to provide and maintain the first precursor for a first period T1 in the reaction chamber; activating the precursor distribution and removal system to remove a portion of the first precursor from the reaction chamber for a second period T2; and, activating the precursor distribution and removal system to provide and maintain the second precursor for a third period T3 in the reaction chamber. The program in the memory is programmed with the first period T1 longer than the second period T2.

公开(公告)号：US09431238B2

公开(公告)日：2016-08-30

申请号：US14718517

申请日：2015-05-21

申请人： ASM IP Holding B.V.

发明人： Bert Jongbloed ,  Dieter Pierreux ,  Cornelius A. van der Jeugd ,  Herbert Terhorst ,  Lucian Jdira ,  Radko G. Bankras ,  Theodorus G. M. Oosterlaken

IPC分类号： H01L21/02

CPC分类号： H01L21/02337 ,  C23C16/402 ,  C23C16/56 ,  H01L21/02164 ,  H01L21/02233 ,  H01L21/02274

摘要： In some embodiments, a reactive curing process may be performed by exposing a semiconductor substrate in a process chamber to an ambient containing hydrogen peroxide, with the pressure in the process chamber at about 300 Torr or less. In some embodiments, the residence time of hydrogen peroxide molecules in the process chamber is about five minutes or less. The curing process temperature may be set at about 500° C. or less. The curing process may be applied to cure flowable dielectric materials and may provide highly uniform curing results, such as across a batch of semiconductor substrates cured in a batch process chamber.

摘要翻译： 在一些实施方案中，反应性固化方法可以通过将处理室中的半导体衬底暴露于含有过氧化氢的环境中，其中处理室中的压力为约300托或更小。 在一些实施方案中，过氧化氢分子在处理室中的停留时间为约5分钟或更短。 固化过程温度可以设定在约500℃或更低。 固化过程可用于固化可流动介电材料，并且可以提供高度均匀的固化结果，例如在批处理室中固化的一批半导体衬底。