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    Electrochemical Fabrication Methods for Producing Multilayer Structures Including the use of Diamond Machining in the Planarization of Deposits of Material
    31.
    发明申请
    Electrochemical Fabrication Methods for Producing Multilayer Structures Including the use of Diamond Machining in the Planarization of Deposits of Material 审中-公开
    用于生产多层结构的电化学制造方法包括在材料沉积物平面化中使用金刚石加工

    公开(公告)号：US20120114861A1

    公开(公告)日：2012-05-10

    申请号：US13253856

    申请日：2011-10-05

    申请人： Adam L. Cohen ,  Uri Frodis ,  Michael S. Lockard ,  Ananda H. Kumar ,  Gang Zhang ,  Dennis R. Smalley

    发明人： Adam L. Cohen ,  Uri Frodis ,  Michael S. Lockard ,  Ananda H. Kumar ,  Gang Zhang ,  Dennis R. Smalley

    IPC分类号： B05D3/12 ,  B05D1/36 ,  C25D5/48

    CPC分类号： C25D1/003 ,  B81C1/00492 ,  B81C99/0065 ,  B81C2201/0104 ,  B81C2201/0197 ,  C25D5/02 ,  C25D5/022 ,  C25D5/10 ,  C25D21/12 ,  H01L21/2885 ,  H01L21/76885

    摘要： Electrochemical fabrication methods for forming single and multilayer mesoscale and microscale structures include the use of diamond machining (e.g. fly cutting or turning) to planarize layers. Some embodiments focus on systems of sacrificial and structural materials which can be diamond machined with minimal tool wear (e.g. Ni—P and Cu, Au and Cu, Cu and Sn, Au and Cu, Au and Sn, and Au and Sn—Pb). Some embodiments provide for reducing tool wear when using difficult-to-machine materials by (1) depositing difficult to machine materials selectively and potentially with little excess plating thickness and/or (2) pre-machining depositions to within a small increment of desired surface level (e.g. using lapping) and then using diamond fly cutting to complete the process, and/or (3) forming structures or portions of structures from thin walled regions of hard-to-machine material as opposed to wide solid regions of structural material.

    摘要翻译： 用于形成单层和多层中尺度和微结构结构的电化学制造方法包括使用金刚石加工（例如飞切或车削）来平坦化层。 一些实施例侧重于牺牲和结构材料的系统，其可以以最小的工具磨损（例如Ni-P和Cu，Au和Cu，Cu和Sn，Au和Cu，Au和Sn以及Au和Sn-Pb）进行金刚石加工， 。 一些实施例提供了通过（1）选择性地沉积难以加工的材料并且潜在地以很少的镀层厚度沉积和/​​或（2）预加工沉积到期望表面的小增量内，以便在使用难加工材料时减少刀具磨损 （例如使用研磨），然后使用金刚石飞切切割来完成该过程，和/或（3）从硬质材料的薄壁区域形成与结构材料的宽固体区域相反的结构或部分结构。

    Methods of Forming Three-Dimensional Structures Having Reduced Stress and/or Curvature
    32.
    发明申请
    Methods of Forming Three-Dimensional Structures Having Reduced Stress and/or Curvature 审中-公开
    形成具有减小的应力和/或曲率的三维结构的方法

    公开(公告)号：US20110147223A1

    公开(公告)日：2011-06-23

    申请号：US13006814

    申请日：2011-01-14

    申请人： Ananda H. Kumar ,  Jorge Sotelo Alberran ,  Adam L. Cohen ,  Kieun Kim ,  Michael S. Lockard ,  Uri Frodis ,  Dennis R. Smalley

    发明人： Ananda H. Kumar ,  Jorge Sotelo Alberran ,  Adam L. Cohen ,  Kieun Kim ,  Michael S. Lockard ,  Uri Frodis ,  Dennis R. Smalley

    IPC分类号： C25D5/48 ,  C25D5/10

    CPC分类号： B81C1/00666 ,  C25D5/022

    摘要： Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion.

    摘要翻译： 用于生产单层或多层结构的电化学制造方法和装置，其中每个层包括至少两种材料的沉积，并且其中形成至少一些层包括当结构被释放时减少应力和/或曲率失真的操作 牺牲材料，其在形成期间包围它，并且可能当从其形成的基底释放时。 呈现了六个主要实施例的组，它们分为十一个主要实施例。 一些实施例尝试去除应力以最小化失真，而另一些实施例试图平衡应力以最小化失真。

    Electrochemical Fabrication Methods Incorporating Dielectric Materials and/or Using Dielectric Substrates
    34.
    发明申请
    Electrochemical Fabrication Methods Incorporating Dielectric Materials and/or Using Dielectric Substrates 审中-公开
    电介质材料和/或使用介质基片的电化学制造方法

    公开(公告)号：US20100270165A1

    公开(公告)日：2010-10-28

    申请号：US12770648

    申请日：2010-04-29

    申请人： Adam L. Cohen ,  Michael S. Lockard ,  Kieun Kim ,  Qui T. Le ,  Gang Zhang ,  Uri Frodis ,  Dale S. McPherson ,  Dennis R. Smalley

    发明人： Adam L. Cohen ,  Michael S. Lockard ,  Kieun Kim ,  Qui T. Le ,  Gang Zhang ,  Uri Frodis ,  Dale S. McPherson ,  Dennis R. Smalley

    IPC分类号： C25D5/02

    CPC分类号： C25D5/022 ,  B81C1/00126 ,  B81C2201/0109 ,  B81C2201/019 ,  C23C18/1605 ,  C23C18/1651 ,  C25D1/003 ,  Y10T156/11 ,  Y10T156/19

    摘要： Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.

    摘要翻译： 本发明的一些实施例涉及在电介质或部分电介质基底上建立单层或多层结构的技术。 某些实施方案将种子层材料直接沉积到基底材料上，而其它实施例使用中间粘合层材料。 一些实施例使用不同种子层材料和/或用于牺牲和结构导电建筑材料的粘合层材料。 一些实施例将种子层和/或粘合层材料应用于有选择性的方式，而其它实施例以毯子的方式应用材料。 一些实施例通过平面化操作去除外来沉积物（例如沉积到不想要形成层的一部分的区域），而其他实施例通过蚀刻操作去除外来材料。 其它实施方案涉及使用至少一种导电结构材料，至少一种导电牺牲材料和至少一种电介质材料形成的多层中尺度或微结构结构的电化学制造。 在一些实施方案中，电介质材料是可UV固化的光聚合物。

    Electrochemical Fabrication Process for Forming Multilayer Multimaterial Microprobe Structures
    35.
    发明申请
    Electrochemical Fabrication Process for Forming Multilayer Multimaterial Microprobe Structures 有权
    用于形成多层多材料微结构的电化学制造工艺

    公开(公告)号：US20090320990A1

    公开(公告)日：2009-12-31

    申请号：US12431680

    申请日：2009-04-28

    申请人： Adam L. Cohen ,  Ananda H. Kumar ,  Michael S. Lockard ,  Dennis R. Smalley

    发明人： Adam L. Cohen ,  Ananda H. Kumar ,  Michael S. Lockard ,  Dennis R. Smalley

    IPC分类号： B32B37/00 ,  B32B38/10

    CPC分类号： G01R3/00 ,  C23C18/1605 ,  C23C18/1651 ,  C25D1/003 ,  C25D5/02 ,  C25D5/10 ,  G01R1/06716 ,  G01R1/06744 ,  G01R1/06755 ,  H01L21/4853

    摘要： Some embodiments of the invention are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that partially coats the surface of the probe. Other embodiments are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that completely coats the surface of each layer from which the probe is formed including interlayer regions. These first two groups of embodiments incorporate both the core material and the coating material during the formation of each layer. Still other embodiments are directed to the electrochemical fabrication of microprobe arrays that are partially encapsulated by a dielectric material during a post layer formation coating process. In even further embodiments, the electrochemical fabrication of microprobes from two or more materials may occur by incorporating a coating material around each layer of the structure without locating the coating material in inter-layer regions.

    摘要翻译： 本发明的一些实施方案涉及由芯材料和部分涂覆探针的表面的材料形成的微针的电化学制造。 其它实施方案涉及由核心材料形成的微结构的电化学制造，以及完全涂覆形成探针的每个层的表面的材料，包括中间层区域。 这些前两组实施例在形成每个层期间都包括芯材料和涂层材料。 其他实施例涉及在后层形成涂覆工艺期间由电介质材料部分封装的微探针阵列的电化学制造。 在甚至进一步的实施方案中，来自两种或更多种材料的微结构的电化学制造可以通过在结构的每一层周围并入涂层材料而不将涂层材料定位在层间区域中而进行。

    Electrochemically Fabricated Structures Having Dielectric or Active Bases and Methods of and Apparatus for Producing Such Structures
    36.
    发明申请
    Electrochemically Fabricated Structures Having Dielectric or Active Bases and Methods of and Apparatus for Producing Such Structures 审中-公开
    具有电介质或活性碱的电化学结构和用于生产这种结构的方法和装置

    公开(公告)号：US20090038948A1

    公开(公告)日：2009-02-12

    申请号：US12191258

    申请日：2008-08-13

    申请人： Jeffrey A. Thompson ,  Adam L. Cohen ,  Michael S. Lockard ,  Dennis R. Smalley

    发明人： Jeffrey A. Thompson ,  Adam L. Cohen ,  Michael S. Lockard ,  Dennis R. Smalley

    IPC分类号： C25D5/02

    CPC分类号： C25D1/003 ,  B81C1/00373 ,  B81C2201/0181 ,  B81C2201/019

    摘要： Multilayer structures are electrochemically fabricated on a temporary (e.g. conductive) substrate and are thereafter bonded to a permanent (e.g. dielectric, patterned, multi-material, or otherwise functional) substrate and removed from the temporary substrate. In some embodiments, the structures are formed from top layer to bottom layer, such that the bottom layer of the structure becomes adhered to the permanent substrate, while in other embodiments the structures are formed from bottom layer to top layer and then a double substrate swap occurs. The permanent substrate may be a solid that is bonded (e.g. by an adhesive) to the layered structure or it may start out as a flowable material that is solidified adjacent to or partially surrounding a portion of the structure with bonding occurring during solidification. The multilayer structure may be released from a sacrificial material prior to attaching the permanent substrate or it may be released after attachment.

    摘要翻译： 多层结构在临时的（例如导电的）衬底上电化学地制造，然后在永久（例如电介质，图案化，多材料或其他功能）的衬底上结合并从临时衬底去除。 在一些实施例中，结构由顶层到底层形成，使得结构的底层变得粘附到永久性基底上，而在其它实施例中，结构由底层到顶层形成，然后是双层衬底交换 发生。 永久性基材可以是与层状结构结合的固体（例如通过粘合剂），或者可以作为在凝固期间发生结合而邻近或部分地围绕结构的一部分固化的可流动材料开始。 多层结构可以在附着永久性基底之前从牺牲材料上释放，或者在附着后可以释放多层结构。

    Methods of reducing interlayer discontinuities in electrochemically fabricated three-dimensional structures
    38.
    发明授权
    Methods of reducing interlayer discontinuities in electrochemically fabricated three-dimensional structures 有权
    减少电化学制造的三维结构中的层间不连续性的方法

    公开(公告)号：US07198704B2

    公开(公告)日：2007-04-03

    申请号：US10830262

    申请日：2004-04-21

    申请人： Adam L. Cohen ,  Michael S. Lockard ,  Dennis R. Smalley

    发明人： Adam L. Cohen ,  Michael S. Lockard ,  Dennis R. Smalley

    IPC分类号： C25D5/02

    CPC分类号： C25D5/02 ,  B33Y10/00 ,  C23C18/1605 ,  C23C18/1651 ,  C25D1/003 ,  H01P11/006

    摘要： Disclosed methods reduce the discontinuities between individual layers of a structure that are formed at least in part using electrochemical fabrication techniques. Discontinuities may exist between layers of a structure as a result of up-facing or down-facing regions defined in data descriptive of the structure or they may exist as a result of building limitations, e.g., limitations that result in non-parallel orientation between a building axis and sidewall surfaces of layers. Methods for reducing discontinuities may be applied to all regions or only to selected regions of the structure. Methods may be tailored to improve the accuracy between an original design of the structure and the structure as fabricated or they may simply be used to smooth the discontinuities between layers. Methods may include deposition operations that selectively favor filling of the discontinuities and/or etching operations that selectively favor removal of material from protrusions that define discontinuities.

    摘要翻译： 公开的方法减少了至少部分地使用电化学制造技术形成的结构的各层之间的不连续性。 结构的层之间可能存在不连续性，这是由于在描述结构的数据中定义的面向上或向下的区域的结果，或者由于建筑局限性而可能存在结构，例如，导致不平行取向的限制 建筑轴线和层的侧壁表面。 用于减少不连续性的方法可以应用于所有区域或仅应用于结构的选定区域。 可以调整方法以提高结构的原始设计和所制造的结构之间的精度，或者可以简单地用于平滑层之间的不连续性。 方法可以包括选择性地有利于填充不连续性和/或蚀刻操作的沉积操作，其选择性地有利于从限定不连续性的突起中去除材料。