公开(公告)号：US07524427B2

公开(公告)日：2009-04-28

申请号：US11029218

申请日：2005-01-03

申请人： Adam L. Cohen ,  Michael S. Lockard ,  Kieun Kim ,  Qui T. Le ,  Gang Zhang ,  Uri Frodis ,  Dale S. McPherson ,  Dennis R. Smalley

发明人： Adam L. Cohen ,  Michael S. Lockard ,  Kieun Kim ,  Qui T. Le ,  Gang Zhang ,  Uri Frodis ,  Dale S. McPherson ,  Dennis R. Smalley

IPC分类号： B81C1/00

CPC分类号： C25D1/003 ,  B33Y10/00 ,  C23C18/1605 ,  C23C18/1608 ,  C23C18/1653 ,  C25D5/022 ,  C25D5/10

摘要： Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.

公开(公告)号：US07517462B2

公开(公告)日：2009-04-14

申请号：US11029014

申请日：2005-01-03

申请人： Adam L. Cohen ,  Michael S. Lockard ,  Kieun Kim ,  Qui T. Le ,  Gang Zhang ,  Uri Frodis ,  Dale S. McPherson ,  Dennis R. Smalley

发明人： Adam L. Cohen ,  Michael S. Lockard ,  Kieun Kim ,  Qui T. Le ,  Gang Zhang ,  Uri Frodis ,  Dale S. McPherson ,  Dennis R. Smalley

IPC分类号： B81C1/00

CPC分类号： B44C1/22 ,  B33Y10/00 ,  B81C1/00492 ,  C03C15/00 ,  C03C25/68 ,  C23C18/1605 ,  C23C18/161 ,  C23C18/1651 ,  C23C18/1653 ,  C23C18/405 ,  C23F1/00 ,  C25D1/003 ,  C25D5/02 ,  C25D5/10 ,  H01L21/2885 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/76885

摘要： Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.

摘要翻译： 本发明的一些实施例涉及在电介质或部分电介质基底上建立单层或多层结构的技术。 某些实施方案将种子层材料直接沉积到基底材料上，而其它实施例使用中间粘合层材料。 一些实施例使用不同种子层材料和/或用于牺牲和结构导电建筑材料的粘合层材料。 一些实施例将种子层和/或粘合层材料应用于有选择性的方式，而其它实施例以毯子的方式应用材料。 一些实施例通过平面化操作去除外来沉积物（例如沉积到不想要形成层的一部分的区域），而其他实施例通过蚀刻操作去除外来材料。 其它实施方案涉及使用至少一种导电结构材料，至少一种导电牺牲材料和至少一种电介质材料形成的多层中尺度或微结构结构的电化学制造。 在一些实施方案中，电介质材料是可UV固化的光聚合物。

公开(公告)号：US20080121343A1

公开(公告)日：2008-05-29

申请号：US12015374

申请日：2008-01-16

申请人： Adam L. Cohen ,  Michael S. Lockard ,  Kieun Kim ,  Qui T. Le ,  Gang Zhang ,  Uri Frodis ,  Dale S. McPherson ,  Dennis R. Smalley

发明人： Adam L. Cohen ,  Michael S. Lockard ,  Kieun Kim ,  Qui T. Le ,  Gang Zhang ,  Uri Frodis ,  Dale S. McPherson ,  Dennis R. Smalley

IPC分类号： B32B38/10

CPC分类号： C25D5/022 ,  B81C1/00126 ,  B81C2201/0109 ,  B81C2201/019 ,  C23C18/1605 ,  C23C18/1651 ,  C25D1/003 ,  Y10T156/11 ,  Y10T156/19

摘要： Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.

摘要翻译： 本发明的一些实施例涉及在电介质或部分电介质基底上建立单层或多层结构的技术。 某些实施方案将种子层材料直接沉积到基底材料上，而其它实施例使用中间粘合层材料。 一些实施例使用不同种子层材料和/或用于牺牲和结构导电建筑材料的粘合层材料。 一些实施例将种子层和/或粘合层材料应用于有选择性的方式，而其它实施例以毯子的方式应用材料。 一些实施例通过平面化操作去除外来沉积物（例如沉积到不想要形成层的一部分的区域），而其他实施例通过蚀刻操作去除外来材料。 其它实施方案涉及使用至少一种导电结构材料，至少一种导电牺牲材料和至少一种电介质材料形成的多层中尺度或微结构结构的电化学制造。 在一些实施方案中，电介质材料是可UV固化的光聚合物。

公开(公告)号：US20100270165A1

公开(公告)日：2010-10-28

申请号：US12770648

申请日：2010-04-29

申请人： Adam L. Cohen ,  Michael S. Lockard ,  Kieun Kim ,  Qui T. Le ,  Gang Zhang ,  Uri Frodis ,  Dale S. McPherson ,  Dennis R. Smalley

发明人： Adam L. Cohen ,  Michael S. Lockard ,  Kieun Kim ,  Qui T. Le ,  Gang Zhang ,  Uri Frodis ,  Dale S. McPherson ,  Dennis R. Smalley

IPC分类号： C25D5/02

CPC分类号： C25D5/022 ,  B81C1/00126 ,  B81C2201/0109 ,  B81C2201/019 ,  C23C18/1605 ,  C23C18/1651 ,  C25D1/003 ,  Y10T156/11 ,  Y10T156/19

摘要： Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.

摘要翻译： 本发明的一些实施例涉及在电介质或部分电介质基底上建立单层或多层结构的技术。 某些实施方案将种子层材料直接沉积到基底材料上，而其它实施例使用中间粘合层材料。 一些实施例使用不同种子层材料和/或用于牺牲和结构导电建筑材料的粘合层材料。 一些实施例将种子层和/或粘合层材料应用于有选择性的方式，而其它实施例以毯子的方式应用材料。 一些实施例通过平面化操作去除外来沉积物（例如沉积到不想要形成层的一部分的区域），而其他实施例通过蚀刻操作去除外来材料。 其它实施方案涉及使用至少一种导电结构材料，至少一种导电牺牲材料和至少一种电介质材料形成的多层中尺度或微结构结构的电化学制造。 在一些实施方案中，电介质材料是可UV固化的光聚合物。

公开(公告)号：US08808800B2

公开(公告)日：2014-08-19

申请号：US13409950

申请日：2012-03-01

申请人： Ananda H. Kumar ,  Jorge Sotelo Albarran ,  Adam L. Cohen ,  Kieun Kim ,  Michael S. Lockard ,  Uri Frodis ,  Dennis R. Smalley

发明人： Ananda H. Kumar ,  Jorge Sotelo Albarran ,  Adam L. Cohen ,  Kieun Kim ,  Michael S. Lockard ,  Uri Frodis ,  Dennis R. Smalley

IPC分类号： B05D3/00

CPC分类号： B81C1/00666 ,  C25D5/022

摘要： Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion.

摘要翻译： 用于生产单层或多层结构的电化学制造方法和装置，其中每个层包括至少两种材料的沉积，并且其中形成至少一些层包括当结构被释放时减少应力和/或曲率失真的操作 牺牲材料，其在形成期间包围它，并且可能当从其形成的基底释放时。 呈现了六个主要实施例的组，它们分为十一个主要实施例。 一些实施例尝试去除应力以最小化失真，而另一些实施例试图平衡应力以最小化失真。

公开(公告)号：US20120222960A1

公开(公告)日：2012-09-06

申请号：US13409950

申请日：2012-03-01

申请人： Ananda H. Kumar ,  Jorge Sotelo Albarran ,  Adam L. Cohen ,  Kieun Kim ,  Michael S. Lockard ,  Uri Frodis ,  Dennis R. Smalley

发明人： Ananda H. Kumar ,  Jorge Sotelo Albarran ,  Adam L. Cohen ,  Kieun Kim ,  Michael S. Lockard ,  Uri Frodis ,  Dennis R. Smalley

IPC分类号： C25D5/02

CPC分类号： B81C1/00666 ,  C25D5/022

摘要： Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion.

摘要翻译： 用于生产单层或多层结构的电化学制造方法和装置，其中每个层包括至少两种材料的沉积，并且其中形成至少一些层包括当结构被释放时减少应力和/或曲率失真的操作 牺牲材料，其在形成期间包围它，并且可能当从其形成的基底释放时。 呈现了六个主要实施例的组，它们分为十一个主要实施例。 一些实施例尝试去除应力以最小化失真，而另一些实施例试图平衡应力以最小化失真。

公开(公告)号：US20110147223A1

公开(公告)日：2011-06-23

申请号：US13006814

申请日：2011-01-14

申请人： Ananda H. Kumar ,  Jorge Sotelo Alberran ,  Adam L. Cohen ,  Kieun Kim ,  Michael S. Lockard ,  Uri Frodis ,  Dennis R. Smalley

发明人： Ananda H. Kumar ,  Jorge Sotelo Alberran ,  Adam L. Cohen ,  Kieun Kim ,  Michael S. Lockard ,  Uri Frodis ,  Dennis R. Smalley

IPC分类号： C25D5/48 ,  C25D5/10

CPC分类号： B81C1/00666 ,  C25D5/022

摘要： Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion.

摘要翻译： 用于生产单层或多层结构的电化学制造方法和装置，其中每个层包括至少两种材料的沉积，并且其中形成至少一些层包括当结构被释放时减少应力和/或曲率失真的操作 牺牲材料，其在形成期间包围它，并且可能当从其形成的基底释放时。 呈现了六个主要实施例的组，它们分为十一个主要实施例。 一些实施例尝试去除应力以最小化失真，而另一些实施例试图平衡应力以最小化失真。

公开(公告)号：US20090020433A1

公开(公告)日：2009-01-22

申请号：US12121625

申请日：2008-05-15

申请人： Adam L. Cohen ,  Uri Frodis ,  Michael S. Lockard ,  Ananda H. Kumar ,  Gang Zhang ,  Dennis R. Smalley

发明人： Adam L. Cohen ,  Uri Frodis ,  Michael S. Lockard ,  Ananda H. Kumar ,  Gang Zhang ,  Dennis R. Smalley

IPC分类号： C25D5/48

CPC分类号： C25D1/003 ,  B81C1/00492 ,  B81C99/0065 ,  B81C2201/0104 ,  B81C2201/0197 ,  C25D5/02 ,  C25D5/022 ,  C25D5/10 ,  C25D21/12 ,  H01L21/2885 ,  H01L21/76885

摘要： Electrochemical fabrication methods for forming single and multilayer mesoscale and microscale structures are disclosed which include the use of diamond machining (e.g. fly cutting or turning) to planarize layers. Some embodiments focus on systems of sacrificial and structural materials which are useful in Electrochemical fabrication and which can be diamond machined with minimal tool wear (e.g. Ni—P and Cu, Au and Cu, Cu and Sn, Au and Cu, Au and Sn, and Au and Sn—Pb), where the first material or materials are the structural materials and the second is the sacrificial material). Some embodiments focus on methods for reducing tool wear when using diamond machining to planarize structures being electrochemically fabricated using difficult-to-machine materials (e.g. by depositing difficult to machine material selectively and potentially with little excess plating thickness, and/or pre-machining depositions to within a small increment of desired surface level (e.g. using lapping or a rough cutting operation) and then using diamond fly cutting to complete he process, and/or forming structures or portions of structures from thin walled regions of hard-to-machine material as opposed to wide solid regions of structural material.

摘要翻译： 公开了用于形成单层和多层中尺度和微结构的电化学制造方法，其包括使用金刚石加工（例如飞切或车削）来平坦化层。 一些实施例集中于可用于电化学制造的牺牲和结构材料的系统，并且可以以最小的工具磨损（例如Ni-P和Cu，Au和Cu，Cu和Sn，Au和Cu，Au和Sn， 和Au和Sn-Pb），其中第一材料或材料是结构材料，第二材料是牺牲材料）。 一些实施例着重于在使用金刚石加工来平面化使用难以加工的材料进行电化学制造的结构（例如，通过沉积难以加工材料选择性且潜在地具有少量多余电镀厚度和/或预加工沉积 到所需表面水平的小增量（例如使用研磨或粗切割操作），然后使用金刚石飞切切割来完成其加工，和/或从硬质材料的薄壁区域形成结构或部分结构 而不是结构材料的宽固体区域。

公开(公告)号：US20120114861A1

公开(公告)日：2012-05-10

申请号：US13253856

申请日：2011-10-05

申请人： Adam L. Cohen ,  Uri Frodis ,  Michael S. Lockard ,  Ananda H. Kumar ,  Gang Zhang ,  Dennis R. Smalley

发明人： Adam L. Cohen ,  Uri Frodis ,  Michael S. Lockard ,  Ananda H. Kumar ,  Gang Zhang ,  Dennis R. Smalley

IPC分类号： B05D3/12 ,  B05D1/36 ,  C25D5/48

CPC分类号： C25D1/003 ,  B81C1/00492 ,  B81C99/0065 ,  B81C2201/0104 ,  B81C2201/0197 ,  C25D5/02 ,  C25D5/022 ,  C25D5/10 ,  C25D21/12 ,  H01L21/2885 ,  H01L21/76885

摘要： Electrochemical fabrication methods for forming single and multilayer mesoscale and microscale structures include the use of diamond machining (e.g. fly cutting or turning) to planarize layers. Some embodiments focus on systems of sacrificial and structural materials which can be diamond machined with minimal tool wear (e.g. Ni—P and Cu, Au and Cu, Cu and Sn, Au and Cu, Au and Sn, and Au and Sn—Pb). Some embodiments provide for reducing tool wear when using difficult-to-machine materials by (1) depositing difficult to machine materials selectively and potentially with little excess plating thickness and/or (2) pre-machining depositions to within a small increment of desired surface level (e.g. using lapping) and then using diamond fly cutting to complete the process, and/or (3) forming structures or portions of structures from thin walled regions of hard-to-machine material as opposed to wide solid regions of structural material.

摘要翻译： 用于形成单层和多层中尺度和微结构结构的电化学制造方法包括使用金刚石加工（例如飞切或车削）来平坦化层。 一些实施例侧重于牺牲和结构材料的系统，其可以以最小的工具磨损（例如Ni-P和Cu，Au和Cu，Cu和Sn，Au和Cu，Au和Sn以及Au和Sn-Pb）进行金刚石加工， 。 一些实施例提供了通过（1）选择性地沉积难以加工的材料并且潜在地以很少的镀层厚度沉积和/​​或（2）预加工沉积到期望表面的小增量内，以便在使用难加工材料时减少刀具磨损 （例如使用研磨），然后使用金刚石飞切切割来完成该过程，和/或（3）从硬质材料的薄壁区域形成与结构材料的宽固体区域相反的结构或部分结构。

公开(公告)号：US07878385B2

公开(公告)日：2011-02-01

申请号：US11929539

申请日：2007-10-30

申请人： Ananda H. Kumar ,  Ezekiel J. J. Kruglick ,  Adam L. Cohen ,  Kieun Kim ,  Gang Zhang ,  Richard T. Chen ,  Christopher A. Bang ,  Vacit Arat ,  Michael S. Lockard ,  Uri Frodis ,  Pavel B. Lembrikov ,  Jeffrey A. Thompson

发明人： Ananda H. Kumar ,  Ezekiel J. J. Kruglick ,  Adam L. Cohen ,  Kieun Kim ,  Gang Zhang ,  Richard T. Chen ,  Christopher A. Bang ,  Vacit Arat ,  Michael S. Lockard ,  Uri Frodis ,  Pavel B. Lembrikov ,  Jeffrey A. Thompson

IPC分类号： B23K31/02

CPC分类号： B23K35/0222 ,  C23C18/1605 ,  C23C18/1651 ,  C25D1/003 ,  C25D1/12 ,  G01R1/06744 ,  G01R1/07307 ,  G01R1/07314 ,  G01R3/00 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/81 ,  H01L24/95 ,  H01L2221/68313 ,  H01L2221/68354 ,  H01L2221/68363 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/10126 ,  H01L2224/1147 ,  H01L2224/11831 ,  H01L2224/1184 ,  H01L2224/1191 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13076 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/81001 ,  H01L2224/81054 ,  H01L2224/81136 ,  H01L2224/8121 ,  H01L2224/8181 ,  H01L2224/81815 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/3651 ,  H01L2924/3841 ,  H01L2224/13099 ,  H01L2224/29099 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00012

摘要： Embodiments of invention are directed to the formation of microprobes (i.e. compliant electrical or electronic contact elements) on a temporary substrate, dicing individual probe arrays, and then transferring the arrays to space transformers or other permanent substrates. Some embodiments of the invention transfer probes to permanent substrates prior to separating the probes from a temporary substrate on which the probes were formed while other embodiments do the opposite. Some embodiments, remove sacrificial material prior to transfer while other embodiments remove sacrificial material after transfer. Some embodiments are directed to the bonding of first and second electric components together using one or more solder bumps with enhanced aspect ratios (i.e. height to width ratios) obtained as a result of surrounding the bumps at least in part with rings of a retention material. The retention material may act be a solder mask material.

摘要翻译： 本发明的实施例涉及在临时衬底上形成微探针（即柔性电气或电子接触元件），切割单独的探针阵列，然后将阵列转移到空间变压器或其它永久衬底。 在将探针从其上形成探针的临时基底分离出来之前，本发明的一些实施方案将探针转移到永久性基底上，而其他实施方案相反。 一些实施例，在转移之前去除牺牲材料，而其它实施例在转移后去除牺牲材料。 一些实施例涉及使用一个或多个具有增强的纵横比（即，高度与宽度比）的焊料凸块来将第一和第二电气部件接合在一起，这是由于至少部分地由保持材料的环围绕凸块而得到的。 保留材料可以用作焊接掩模材料。