摘要:
In a photo detecting apparatus, a first capacitance is caused by a photo detecting element and the first capacitance is charged or discharged by current flowing through the photo detecting element. A second capacitance is connected in parallel with the photo detecting element, and the second capacitance charges or discharges an electric charge overflowing from the first capacitance. A current control element is connected to a terminal of the second capacitance on a side where the electric charge flows in, and the current control element delivers a current to cancel part of an electric charge when the electric charge overflowing from the first capacitance is stored in the second capacitance.
摘要:
A plurality of pixel circuits, provided with a plurality of photo detecting elements, respectively, cause photocurrent corresponding to an incident light. The pixel circuits are placed on intersections of a plurality of data lines and scanning lines, respectively. A second capacitance charges and discharges an electric charge overflowing from a first capacitance caused by the photo detecting element. Each second capacitance is shared by a plurality of pixel circuits. A plurality of pixel circuits sharing the second capacitance are controlled so that exposure periods of the pixel circuits do not overlap with one another.
摘要:
A DSP calculates time integration of the light amount received by a CCD, using an input image. Determination is made regarding whether or not the light amount is equal to or smaller than a predetermined threshold. In a case that the light amount is equal to or smaller than the predetermined threshold, the DSP outputs a control signal to an AD converter for operation in the 8-bit mode. In a case that the light amount is greater than the threshold, the DSP outputs a control signal to the AD converter for operation in the 10-bit mode. The AD converter has a function of dynamic adjustment of conversion bits according to control from the DSP.
摘要:
A multi-stage pipelined AD converter has n stages of conversion units, such as a first conversion unit, a second conversion unit, an (n−1)th conversion unit, and an nth conversion unit, which successively convert an analog signal into a digital signal each by several bits starting from the most significant bit. Each of the converted digital signals of several bits is combined in a digital output circuit. A first voltage source supplies a higher voltage than a second voltage source. The first voltage source supplies a high voltage to the first stage or the first conversion unit, while the second voltage source supplies a low voltage to the second and subsequent stages of the second conversion unit to the nth conversion unit which require a lower analog accuracy.
摘要:
Three kinds of shrink factors, 1 time, 0.5 time, and 0.25 time, are prepared and three sets of operational amplifier layout information are also prepared as a library in correspondence with the three kinds of shrink factors. At each shrink factor, the bias voltage is varied between upper and lower limits to vary the bias current.
摘要:
A set of voltage output units outputs the light intensity detected by a photodetection device in the form of a voltage value. With the set of voltage output units, the capacitance of the cathode terminal of a photodiode PD provided within the pixel is charged or discharged using the photoelectric current. A current output unit outputs photoelectric current Iph flowing from the photodetection device. The current output unit includes a current output transistor provided between one terminal of the photodetection device and the data line. A pixel circuit effects control of the pixel so as to activate either the set of the voltage output units or the current output unit, thereby outputting either voltage value or photoelectric current to the data line connected to the pixel.
摘要:
A DSP calculates time integration of the light amount received by a CCD, using an input image. Determination is made regarding whether or not the light amount is equal to or smaller than a predetermined threshold. In a case that the light amount is equal to or smaller than the predetermined threshold, the DSP outputs a control signal to an AD converter for operation in the 8-bit mode. In a case that the light amount is greater than the threshold, the DSP outputs a control signal to the AD converter for operation in the 10-bit mode. The AD converter has a function of dynamic adjustment of conversion bits according to control from the DSP.
摘要:
A signal adjustment circuit which aims to simplify measurement of a component to be adjusted and to improve precision of adjustment. An analog front-end circuit of an imaging device corresponds to a signal processing circuit. By feeding back a black-level signal that is the component to be adjusted, the black-level signal is removed from an imaging signal. A black-level adjustment circuit includes a bypass circuit for allowing the black-level signal to be fed back to bypass a PGA that is a variable gain amplifier. When a black level is measured, the black-level signal passes through the bypass circuit. Thus, setting of a gain does not affect on the black-level signal. An offset component of the PGA has no adverse effect on the measurement of the black level. Moreover, a structure may be provided that inputs a reference voltage to an AD converter and detects and cancels an offset component of the AD converter. Furthermore, a similar structure may be also provided for the PGA.
摘要:
Eight resistors having resistance values of R×2i (i=0 to 7) (&OHgr;) are serially connected while eight switches exhibiting parasitic resistance values of r×2i (&OHgr;) in ON states are connected in parallel with the resistors respectively, for changing a resistance value by turning on/off the switches. The resistors are connected between an inversion input terminal of an operational amplifier and a terminal, and a non-inversion input terminal receives a prescribed reference voltage. Between the inversion input terminal and an output terminal of the operational amplifier, a resistor and a switch of a variable resistance circuit forming a negative feedback loop are connected to the output terminal while another resistor and another switch are connected to the inversion input terminal. In the variable resistance circuit, the resistance values of the resistors are successively increased from the side of the terminal, so that the resistor connected to the inversion input terminal has the maximum resistance value. Thus, only a single node is present ahead of the last resistor while a parasitic capacitance is minimized, whereby the frequency characteristic of an operational amplification circuit can be improved.
摘要:
A comparator converts an input analog RF signal to a digital signal and inputs the digital signal in a charge pump circuit. The charge pump circuit controls charging/discharging of an integration capacitor in response to the output level of the digital signal output from the comparator. The charging quantity of the integration capacitor is used as a reference voltage of an RF amplifier, and a center voltage level of the analog RF signal output from the RF amplifier is adjusted in response to an average dc level of the digital signal. Thus, it follows that a slice level of a signal reproducing circuit is properly controlled.