Electrically alterable memory cell
    31.
    发明授权
    Electrically alterable memory cell 有权
    电可变存储单元

    公开(公告)号:US07759719B2

    公开(公告)日:2010-07-20

    申请号:US11120691

    申请日:2005-05-02

    Applicant: Chih-Hsin Wang

    Inventor: Chih-Hsin Wang

    CPC classification number: H01L29/42324 H01L29/7881 H01L29/7883 H01L29/792

    Abstract: A nonvolatile memory cell is provided. The cell has a charge filter, a tunneling gate, a ballistic gate, a charge storage layer, a source, and a drain with a channel defined between the source and drain. The charge filter permits transporting of charge carriers of one polarity type from the tunneling gate through the blocking material and the ballistic gate to the charge storage layer while blocking the transport of charge carriers of an opposite polarity from the ballistic gate to the tunneling gate. Further embodiments of the present invention provide a cell having a charge filter, a supplier gate, a tunneling gate, a ballistic gate, a source, a drain, a channel, and a charge storage layer. The present invention further provides an energy band engineering method permitting the memory cell be operated without suffering from disturbs, from dielectric breakdown, from impact ionization, and from undesirable RC effects.

    Abstract translation: 提供非易失性存储单元。 电池具有在源极和漏极之间限定的沟道的电荷滤波器,隧道栅极,弹道栅极,电荷存储层,源极和漏极。 电荷滤波器允许将一种极性类型的载流子从隧道栅极通过阻挡材料和弹道栅传输到电荷存储层,同时阻止相反极性的电荷载体从弹道栅极传输到隧道栅极。 本发明的另外的实施例提供了一种具有电荷滤波器,供电门,隧道门,弹道门,源极,漏极,沟道和电荷存储层的电池。 本发明进一步提供了允许存储器单元在不受到电介质击穿,不受冲击电离和不期望的RC影响的干扰的情况下运行的能带工程方法。

    Method and apparatus transporting charges in semiconductor device and semiconductor memory device
    35.
    发明申请
    Method and apparatus transporting charges in semiconductor device and semiconductor memory device 有权
    在半导体器件和半导体存储器件中传输电荷的方法和装置

    公开(公告)号:US20070281425A1

    公开(公告)日:2007-12-06

    申请号:US11879090

    申请日:2007-07-16

    Applicant: Chih-Hsin Wang

    Inventor: Chih-Hsin Wang

    Abstract: A method of providing a memory cell comprises providing a semiconductor substrate including a body of a first conductivity type, first and second regions of a second conductivity type and a channel between the first and second regions; arranging a first insulator layer adjacent to the channel; arranging a charge storage region adjacent to the first insulator layer; arranging a second insulator layer adjacent to the charge storage region; arranging a first conductive region adjacent to the second insulator layer; arranging a filter adjacent to the first conductive region; and arranging a second conductive region adjacent to the filter. The second conductive region overlaps the first conductive region at an overlap surface. A line perpendicular to the overlap surface intersects at least a portion of the charge storage region.

    Abstract translation: 提供存储单元的方法包括:提供包括第一导电类型的主体,第二导​​电类型的第一和第二区域以及第一和第二区域之间的通道的半导体衬底; 布置与所述通道相邻的第一绝缘体层; 配置与所述第一绝缘体层相邻的电荷存储区域; 布置与电荷存储区域相邻的第二绝缘体层; 布置与所述第二绝缘体层相邻的第一导电区域; 布置与所述第一导电区域相邻的过滤器; 以及布置与所述过滤器相邻的第二导电区域。 第二导电区域在重叠表面处与第一导电区域重叠。 垂直于重叠表面的线与电荷存储区域的至少一部分相交。

    P-channel electrically alterable non-volatile memory cell
    36.
    发明申请
    P-channel electrically alterable non-volatile memory cell 有权
    P沟道电可变非易失性存储单元

    公开(公告)号:US20060033146A1

    公开(公告)日:2006-02-16

    申请号:US10962288

    申请日:2004-10-08

    Applicant: Chih-Hsin Wang

    Inventor: Chih-Hsin Wang

    Abstract: A nonvolatile memory cell is provided. The memory cell comprises a storage transistor and an injector in a semiconductor substrate of a p-type conductivity. The injector comprises a first region of the p-type conductivity and a second region of an n-type conductivity. The storage transistor comprises a source, a drain, a channel, a charge storage region, and a control gate. The source and the drain have the p-type conductivity and are formed in a well of the n-type conductivity in the substrate with the channel of the well defined therebetween. The charge storage region is disposed over and insulated from the channel by a first insulator. The control gate is disposed over and insulated from the charge storage region by a second insulator. Further provided are methods operating the memory cell, including means for injecting electrons from the channel through the first insulator onto the charge storage region and means for injecting holes from the injector through the well through the channel through the first insulator onto the charge storage region.

    Abstract translation: 提供非易失性存储单元。 存储单元包括p型导电性的半导体衬底中的存储晶体管和注入器。 注射器包括p型导电性的第一区域和n型导电性的第二区域。 存储晶体管包括源极,漏极,沟道,电荷存储区域和控制栅极。 源极和漏极具有p型导电性,并且形成在衬底中的n型导电性的阱中,阱之间的沟道被限定。 电荷存储区域通过第一绝缘体设置在沟道之上并与沟道绝缘。 控制栅极通过第二绝缘体设置在电荷存储区域之上并与电荷存储区域绝缘。 还提供了操作存储单元的方法,包括用于将电子从通道中通过第一绝缘体注入到电荷存储区上的装置,以及用于将来自注射器的孔穿过阱通过穿过第一绝缘体的沟道注入到电荷存储区上的装置。

    Safety device of collar for pet
    37.
    发明申请
    Safety device of collar for pet 失效
    宠物衣领安全装置

    公开(公告)号:US20050145203A1

    公开(公告)日:2005-07-07

    申请号:US10751294

    申请日:2004-01-02

    Applicant: Chih-Hsin Wang

    Inventor: Chih-Hsin Wang

    CPC classification number: A44B11/25 A01K27/005

    Abstract: A safety device is disclosed for use with a collar for a pet. The safety device includes a central member, a first lateral member and a second lateral member. The first lateral member is for pivotal and releasable engagement with the central member. The second lateral member is for pivotal and releasable engagement with the central member.

    Abstract translation: 公开了一种用于宠物衣领的安全装置。 安全装置包括中心构件,第一横向构件和第二横向构件。 第一横向构件用于与中心构件枢转和可释放地接合。 第二横向构件用于与中心构件枢转和可释放地接合。

    Multi-level memory cell read, program, and erase techniques
    38.
    发明授权
    Multi-level memory cell read, program, and erase techniques 有权
    多级存储单元读,编程和擦除技术

    公开(公告)号:US08792274B1

    公开(公告)日:2014-07-29

    申请号:US13590230

    申请日:2012-08-21

    Abstract: A system is provided and includes an array of cells, a first module, and a third module. The first module reads a state of a cell in the array to detect first bits stored in the cell. The third module, subsequent to the first module reading the state, performs a first operation on a first bit of the first bits and performs the first operation on a first of multiple signal inputs. The signal inputs indicate second bits of data to be stored in the cell. The third module performs a second operation on a second bit of the first bits and performs the second operation on a second one of the signal inputs. The first module, based on results of the first and second operations, performs a first erase operation or a first program operation on the cell to match the state of the cell to the second bits.

    Abstract translation: 提供了一种系统,包括一个单元阵列,一个第一模块和一个第三模块。 第一模块读取阵列中的单元的状态以检测存储在单元中的第一位。 第三模块在第一模块读取状态之后,对第一位的第一位执行第一操作,并且在多个信号输入中的第一个上执行第一操作。 信号输入表示要存储在单元中的数据的第二位。 第三模块对第一位的第二位执行第二操作,并对第二信号输入执行第二操作。 第一模块基于第一和第二操作的结果,对单元执行第一擦除操作或第一程序操作,以将该单元的状态与第二位相匹配。

    Array architecture including mirrored segments for nonvolatile memory device
    39.
    发明授权
    Array architecture including mirrored segments for nonvolatile memory device 有权
    阵列架构包括用于非易失性存储器件的镜像段

    公开(公告)号:US08116110B1

    公开(公告)日:2012-02-14

    申请号:US12340911

    申请日:2008-12-22

    CPC classification number: G11C8/12 G11C5/025 G11C16/0416

    Abstract: A memory device including nonvolatile memory cells arrayed in a first direction and in a second direction, a plurality of first lines extending in the first direction for coupling memory cells arrayed in the first direction, and a plurality of second lines extending in the second direction for coupling memory cells arrayed in the second direction. The memory device includes a plurality of decoders, including i) first decoders coupled to the first lines and ii) second decoders coupled to the second lines, for accessing any one or more of the memory cells in any order. The memory device includes a plurality of segments. Each segment includes different ones of the nonvolatile memory cells. A first one of the segments is juxtaposed to, in the second direction, a second one of the segments. The second one of the segments mirrors, in the second direction, the first one of the segments.

    Abstract translation: 一种存储器件,包括沿第一方向和第二方向排列的非易失性存储单元,沿第一方向延伸的多条第一线,用于耦合沿第一方向排列的存储单元,以及沿第二方向延伸的多条第二线, 耦合沿第二方向排列的存储单元。 存储器件包括多个解码器,包括i)耦合到第一线的第一解码器,以及ii)耦合到第二线的第二解码器,用于以任何顺序访问任何一个或多个存储器单元。 存储器件包括多个段。 每个段包括不同的非易失性存储单元。 该段中的第一个与第二个方向并列,分段中的第二个。 第二个片段在第二个方向上反射第一个片段。

    ROBOT AND METHOD FOR RECOGNIZING HUMAN FACES AND GESTURES THEREOF
    40.
    发明申请
    ROBOT AND METHOD FOR RECOGNIZING HUMAN FACES AND GESTURES THEREOF 审中-公开
    用于识别人类及其手段的机器人和方法

    公开(公告)号:US20110158476A1

    公开(公告)日:2011-06-30

    申请号:US12829370

    申请日:2010-07-01

    Abstract: A robot and a method for recognizing human faces and gestures are provided, and the method is applicable to a robot. In the method, a plurality of face regions within an image sequence captured by the robot are processed by a first classifier, so as to locate a current position of a specific user from the face regions. Changes of the current position of the specific user are tracked to move the robot accordingly. While the current position of the specific user is tracked, a gesture feature of the specific user is extracted by analyzing the image sequence. An operating instruction corresponding to the gesture feature is recognized by processing the gesture feature through a second classifier, and the robot is controlled to execute a relevant action according to the operating instruction.

    Abstract translation: 提供了一种用于识别人脸和手势的机器人和方法,并且该方法适用于机器人。 在该方法中,由机器人拍摄的图像序列内的多个面部区域由第一分类器处理,以便从面部区域定位特定用户的当前位置。 跟踪特定用户当前位置的变化,以相应地移动机器人。 当跟踪特定用户的当前位置时,通过分析图像序列来提取特定用户的手势特征。 通过通过第二分类器处理手势特征来识别对应于手势特征的操作指令,并且根据操作指令来控制机器人执行相关动作。

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