公开(公告)号：US08426226B2

公开(公告)日：2013-04-23

申请号：US13342431

申请日：2012-01-03

申请人： Jen-Inn Chyi ,  Geng-Yen Lee ,  Wei-Sheng Lin

发明人： Jen-Inn Chyi ,  Geng-Yen Lee ,  Wei-Sheng Lin

IPC分类号： H01L21/00

CPC分类号： H01L27/15

摘要： A method for fabricating an integrated AC LED module comprises steps: forming a junction layer on a substrate, and defining a first growth area and a second growth area on the junction layer; respectively growing a Schottky diode and a LED on the first growth area and the second growth area; forming a passivation layer and a metallic layer on the Schottky diode, the LED and the substrate. Thereby, the Schottky diode is electrically connected with the LED via the metallic layer. Thus is promoted the reliability of electric connection of diodes, reduced the layout area of the module, and decreased the fabrication cost.

摘要翻译： 一种用于制造集成AC LED模块的方法包括以下步骤：在衬底上形成结层，并在所述结层上限定第一生长区和第二生长区; 分别在第一个生长区和第二个生长区生长肖特基二极管和一个LED; 在肖特基二极管，LED和基板上形成钝化层和金属层。 由此，肖特基二极管经由金属层与LED电连接。 从而提高了二极管电连接的可靠性，减少了模块布局面积，降低了制造成本。

公开(公告)号：US20110180846A1

公开(公告)日：2011-07-28

申请号：US12694002

申请日：2010-01-26

申请人： Heng-Kuang Lin ,  Pei-Chin Chiu ,  Jen-Inn Chyi ,  Han-Chieh Ho ,  Clement Hsingjen Wann ,  Chih-Hsin Ko ,  Cheng-Hsien Wu

发明人： Heng-Kuang Lin ,  Pei-Chin Chiu ,  Jen-Inn Chyi ,  Han-Chieh Ho ,  Clement Hsingjen Wann ,  Chih-Hsin Ko ,  Cheng-Hsien Wu

IPC分类号： H01L27/092 ,  H01L29/20

CPC分类号： H01L29/205 ,  B82Y10/00 ,  H01L21/8252 ,  H01L27/085 ,  H01L27/0883 ,  H01L27/092 ,  H01L29/122 ,  H01L29/42316 ,  H01L29/42356 ,  H01L29/66462 ,  H01L29/7783

摘要： An integrated circuit structure includes a substrate and a first and a second plurality of III-V semiconductor layers. The first plurality of III-V semiconductor layers includes a first bottom barrier over the substrate; a first channel layer over the first bottom barrier; and a first top barrier over the first channel layer. A first field-effect transistor (FET) includes a first channel region, which includes a portion of the first channel layer. The second plurality of III-V semiconductor layers is over the first plurality of III-V semiconductor layers and includes a second bottom barrier; a second channel layer over the second bottom barrier; and a second top barrier over the second channel layer. A second FET includes a second channel region, which includes a portion of the second channel layer.

摘要翻译： 集成电路结构包括基板和第一和第二多个III-V半导体层。 所述第一多个III-V半导体层包括在所述衬底上的第一底部阻挡层; 在第一底部屏障上的第一通道层; 以及第一通道层上的第一顶部势垒。 第一场效应晶体管（FET）包括第一沟道区，其包括第一沟道层的一部分。 第二多个III-V半导体层在第一多个III-V半导体层之上，并且包括第二底部屏障; 在第二底部屏障上的第二通道层; 以及在第二通道层上的第二顶部阻挡层。 第二FET包括第二沟道区，其包括第二沟道层的一部分。

公开(公告)号：US20080017100A1

公开(公告)日：2008-01-24

申请号：US11526067

申请日：2006-09-25

申请人： Jen-Inn Chyi ,  Guan-Ting Chen

发明人： Jen-Inn Chyi ,  Guan-Ting Chen

IPC分类号： C30B23/00

CPC分类号： C30B23/02 ,  C30B25/02 ,  C30B29/16 ,  C30B29/403 ,  C30B29/406 ,  C30B29/605

摘要： A GaN based substrate is obtained with a simple etching. The GaN based substrate is separate from another base substrate with the etching. The whole process is easy and costs low. The substrate is made of a material having a matching lattice length for a lattice structure so that the substrate has good characteristics. And the GaN based substrate has good heat dissipation so that the stability and life-time of GaN based devices on the GaN based substrate are enhanced even when they are constantly operated under a high power.

摘要翻译： 通过简单的蚀刻获得GaN基衬底。 基于GaN的衬底与另一个基底基板分离。 整个过程很简单，成本低廉。 衬底由具有格子结构匹配的晶格长度的材料制成，使得衬底具有良好的特性。 并且GaN基衬底具有良好的散热性，使得GaN基衬底上的GaN基器件的稳定性和寿命即使在高功率下不断运行时也能够提高。

公开(公告)号：US06514814B2

公开(公告)日：2003-02-04

申请号：US09884029

申请日：2001-06-20

申请人： Cheng-Chung Jaing ,  Jyh-Shin Chen ,  Jen-Inn Chyi ,  Jeng-Jiing Sheu

发明人： Cheng-Chung Jaing ,  Jyh-Shin Chen ,  Jen-Inn Chyi ,  Jeng-Jiing Sheu

IPC分类号： H01L218242

CPC分类号： H01L28/56 ,  C23C14/088 ,  H01L28/60 ,  H01L28/75

摘要： A preparation for forming a thin film capacitor includes forming an amorphous ferroelectric film, such as barium strontium titanate [(Ba,Sr)TiO3] film, for use as an interface between a metal electrode and a polycrystalline ferroelectric film, such as (Ba,Sr) TiO3 film. The polycrystalline ferroelectric film serves as a dielectric layer of the thin film capacitor in view of the fact that the polycrystalline ferroelectric film has a high dielectric constant. The amorphous ferroelectric film serves as a buffer layer for inhibiting the leakage current of the thin film capacitor. The amorphous ferroelectric film is grown by sputtering and by introducing a working gas, such as argon, and a reactive gas, such as oxygen, into a reaction chamber in which a plasma is generated at room temperature.

摘要翻译： 用于形成薄膜电容器的制备包括：形成诸如钛酸锶钡[（Ba，Sr）TiO 3]膜的非晶铁电体膜，用作金属电极和多晶铁电体膜之间的界面，例如（Ba， Sr）TiO3膜。 鉴于多晶强电介质膜具有高介电常数的事实，多晶铁电体膜用作薄膜电容器的电介质层。 非晶铁电体膜用作抑制薄膜电容器的漏电流的缓冲层。 通过溅射和诸如氩的工作气体和诸如氧的反应性气体引入到在室温下产生等离子体的反应室中生长非晶铁电膜。

公开(公告)号：US08594474B2

公开(公告)日：2013-11-26

申请号：US13344657

申请日：2012-01-06

申请人： Hung-Chih Lu ,  Jen-Inn Chyi

发明人： Hung-Chih Lu ,  Jen-Inn Chyi

IPC分类号： G02B6/34 ,  G02F1/295

CPC分类号： G02B6/29353

摘要： A Mach-Zehnder wavelength division multiplexer (WDM) is provided. The WDM has a short length with flat passband and low crosstalk. Since passband is flattened, crosstalk is reduced and length of the WDM is shortened, the WDN can be used for optical communication and optical interconnection in a single chip.

摘要翻译： 提供了一种马赫曾德尔波分多路复用器（WDM）。 WDM具有短通道，通带平坦，串扰低。 由于通带扁平化，串扰减少，WDM长度缩短，WDN可用于单芯片中的光通信和光互连。

公开(公告)号：US08524583B2

公开(公告)日：2013-09-03

申请号：US13177330

申请日：2011-07-06

申请人： Jen-Inn Chyi ,  Hsueh-Hsing Liu ,  Hsien Yu Lin

发明人： Jen-Inn Chyi ,  Hsueh-Hsing Liu ,  Hsien Yu Lin

IPC分类号： H01L21/205

CPC分类号： H01L21/02639 ,  C30B23/025 ,  C30B23/04 ,  C30B25/04 ,  C30B25/186 ,  C30B29/403 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02647 ,  H01L33/007 ,  H01L33/16 ,  H01L33/20

摘要： A method for growing a semipolar nitride comprises steps: forming a plurality of parallel discrete trenches on a silicon substrate, each discrete trenches having a first wall and a second wall, wherein a tilt angle is formed between the surface of the silicon substrate and the first wall; forming a buffer layer on the silicon substrate and the trenches, wherein the buffer layer on the first wall has a plurality of growing zones and a plurality of non-growing zones among the growing zones and complementary to the growing zones; forming a cover layer on the buffer layer and revealing the growing zones; and growing a semipolar nitride from the growing zones of the buffer layer and covering the cover layer. Thereby cracks caused by thermal stress between the silicon substrate and semipolar nitride are decreased and the quality of the semipolar nitride film is improved.

摘要翻译： 用于生长半极性氮化物的方法包括以下步骤：在硅衬底上形成多个平行的离散沟槽，每个离散的沟槽具有第一壁和第二壁，其中在硅衬底的表面和第一壁之间形成倾斜角 壁; 在所述硅衬底和所述沟槽上形成缓冲层，其中所述第一壁上的所述缓冲层在所述生长区中具有多个生长区和多个非生长区，并与所述生长区互补; 在缓冲层上形成覆盖层并露出生长区; 以及从缓冲层的生长区域生长半极性氮化物并覆盖覆盖层。 由此，硅衬底和半极性氮化物之间的热应力引起的裂纹减少，并且提高了半极性氮化物膜的质量。

公开(公告)号：US08406579B2

公开(公告)日：2013-03-26

申请号：US13038553

申请日：2011-03-02

申请人： Hung-Chih Lu ,  Jen-Inn Chyi

发明人： Hung-Chih Lu ,  Jen-Inn Chyi

IPC分类号： G02F1/295 ,  G02B6/34

CPC分类号： G02F1/3133 ,  G02F2001/311 ,  G02F2203/585

摘要： A wavelength division multiplexing and optical modulation apparatus includes at least two modulation region-added grating-assisted cross-state directional coupler units and a modulation region-added cross-state directional coupler. The modulation region-added grating-assisted cross-state directional coupler units and the modulation region-added cross-state directional coupler unit are connected to one another in serial. Each of the modulation region-added grating-assisted cross-state directional coupler units each includes a modulation region-added cross-state directional coupler, a grating and a modulation region. The modulation region-added cross-state directional coupler unit includes an output waveguide, an input waveguide and a modulation region.

摘要翻译： 波分复用和光调制装置包括至少两个调制区域附加的光栅辅助交叉定向耦合器单元和调制区域增加的交叉定向耦合器。 调制区域附加的光栅辅助交叉定向耦合器单元和调制区域增加的交叉定向耦合器单元彼此串联连接。 调制区域附加光栅辅助交叉定向耦合器单元中的每一个均包括调制区域增加的交叉状态定向耦合器，光栅和调制区域。 调制区域增加的交叉定向耦合器单元包括输出波导，输入波导和调制区域。

公开(公告)号：US5637146A

公开(公告)日：1997-06-10

申请号：US413364

申请日：1995-03-30

申请人： Jen-Inn Chyi

发明人： Jen-Inn Chyi

IPC分类号： C30B25/10 ,  C30B35/00

CPC分类号： C30B29/403 ,  C30B25/105 ,  C30B29/406 ,  Y10T117/10 ,  Y10T117/1008

摘要： A method for the growth of semiconducting nitrides, such as GaN, InN, AlN, and their alloys, in an ultra-high vacuum chamber, wherein low energy atomic nitrogen is generated by a plasma-excited radical atom source, the atom beam is introduced to the heated substrate within a short distance, other gaseous reactants and dopants, such as TMGa, TMIn, TMAj, DEZn, CP.sub.2 Mg, SiH.sub.4, and similar organmetallic and hydride sources, are injected from a circular injector located between the substrate and the atom source, and therefore large area epitaxy with high growth rate is obtained.

摘要翻译： 在超高真空室中生长半导体氮化物如GaN，InN，AlN及其合金的方法，其中低能原子氮由等离子体激发的自由基原子源产生，引入原子束 在较短距离内的加热衬底上，其它气态反应物和掺杂剂如TMGa，TMIn，TMAj，DEZn，CP2Mg，SiH4和类似的有机金属和氢化物源从位于衬底和原子源之间的圆形注射器注入 ，因此获得了具有高生长速率的大面积外延。

公开(公告)号：US08253167B2

公开(公告)日：2012-08-28

申请号：US12694002

申请日：2010-01-26

申请人： Heng-Kuang Lin ,  Pei-Chin Chiu ,  Jen-Inn Chyi ,  Han-Chieh Ho ,  Clement Hsingjen Wann ,  Chih-Hsin Ko ,  Cheng-Hsien Wu

发明人： Heng-Kuang Lin ,  Pei-Chin Chiu ,  Jen-Inn Chyi ,  Han-Chieh Ho ,  Clement Hsingjen Wann ,  Chih-Hsin Ko ,  Cheng-Hsien Wu

IPC分类号： H01L27/092

CPC分类号： H01L29/205 ,  B82Y10/00 ,  H01L21/8252 ,  H01L27/085 ,  H01L27/0883 ,  H01L27/092 ,  H01L29/122 ,  H01L29/42316 ,  H01L29/42356 ,  H01L29/66462 ,  H01L29/7783

摘要： An integrated circuit structure includes a substrate and a first and a second plurality of III-V semiconductor layers. The first plurality of III-V semiconductor layers includes a first bottom barrier over the substrate; a first channel layer over the first bottom barrier; and a first top barrier over the first channel layer. A first field-effect transistor (FET) includes a first channel region, which includes a portion of the first channel layer. The second plurality of III-V semiconductor layers is over the first plurality of III-V semiconductor layers and includes a second bottom barrier; a second channel layer over the second bottom barrier; and a second top barrier over the second channel layer. A second FET includes a second channel region, which includes a portion of the second channel layer.

摘要翻译： 集成电路结构包括基板和第一和第二多个III-V半导体层。 所述第一多个III-V半导体层包括在所述衬底上的第一底部阻挡层; 在第一底部屏障上的第一通道层; 以及第一通道层上的第一顶部势垒。 第一场效应晶体管（FET）包括第一沟道区，其包括第一沟道层的一部分。 第二多个III-V半导体层在第一多个III-V半导体层之上，并且包括第二底部屏障; 在第二底部屏障上的第二通道层; 以及在第二通道层上的第二顶部阻挡层。 第二FET包括第二沟道区，其包括第二沟道层的一部分。

公开(公告)号：US08237174B2

公开(公告)日：2012-08-07

申请号：US12776834

申请日：2010-05-10

申请人： Peng-Ren Chen ,  Hsueh-Hsing Liu ,  Jen-Inn Chyi

发明人： Peng-Ren Chen ,  Hsueh-Hsing Liu ,  Jen-Inn Chyi

IPC分类号： H01L27/15 ,  H01L31/12 ,  H01L33/00

CPC分类号： H01L33/14 ,  H01L33/04

摘要： The present invention discloses an LED structure, wherein an N-type current spreading layer is interposed between N-type semiconductor layers to uniformly distribute current flowing through the N-type semiconductor layer. The N-type current spreading layer includes at least three sub-layers stacked in a sequence of from a lower band gap to a higher band gap, wherein the sub-layer having the lower band gap is near the substrate, and the sub-layer having the higher band gap is near the light emitting layer. Each sub-layer of the N-type current spreading layer is expressed by a general formula InxAlyGa(1-x-y)N, wherein 0≦x≦1, 0≦y≦1, and 0≦x+y≦1.

摘要翻译： 本发明公开了一种LED结构，其中N型电流扩展层插入在N型半导体层之间以均匀地分布流过N型半导体层的电流。 N型电流扩展层包括从低带隙到较高带隙的顺序堆叠的至少三个子层，其中具有较低带隙的子层在衬底附近，并且子层 具有较高带隙的发光层靠近发光层。 N型电流扩展层的每个子层由通式In x Al y Ga（1-x-y）N表示，其中0＆nlE; x＆nlE; 1,0＆amp; nlE; y＆nlE; 1和0＆nlE; x + y＆nlE;