公开(公告)号：US09590592B2

公开(公告)日：2017-03-07

申请号：US14752052

申请日：2015-06-26

Applicant: Cypress Semiconductor Corporation

Inventor： Jaskarn Singh Johal ,  Erhan Hancioglu ,  Renee Leong ,  Harold M. Kutz ,  Eashwar Thiagarajan ,  Onur Ozbek

IPC: H03H11/12 ,  H03H19/00 ,  G06G7/06 ,  H03K19/177

CPC classification number: H03M1/1245 ,  G06G7/06 ,  G06G7/14 ,  G06G7/186 ,  H03G3/20 ,  H03H19/004 ,  H03K19/177 ,  H03M3/494

Abstract: A fingerprint sensing circuit, system, and method is disclosed. The fingerprint sensor maybe include a plurality of inputs coupled to a plurality of fingerprint sensing electrodes and to an analog front end. The analog front end may be configured to generate at least one digital value in response to a capacitance of at least one of the plurality of fingerprint sensing electrodes. Additionally, the analog front end may include a quadrature demodulation circuit to generate at least one demodulated value for processing by a channel engine. The channel engine may generate a capacitance result value that is based, in part, on the demodulated value and is stored in a memory.

Abstract translation: 公开了一种指纹感测电路，系统和方法。 指纹传感器可以包括耦合到多个指纹感测电极和模拟前端的多个输入。 模拟前端可以被配置为响应于多个指纹感测电极中的至少一个的电容而产生至少一个数字值。 此外，模拟前端可以包括正交解调电路，以产生用于由信道引擎进行处理的至少一个解调值。 信道引擎可以产生部分地基于解调值并且存储在存储器中的电容结果值。

公开(公告)号：US20150349768A1

公开(公告)日：2015-12-03

申请号：US14493635

申请日：2014-09-23

Applicant: Cypress Semiconductor Corporation

Inventor： Eashwar Thiagarajan ,  Harold Kutz ,  Jaskarn Singh Johal ,  Erhan Hancioglu ,  Hans Klein ,  Bruce Byrkett ,  Mark Hastings ,  Dennis Seguine ,  Kendall Castor-Perry ,  Monte Mar ,  Gajender Rohilla

IPC: H03K17/00

CPC classification number: H03K17/00 ,  H03H19/00 ,  H03M1/007 ,  H03M1/068 ,  H03M1/18 ,  H03M1/442 ,  H03M1/468 ,  H03M1/70

Abstract: A first analog block includes a first plurality of switched capacitors and a second analog block includes a second plurality of switched capacitors. A switch associated with the first plurality of switched capacitors as well as a switch associated with the second plurality of switched capacitors may be configured based on one or more analog functions. The configuring of the first analog and the second analog block may include the configuring of the switch associated with the first plurality of switched capacitors when the analog function is associated with a first single ended signal and the configuring of both the switch associated with the first plurality of switched capacitors and the switch associated with the second plurality of switched capacitors when the analog function is associated with a differential signal

Abstract translation: 第一模拟块包括第一多个开关电容器，第二模拟块包括第二多个开关电容器。 可以基于一个或多个模拟功能来配置与第一多个开关电容器相关联的开关以及与第二多个开关电容器相关联的开关。 当模拟功能与第一单端信号相关联时，第一模拟模块和第二模拟模块的配置可以包括与第一多个开关电容器相关联的开关的配置，以及配置与第一多个开关电容器相关联的开关 的开关电容器和与第二多个开关电容器相关联的开关，当模拟功能与差分信号相关联时

公开(公告)号：US11770109B2

公开(公告)日：2023-09-26

申请号：US17901654

申请日：2022-09-01

Applicant: Cypress Semiconductor Corporation

Inventor： Erhan Hancioglu ,  Eashwar Thiagarajan ,  Eric Mann ,  Harold Kutz ,  Vaibhav Ramamoorthy ,  Rajiv Singh ,  Amsby Richardson, Jr.

IPC: H03F1/02 ,  H03F3/38 ,  H03F3/387 ,  H03M3/00

CPC classification number: H03F3/387 ,  H03M3/458 ,  H03F1/02 ,  H03F2200/171 ,  H03F2200/331 ,  H03F2200/375

Abstract: An integrated circuit can include an amplifier coupled to receive an analog input signal, an anti-aliasing filter (AAF) coupled to an output of the amplifier, a buffer circuit coupled to an output of the AAF, a sigma-delta modulator configured to generate a digital data stream in response to an output of the buffer, and a plurality of chopping circuits nested within one another, including a first pair of chopping circuits having at least the amplifier disposed therebetween and configured to remove offset in the analog input signal, and a second pair of chopping circuit having at least the first pair of chopping circuits disposed therebetween. The amplifier, AAF, sigma-delta modulator, and chopping circuits can be formed with the same integrated circuit substrate. Corresponding methods and systems are also disclosed.

公开(公告)号：US11533055B2

公开(公告)日：2022-12-20

申请号：US16369723

申请日：2019-03-29

Applicant: Cypress Semiconductor Corporation

Inventor： Eashwar Thiagarajan ,  Andrew Page ,  Harold Kutz ,  Kendall Castor-Perry ,  Rajiv Singh ,  Erhan Hancioglu ,  Bert Sullam

IPC: H03K19/173 ,  H03M1/12 ,  H03F3/72 ,  H03F3/189 ,  G06F13/28

Abstract: Implementations disclosed describe a programmable analog subsystem (PASS) having a plurality of reconfigurable analog circuits. The PASS may be coupled to an input/output device to receive an input signal and to an interface to communicate data with a central processing unit. In a first PASS configuration, with the plurality of reconfigurable analog circuits having a first configuration setting, the PASS may process the input signal through the plurality of reconfigurable analog circuits to generate a first output value based on the input signal. Responsive to the first output value, the PASS may reconfigure the plurality of reconfigurable analog circuits into a second PASS configuration having a second configuration setting, such that the second configuration setting is different than the first configuration setting.

公开(公告)号：US11496148B2

公开(公告)日：2022-11-08

申请号：US17242728

申请日：2021-04-28

Applicant: Cypress Semiconductor Corporation

Inventor： Eric N. Mann ,  Erhan Hancioglu ,  Eashwar Thiagarajan ,  Harold Kutz ,  Amsby D Richardson, Jr.

IPC: H03M3/00 ,  H03M1/06 ,  H03M1/18

Abstract: One or more systems and/or methods for implementing an analog-to-digital converter system with a floating digital channel configuration are provided. An analog input component is configured to receive measured analog signals, and output analog signals, corresponding to the measured analog signals, to an analog channel coupled to the analog input component. The analog channel is coupled to a switching component connected to a first digital channel and a second digital channel. The analog channel comprises a modulator configured to convert the analog signals into a data stream selectively input by the switching component to the first digital channel or the second digital channel.

公开(公告)号：US20220302925A1

公开(公告)日：2022-09-22

申请号：US17242728

申请日：2021-04-28

Applicant: Cypress Semiconductor Corporation

Inventor： Eric N. Mann ,  Erhan Hancioglu ,  Eashwar Thiagarajan ,  Harold Kutz ,  Amsby D Richardson, JR.

IPC: H03M3/00 ,  H03M1/18 ,  H03M1/06

Abstract: One or more systems and/or methods for implementing an analog-to-digital converter system with a floating digital channel configuration are provided. An analog input component is configured to receive measured analog signals, and output analog signals, corresponding to the measured analog signals, to an analog channel coupled to the analog input component. The analog channel is coupled to a switching component connected to a first digital channel and a second digital channel. The analog channel comprises a modulator configured to convert the analog signals into a data stream selectively input by the switching component to the first digital channel or the second digital channel.

公开(公告)号：US20200300910A1

公开(公告)日：2020-09-24

申请号：US16821555

申请日：2020-03-17

Applicant: Cypress Semiconductor Corporation

Inventor： Harold Kutz ,  Timothy John Williams ,  Bert Sullam ,  Warren S. Snyder ,  James H. Shutt ,  Bruce E. Byrkett ,  Monte Mar ,  Eashwar Thiagarajan ,  Nathan Wayne Kohagen ,  David G. Wright ,  Mark E Hastings ,  Dennis R. Seguine

IPC: G01R31/3177 ,  G06F13/28 ,  H03K19/173 ,  G01R31/317

Abstract: A microcontroller comprises a plurality of digital peripheral blocks and a direct memory access (DMA) controller coupled thereto. The plurality of digital peripheral blocks includes a digital peripheral block that is configured to issue a DMA request. Upon receipt of the DMA request, the DMA controller is configured to retrieve configuration information and to write the configuration information to a configuration register associated with a circuit element of the microcontroller.

公开(公告)号：US10762019B2

公开(公告)日：2020-09-01

申请号：US15647077

申请日：2017-07-11

Applicant: Cypress Semiconductor Corporation

Inventor： Timothy John Williams ,  David G. Wright ,  Harold M. Kutz ,  Eashwar Thiagarajan ,  Warren S. Snyder ,  Mark E Hastings

IPC: H03L5/00 ,  H01L25/00 ,  G06F13/40 ,  H03K19/173

Abstract: A programmable device, having an analog component coupled with an analog bus and a digital component coupled with a digital bus together with a set of 10 pads, each of which capable of being coupled to a bus line of one segment of the analog bus as well as to at least one digital bus line, and where the analog bus is capable of being used to connect a pair of the pads to each other.

公开(公告)号：US09831864B2

公开(公告)日：2017-11-28

申请号：US14865999

申请日：2015-09-25

Applicant: Cypress Semiconductor Corporation

Inventor： Eashwar Thiagarajan ,  Harold Kutz ,  Jaskarn Singh Johal ,  Erhan Hancioglu ,  Bruce Byrkett ,  Hans Klein ,  Mark Hastings ,  Dennis Seguine ,  Monte Mar ,  Gajender Rohilla ,  Kendall Castor-Perry ,  Onur Ozbek

IPC: H03M1/12 ,  H03K17/00 ,  H03H19/00 ,  H03F3/45

CPC classification number: H03K17/00 ,  H03F3/45475 ,  H03F2203/45512 ,  H03H19/004

Abstract: A first portion of a programmable switched capacitor block includes a first plurality of switched capacitors and a second portion of the programmable switched capacitor block includes a second plurality of switched capacitors. A first switch associated with the first plurality of switched capacitors as well as a second switch associated with the second plurality of switched capacitors may be configured based on a type of analog function that is to be provided. The configuring of the first analog and the second analog block may include the configuring of the first switch associated with the first plurality of switched capacitors when the analog function operates on a first single ended signal and the configuring of both the first and second switches when the analog function operates on a differential signal.

公开(公告)号：US20170286344A1

公开(公告)日：2017-10-05

申请号：US15463703

申请日：2017-03-20

Applicant: Cypress Semiconductor Corporation

Inventor： Bert S. Sullam ,  Harold M. Kutz ,  Timothy John Williams ,  James H. Shutt ,  Bruce E. Byrkett ,  Melany Ann Richmond ,  Nathan Wayne Kohagen ,  Mark E. Hastings ,  Eashwar Thiagarajan ,  Warren S. Snyder

IPC: G06F13/40

CPC classification number: G06F13/4022 ,  G06F2213/0038

Abstract: An integrated circuit device may include a reconfigurable analog signal switching fabric comprising a plurality of global buses that are selectively connected to external pins by pin connection circuits in response to changeable analog routing data, and a plurality of local buses that are selectively connected to analog blocks and/or global buses by routing connection circuits in response to the analog routing data; and at least one processor circuit that executes predetermined operations in response to instruction data.