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公开(公告)号：US20100026198A1
公开(公告)日：2010-02-04
申请号：US12510470
申请日：2009-07-28
CPC分类号： H01L21/26506
摘要： The light emitting device of the invention includes a first electrode, a second electrode, and a carrier formed between the first electrode and the second electrode and containing germanium light emitters, wherein the germanium light emitters contain germanium oxide in which at least part of the germanium oxide has oxygen deficiency and have a wavelength peak of emission in both or either the range of 250 to 350 nm and/or the range of 350 to 500 nm when a potential difference is applied to the first electrode and the second electrode.
摘要翻译： 本发明的发光器件包括第一电极，第二电极和形成在第一电极和第二电极之间并且包含锗发光体的载体，其中锗发光体包含锗氧化物，其中至少部分锗 当向第一电极和第二电极施加电位差时，氧化物具有缺氧并且在250至350nm的范围内和/或350至500nm的范围内都具有发射的波长峰值。
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公开(公告)号：US20050157529A1
公开(公告)日：2005-07-21
申请号：US10513959
申请日：2003-05-29
IPC分类号： G06K19/077 , G06K19/07 , H01L21/28 , H01L21/336 , H01L21/77 , H01L21/8244 , H01L21/8246 , H01L21/8247 , H01L21/84 , H01L27/105 , H01L27/11 , H01L27/115 , H01L27/12 , H01L29/788 , H01L29/792 , G11C11/22
CPC分类号： H01L27/11568 , H01L27/105 , H01L27/11 , H01L27/1116 , H01L27/115 , H01L27/11526 , H01L27/11531 , H01L27/1203 , H01L29/40117 , H01L29/66833 , H01L29/7923
摘要： An IC card includes a data memory portion (503) having a plurality of storage devices. The data storage devices each has: a semiconductor substrate, a well region provided in a semiconductor substrate, or a semiconductor film disposed on an insulator; a gate insulating film formed on the semiconductor substrate, the well region provided in the semiconductor substrate, or the semiconductor film disposed on the insulator; a single gate electrode formed on the gate insulating film; two memory function parts formed on opposite sides of the single gate electrode; a channel region disposed under the single gate electrode; and diffusion layer regions disposed on both sides of the channel region. Incorporating a memory using the storage devices, which allow further miniaturization, provides an IC card at low cost.
摘要翻译： IC卡包括具有多个存储装置的数据存储部分（503）。 数据存储装置各具有：半导体衬底，设置在半导体衬底中的阱区或设置在绝缘体上的半导体膜; 形成在半导体衬底上的栅极绝缘膜，设置在半导体衬底中的阱区或设置在绝缘体上的半导体膜; 形成在栅极绝缘膜上的单个栅电极; 形成在单个栅电极的相对侧上的两个记忆功能部件; 设置在所述单栅电极下方的沟道区域; 以及设置在沟道区两侧的扩散层区域。 结合使用存储装置的存储器，其允许进一步的小型化，以低成本提供IC卡。
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公开(公告)号：US20110089850A1
公开(公告)日：2011-04-21
申请号：US12904788
申请日：2010-10-14
申请人： Akihide Shibata , Tetsu Negishi , Satoshi Morishita , Kenji Komiya , Hiroshi Iwata , Akira Takahashi , Yoshifumi Yaoi
发明人： Akihide Shibata , Tetsu Negishi , Satoshi Morishita , Kenji Komiya , Hiroshi Iwata , Akira Takahashi , Yoshifumi Yaoi
CPC分类号： H05B33/0806 , H05B33/0803 , H05B33/0821
摘要： In a light emitting device, a P-type first region (506) and a P-type third region (508) are placed on both sides of an N-type second region (507) of a rod-like light emitting element (505). Therefore, even if connection of the first, third regions (506, 508) of the rod-like light emitting element (505) relative to the first, third electrodes (1, 3) is reversed, a diode polarity relative to the first, third electrodes (501, 503) is not reversed, making it possible to effectuate normal light emission. Thus, a connection of the first, third regions (506, 508) relative to the first, third electrodes (501, 503) may be reversed during a manufacturing process, making it unnecessary to provide marks or configurations for discrimination of orientation of the rod-like light emitting element (505), so that the manufacturing process can be simplified and manufacturing cost can be cut down.
摘要翻译： 在发光装置中，在杆状发光元件（505）的N型第二区域（507）的两侧配置P型第一区域（506）和P型第三区域（508） ）。 因此，即使棒状发光元件（505）的第一，第三区域（506,508）相对于第一，第三电极（1,3）的连接相反，二极管极性相对于第一， 第三电极（501,503）不反转，可以实现正常的发光。 因此，在制造过程中第一，第三区域（506,508）相对于第一，第三电极（501,503）的连接可以反转，使得不需要提供用于区分杆的取向的标记或构造 样的发光元件（505），从而能够简化制造工序，能够削减制造成本。
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34.发明授权Rod-like light-emitting device, method of manufacturing rod-like light-emitting device, backlight, illuminating device, and display device 有权棒状发光装置，棒状发光装置的制造方法，背光源，照明装置以及显示装置公开(公告)号：US08872214B2
公开(公告)日：2014-10-28
申请号：US12904773
申请日：2010-10-14
申请人： Tetsu Negishi , Akihide Shibata , Satoshi Morishita , Kenji Komiya , Hiroshi Iwata , Akira Takahashi
发明人： Tetsu Negishi , Akihide Shibata , Satoshi Morishita , Kenji Komiya , Hiroshi Iwata , Akira Takahashi
CPC分类号： H01L33/20 , H01L33/007 , H01L33/32 , H01L33/38 , H01L33/62 , H01L2224/48463 , H01L2924/3025 , H01L2924/00
摘要： To facilitate electrode connections and achieve a high light emitting efficiency, a rod-like light-emitting device includes a semiconductor core of a first conductivity type having a rod shape, and a semiconductor layer of a second conductivity type formed to cover the semiconductor core. The outer peripheral surface of part of the semiconductor core is exposed.
摘要翻译： 为了促进电极连接并实现高发光效率，棒状发光器件包括具有棒状的第一导电类型的半导体芯和形成为覆盖半导体芯的第二导电类型的半导体层。 露出半导体芯的一部分的外周面。
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35.发明授权Semiconductor storage device, manufacturing method therefor and portable electronic equipment 有权半导体存储装置及其制造方法及便携式电子设备公开(公告)号：US07315060B2
公开(公告)日：2008-01-01
申请号：US11142770
申请日：2005-06-02
IPC分类号： H01L29/792
CPC分类号： H01L29/6684 , G11C16/0475 , H01L21/28273 , H01L21/28282 , H01L21/28291 , H01L21/84 , H01L27/1203 , H01L29/66825 , H01L29/66833 , H01L29/7923
摘要： A semiconductor storage device has a single gate electrode formed on a semiconductor substrate through a gate insulation film. First and second memory function bodies formed on both sides of the gate electrode. A P-type channel region is formed in a surface of the substrate on the side of the gate electrode. N-type first and second diffusion regions are formed on both sides of the channel region. The channel region is composed of an offset region located under the first and second memory function bodies and a gate electrode beneath region located under the gate electrode. The concentration of a dopant which imparts a P-type conductivity to the offset region is effectively lower than the concentration of a dopant which imparts the P-type conductivity to the gate electrode beneath region. This makes it possible to provide the semiconductor storage device which is easily shrunk in scale.
摘要翻译： 半导体存储器件具有通过栅极绝缘膜形成在半导体衬底上的单个栅电极。 形成在栅电极两侧的第一和第二记忆功能体。 在栅极侧的基板的表面形成P型沟道区。 在沟道区域的两侧形成N型第一和第二扩散区域。 沟道区域由位于第一和第二存储器功能体下面的偏移区域和位于栅电极下方的栅极电极构成。 赋予偏移区域的P型导电性的掺杂剂的浓度有效地低于向区域下方的栅电极施加P型导电性的掺杂剂的浓度。 这使得可以提供容易缩小的半导体存储装置。
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公开(公告)号：US5960319A
公开(公告)日：1999-09-28
申请号：US699410
申请日：1996-08-19
IPC分类号： H01L21/265 , H01L21/28 , H01L21/285 , H01L21/336 , H01L21/8238 , H01L21/44
CPC分类号： H01L29/6659 , H01L21/26506 , H01L21/2652 , H01L21/26526 , H01L21/28052 , H01L21/28518 , H01L21/823807 , H01L29/665 , Y10S257/90
摘要： A semiconductor device and a fabrication method thereof are disclosed. A silicon nitride film is formed over a silicon semiconductor substrate. Impurity ions are then implanted into desired areas of the silicon semiconductor substrate, so that nitrogen atoms and silicon atoms from the silicon nitride film are incorporated into the surface of the silicon semiconductor substrate together with introduction of impurity ions. The silicon semiconductor substrate has a minimized content of oxygen mixed thereinto and restored crystal defects filled by nitrogen atoms upon implanting of impurity ions. The fabricated semiconductor device is free from a trade-off relation between gate-electrode depletion and junction current leakage, and short-channel effects.
摘要翻译： 公开了一种半导体器件及其制造方法。 在硅半导体衬底上形成氮化硅膜。 然后将杂质离子注入到硅半导体衬底的所需区域中，使得氮化硅膜的氮原子和硅原子与杂质离子的引入一起并入到硅半导体衬底的表面中。 硅半导体衬底具有混入其中的最小化的氧含量，并且在注入杂质离子时恢复由氮原子填充的晶体缺陷。 制造的半导体器件没有栅极电极耗尽和结电流泄漏之间的折衷关系以及短沟道效应。
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37.发明申请Semiconductor device having junction depths for reducing short channel effect 审中-公开具有用于降低短沟道效应的结深度的半导体器件公开(公告)号：US20050045962A1
公开(公告)日：2005-03-03
申请号：US10421713
申请日：2003-04-24
IPC分类号： H01L21/265 , H01L21/28 , H01L21/285 , H01L21/336 , H01L21/8238 , H01L29/76
CPC分类号： H01L21/26506 , H01L21/2652 , H01L21/26526 , H01L21/2658 , H01L21/28052 , H01L21/28518 , H01L21/823807 , H01L29/665 , H01L29/6659
摘要： A semiconductor device and a fabrication method thereof are disclosed. A silicon nitride film is formed over a silicon semiconductor substrate. Impurity ions are then implanted into desired areas of the silicon semiconductor substrate, so that nitrogen atoms and silicon atoms from the silicon nitride film are incorporated into the surface of the silicon semiconductor substrate together with introduction of impurity ions. The silicon semiconductor substrate has a minimized content of oxygen mixed thereinto and restored crystal defects filled by nitrogen atoms upon implanting of impurity ions. The fabricated semiconductor device is free from a trade-off relation between gate-electrode depletion and junction current leakage, and short-channel effects.
摘要翻译： 公开了一种半导体器件及其制造方法。 在硅半导体衬底上形成氮化硅膜。 然后将杂质离子注入到硅半导体衬底的所需区域中，使得氮化硅膜的氮原子和硅原子与杂质离子的引入一起并入到硅半导体衬底的表面中。 硅半导体衬底具有混入其中的最小化的氧含量，并且在注入杂质离子时恢复由氮原子填充的晶体缺陷。 制造的半导体器件没有栅极电极耗尽和结电流泄漏之间的折衷关系以及短沟道效应。
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38.发明授权公开(公告)号：US06677212B1
公开(公告)日：2004-01-13
申请号：US10070478
申请日：2002-05-02
IPC分类号： H01L27108
CPC分类号： H01L29/66598 , H01L21/26586 , H01L21/28525 , H01L29/1083 , H01L29/41766 , H01L29/41775 , H01L29/41783 , H01L29/6659
摘要： A gate oxide film (23), a gate electrode (24) and a gate cap insulating film (25) are stacked on an active region of a p-type semiconductor substrate (21), and an insulating side wall (29) is formed, followed by BF2 ion implantation. Thus, a surface of the p-type semiconductor substrate becomes amorphous so that single-crystal silicon is prevented from epitaxially growing in the next process of depositing polysilicon (33). Halo regions (32) are formed using the BF2 ions having the opposite conductivity to a source/drain to reduce the short-channel effect. The substrate is then passed through a nitrogen purge chamber having a dew point kept at −100° C. to remove water molecules completely, and polysilicon (33) is deposited. Because native oxide is prevented from growing at an interface between the active region and the polysilicon, source/drain regions (34) formed later by implantation and diffusion of n-type impurity ions achieve a uniform junction depth.
摘要翻译： 在p型半导体基板（21）的有源区上层叠有栅极氧化膜（23），栅极电极（24）和栅极绝缘膜（25），形成绝缘侧壁（29） ，然后进行BF2离子注入。 因此，p型半导体衬底的表面变为非晶态，从而在下一个沉积多晶硅的工艺中防止单晶硅外延生长（33）。 使用与源极/漏极具有相反导电性的BF 2离子形成光晕区域（32），以减少短沟道效应。 然后将基底通过具有保持在-100℃的露点的氮气净化室，以完全去除水分子，并沉积多晶硅（33）。 因为防止在有源区和多晶硅之间的界面处生长了自然氧化物，所以随后通过n型杂质离子的注入和扩散而形成的源/漏区（34）达到均匀的结深度。
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公开(公告)号：US06562699B1
公开(公告)日：2003-05-13
申请号：US09202714
申请日：1998-12-21
申请人： Kotaro Kataoka , Hiroshi Iwata , Masayuki Nakano
发明人： Kotaro Kataoka , Hiroshi Iwata , Masayuki Nakano
IPC分类号： H01L21322
CPC分类号： H01L21/02043 , H01L21/28052 , H01L21/28512 , H01L21/28518 , H01L21/76897 , H01L29/456 , H01L29/665 , H01L29/66545 , H01L29/6659 , H01L2924/0002 , H01L2924/00
摘要： By removing halogen atoms existing on the surface of the silicon layer and in the subsurface thereof so that the concentration of halogen atoms becomes 100 ppm or lower and forming an electrode on the resulting silicon layer, the electrode which has a low resistance can be produced, and a highly reliable semiconductor device can be produces as well.
摘要翻译： 通过除去存在于硅层表面和其表面上的卤素原子，使得卤素原子的浓度变为100ppm或更低，并且在所得硅层上形成电极，可以制备具有低电阻的电极， 并且还可以生产高可靠性的半导体器件。
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公开(公告)号：US07135386B2
公开(公告)日：2006-11-14
申请号：US10394024
申请日：2003-03-24
申请人： Kotaro Kataoka , Hiroshi Iwata , Masayuki Nakano
发明人： Kotaro Kataoka , Hiroshi Iwata , Masayuki Nakano
IPC分类号： H01L21/322
CPC分类号： H01L21/02043 , H01L21/28052 , H01L21/28512 , H01L21/28518 , H01L21/76897 , H01L29/456 , H01L29/665 , H01L29/66545 , H01L29/6659 , H01L2924/0002 , H01L2924/00
摘要： By removing halogen atoms existing on the surface of the silicon layer and in the subsurface thereof so that the concentration of halogen atoms becomes 100 ppm or lower and forming an electrode on the resulting silicon layer, the electrode which has a low resistance can be produced, and a highly reliable semiconductor device can be produces as well.
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