公开(公告)号：US20230127556A1

公开(公告)日：2023-04-27

申请号：US17743006

申请日：2022-05-12

Applicant: Infineon Technologies AG

Inventor： Bernhard Goller ,  Alexander Binter ,  Tobias Hoechbauer ,  Martin Huber ,  Iris Moder ,  Matteo Piccin ,  Francisco Javier Santos Rodriguez ,  Hans-Joachim Schulze

IPC: H01L21/02 ,  H01L21/288 ,  H01L21/78

Abstract: A method of processing a semiconductor wafer includes: forming one or more epitaxial layers over a first main surface of the semiconductor wafer; forming one or more porous layers in the semiconductor wafer or in the one or more epitaxial layers, wherein the semiconductor wafer, the one or more epitaxial layers and the one or more porous layers collectively form a substrate; forming doped regions of a semiconductor device in the one or more epitaxial layers; and after forming the doped regions of the semiconductor device, separating a non-porous part of the semiconductor wafer from a remainder of the substrate along the one or more porous layers.

公开(公告)号：US11581428B2

公开(公告)日：2023-02-14

申请号：US17078620

申请日：2020-10-23

Applicant: Infineon Technologies AG

Inventor： Alexander Philippou ,  Markus Beninger-Bina ,  Matteo Dainese ,  Christian Jaeger ,  Johannes Georg Laven ,  Francisco Javier Santos Rodriguez ,  Antonio Vellei ,  Caspar Leendertz ,  Christian Philipp Sandow

IPC: H01L29/73 ,  H01L29/739 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66 ,  H01L29/08 ,  H01L29/10 ,  H01L29/417 ,  H01L29/423

Abstract: A power semiconductor device includes an active cell region with a drift region of a first conductivity type, a plurality of IGBT cells arranged within the active cell region, each of the IGBT cells includes at least one trench that extends into the drift, an edge termination region surrounding the active cell region, a transition region arranged between the active cell region and the edge termination region, at least some of the IGBT cells are arranged within or extend into the transition region, a barrier region of a second conductivity type, the barrier region is arranged within the active cell region and in contact with at least some of the trenches of the IGBT cells and does not extend into the transition region, and a first load terminal and a second load terminal, the power semiconductor device is configured to conduct a load current along a vertical direction between.

公开(公告)号：US11476111B2

公开(公告)日：2022-10-18

申请号：US16811192

申请日：2020-03-06

Applicant: Infineon Technologies AG

Inventor： Iris Moder ,  Bernhard Goller ,  Tobias Franz Wolfgang Hoechbauer ,  Roland Rupp ,  Francisco Javier Santos Rodriguez ,  Hans-Joachim Schulze

IPC: H01L21/00 ,  H01L21/02 ,  H01L21/4757 ,  H01L21/475 ,  H01L21/467

Abstract: A semiconductor substrate includes a base portion, an auxiliary layer and a surface layer. The auxiliary layer is formed on the base portion. The surface layer is formed on the auxiliary layer. The surface layer is in contact with a first main surface of the semiconductor substrate. The auxiliary layer has a different electrochemical dissolution efficiency than the base portion and the surface layer. At least a portion of the auxiliary layer and at least a portion of the surface layer are converted into a porous structure. Subsequently, an epitaxial layer is formed on the first main surface.

公开(公告)号：US11239384B2

公开(公告)日：2022-02-01

申请号：US16986729

申请日：2020-08-06

Applicant: Infineon Technologies AG

Inventor： Francisco Javier Santos Rodriguez ,  Roland Rupp ,  Hans-Joachim Schulze

IPC: H01L31/18 ,  H01L31/068 ,  H01L23/29 ,  H01L23/31 ,  H01L21/02

Abstract: A semiconductor ingot is sliced to obtain a semiconductor slice with a front side surface and a rear side surface parallel to the front side surface. A passivation layer is formed directly on at least one of the front side surface and the rear side surface. A barrier layer including least one of silicon carbide, a ternary nitride, and a ternary carbide is formed on the rear side surface.

公开(公告)号：US11148943B2

公开(公告)日：2021-10-19

申请号：US15981393

申请日：2018-05-16

Applicant: Infineon Technologies AG

Inventor： Alexander Breymesser ,  Andre Brockmeier ,  Carsten von Koblinski ,  Francisco Javier Santos Rodriguez

IPC: H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  G02B6/12 ,  C03B11/08 ,  C03B40/02 ,  B81C99/00

Abstract: A semiconductor element is formed in a mesa portion of a semiconductor substrate. A cavity is formed in a working surface of the semiconductor substrate. The semiconductor substrate is brought in contact with a glass piece made of a glass material and having a protrusion. The glass piece and the semiconductor substrate are arranged such that the protrusion extends into the cavity. The glass piece is bonded to the semiconductor substrate. The glass piece is in-situ bonded to the semiconductor substrate by pressing the glass piece against the semiconductor substrate. During the pressing a temperature of the glass piece exceeds a glass transition temperature and the temperature and a force exerted on the glass piece are controlled to fluidify the glass material and after re-solidifying the protrusion completely fills the cavity.

公开(公告)号：US11107732B2

公开(公告)日：2021-08-31

申请号：US16410724

申请日：2019-05-13

Applicant: Infineon Technologies AG

Inventor： Francisco Javier Santos Rodriguez ,  Guenter Denifl ,  Tobias Franz Wolfgang Hoechbauer ,  Martin Huber ,  Wolfgang Lehnert ,  Roland Rupp ,  Hans-Joachim Schulze

IPC: H01L21/78 ,  H01L21/02

Abstract: A method for processing a wide band gap semiconductor wafer is proposed. The method includes depositing a non-monocrystalline support layer at a back side of a wide band gap semiconductor wafer, depositing an epitaxial layer at a front side of the wide band gap semiconductor wafer, and splitting the wide band gap semiconductor wafer along a splitting region to obtain a device wafer including at least a part of the epitaxial layer, and a remaining wafer including the non-monocrystalline support layer.

公开(公告)号：US11094779B2

公开(公告)日：2021-08-17

申请号：US15496223

申请日：2017-04-25

Applicant: Infineon Technologies AG

Inventor： Philip Christoph Brandt ,  Andre Rainer Stegner ,  Francisco Javier Santos Rodriguez ,  Frank Dieter Pfirsch ,  Hans-Joachim Schulze ,  Manfred Pfaffenlehner ,  Thomas Auer

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L29/861 ,  H01L21/225 ,  H01L21/266 ,  H01L21/324 ,  H01L21/761 ,  H01L29/739 ,  H01L29/74 ,  H01L21/265

Abstract: An edge delimits a semiconductor body in a direction parallel to a first side of the semiconductor body. A peripheral area is arranged between the active area and edge. A first semiconductor region of a first conductivity type extends from the active area into the peripheral area. A second semiconductor region of a second conductivity type forms a pn-junction with the first semiconductor region. A first edge termination region of the second conductivity type arranged at the first side adjoins the first semiconductor region, between the second semiconductor region and edge. A second edge termination region of the first conductivity type arranged at the first side and between the first edge termination region and edge has a varying concentration of dopants of the first conductivity type which increases at least next to the first edge termination region substantially linearly with an increasing distance from the first edge termination region.

公开(公告)号：US20210082861A1

公开(公告)日：2021-03-18

申请号：US17090941

申请日：2020-11-06

Applicant: Infineon Technologies AG

Inventor： Joachim Mahler ,  Michael Bauer ,  Jochen Dangelmaier ,  Reimund Engl ,  Johann Gatterbauer ,  Frank Hille ,  Michael Huettinger ,  Werner Kanert ,  Heinrich Koerner ,  Brigitte Ruehle ,  Francisco Javier Santos Rodriguez ,  Antonio Vellei

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/29 ,  H01L21/02 ,  H01L23/495

Abstract: In various embodiments, a method of forming an electrical contact is provided. The method may include depositing, by atomic layer deposition, a passivation layer over at least a region of a metal surface, wherein the passivation layer may include aluminum oxide, and electrically contacting the region of the metal surface with a metal contact structure, wherein the metal contact structure may include copper.

公开(公告)号：US20210050436A1

公开(公告)日：2021-02-18

申请号：US17087678

申请日：2020-11-03

Applicant: Infineon Technologies AG

Inventor： Antonio Vellei ,  Markus Beninger-Bina ,  Matteo Dainese ,  Christian Jaeger ,  Johannes Georg Laven ,  Alexander Philippou ,  Francisco Javier Santos Rodriguez

IPC: H01L29/739 ,  H01L29/06 ,  H01L29/40 ,  H01L21/033 ,  H01L21/225 ,  H01L21/265 ,  H01L21/324 ,  H01L29/10 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66

Abstract: A method of processing a power semiconductor device includes: providing a semiconductor body with a drift region of a first conductivity type; forming a plurality of trenches extending into the semiconductor body along a vertical direction and arranged adjacent to each other along a first lateral direction; providing a mask arrangement at the semiconductor body, the mask arrangement having a lateral structure according to which some of the trenches are exposed and at least one of the trenches is covered by the mask arrangement along the first lateral direction; forming, below bottoms of the exposed trenches, a plurality of doping regions of a second conductivity type complementary to the first conductivity type; removing the mask arrangement; and extending the plurality of doping regions in parallel to the first lateral direction such that the plurality of doping regions overlap and form a barrier region of the second conductivity type adjacent to the bottoms of the exposed trenches.

公开(公告)号：US10833218B2

公开(公告)日：2020-11-10

申请号：US15808561

申请日：2017-11-09

Applicant: Infineon Technologies AG

Inventor： Francisco Javier Santos Rodriguez ,  Roland Rupp ,  Hans-Joachim Schulze

IPC: H01L31/18 ,  H01L31/068 ,  H01L23/29 ,  H01L23/31 ,  H01L21/02

Abstract: A semiconductor ingot is sliced to obtain a semiconductor slice with a front side surface and a rear side surface parallel to the front side surface. A passivation layer is formed directly on at least one of the front side surface and the rear side surface. A barrier layer including least one of silicon carbide, a ternary nitride, and a ternary carbide is formed on the rear side surface.