公开(公告)号：US20210053148A1

公开(公告)日：2021-02-25

申请号：US16986411

申请日：2020-08-06

Applicant: Infineon Technologies AG

Inventor： Ralf Rieske ,  Alexander Binter ,  Wolfgang Diewald ,  Bernhard Goller ,  Heimo Graf ,  Gerald Lackner ,  Jan Richter ,  Roland Rupp ,  Guenter Schagerl ,  Marko Swoboda

IPC: B23K26/0622 ,  H01L21/78 ,  B23K26/00 ,  H01L21/02

Abstract: Provided is a parent substrate that includes a central region and an edge region. The edge region surrounds the central region. A detachment layer is formed in the central region. The detachment layer extends parallel to a main surface of the parent substrate. The detachment layer includes modified substrate material. A groove is formed in the edge region. The groove laterally encloses the central region. The groove runs vertically and/or tilted to the detachment layer.

公开(公告)号：US20230127556A1

公开(公告)日：2023-04-27

申请号：US17743006

申请日：2022-05-12

Applicant: Infineon Technologies AG

Inventor： Bernhard Goller ,  Alexander Binter ,  Tobias Hoechbauer ,  Martin Huber ,  Iris Moder ,  Matteo Piccin ,  Francisco Javier Santos Rodriguez ,  Hans-Joachim Schulze

IPC: H01L21/02 ,  H01L21/288 ,  H01L21/78

Abstract: A method of processing a semiconductor wafer includes: forming one or more epitaxial layers over a first main surface of the semiconductor wafer; forming one or more porous layers in the semiconductor wafer or in the one or more epitaxial layers, wherein the semiconductor wafer, the one or more epitaxial layers and the one or more porous layers collectively form a substrate; forming doped regions of a semiconductor device in the one or more epitaxial layers; and after forming the doped regions of the semiconductor device, separating a non-porous part of the semiconductor wafer from a remainder of the substrate along the one or more porous layers.

公开(公告)号：US09862037B2

公开(公告)日：2018-01-09

申请号：US15065914

申请日：2016-03-10

Applicant: Infineon Technologies AG

Inventor： Ingo Muri ,  Alexander Binter ,  Bernhard Goller ,  Christian Grindling

IPC: B23C3/13 ,  B23Q3/08 ,  H01L21/683 ,  H01L21/67 ,  H01L21/304

CPC classification number: B23C3/13 ,  B23Q3/088 ,  H01L21/304 ,  H01L21/67092 ,  H01L21/6838 ,  H01L21/6875 ,  H01L21/68757 ,  Y10T279/11 ,  Y10T409/3042

Abstract: According to various embodiments, a workpiece planarization arrangement may include: a chuck including a support carrier; and a workpiece-support replaceably mounted on the support carrier; and a planarization tool configured to planarize the at least one portion of the workpiece-support and to planarize one or more workpieces on the at least one portion of the workpiece-support.

公开(公告)号：US11712749B2

公开(公告)日：2023-08-01

申请号：US16986411

申请日：2020-08-06

Applicant: Infineon Technologies AG

Inventor： Ralf Rieske ,  Alexander Binter ,  Wolfgang Diewald ,  Bernhard Goller ,  Heimo Graf ,  Gerald Lackner ,  Jan Richter ,  Roland Rupp ,  Guenter Schagerl ,  Marko Swoboda

IPC: B23K26/0622 ,  H01L21/02 ,  B23K26/00 ,  H01L21/78

CPC classification number: B23K26/0624 ,  B23K26/0006 ,  H01L21/02378 ,  H01L21/7813

Abstract: Provided is a parent substrate that includes a central region and an edge region. The edge region surrounds the central region. A detachment layer is formed in the central region. The detachment layer extends parallel to a main surface of the parent substrate. The detachment layer includes modified substrate material. A groove is formed in the edge region. The groove laterally encloses the central region. The groove runs vertically and/or tilted to the detachment layer.

公开(公告)号：US20220339740A1

公开(公告)日：2022-10-27

申请号：US17691763

申请日：2022-03-10

Applicant: Infineon Technologies AG

Inventor： Benjamin Bernard ,  Alexander Binter ,  Heimo Graf

IPC: B23K26/53 ,  H01L21/268 ,  B23K26/06 ,  B23K26/067 ,  B23K26/073 ,  B23K26/0622 ,  B28D5/00

Abstract: A method of splitting a semiconductor work piece includes: forming a separation zone within the semiconductor work piece, wherein forming the separation zone comprises modifying semiconductor material of the semiconductor work piece at a plurality of targeted positions within the separation zone in at least one physical property which increases thermo-mechanical stress within the separation zone relative to a remainder of the semiconductor work piece, wherein modifying the semiconductor material in one of the targeted positions comprises focusing at least two laser beams to the targeted position; and applying an external force or stress to the semiconductor work piece such that at least one crack propagates along the separation zone and the semiconductor work piece splits into two separate pieces. Additional work piece splitting techniques and techniques for compensating work piece deformation that occurs during the splitting process are also described.

公开(公告)号：US20230330769A1

公开(公告)日：2023-10-19

申请号：US18336643

申请日：2023-06-16

Applicant: Infineon Technologies AG

Inventor： Ralf Rieske ,  Alexander Binter ,  Wolfgang Diewald ,  Bernhard Goller ,  Heimo Graf ,  Gerald Lackner ,  Jan Richter ,  Roland Rupp ,  Guenter Schagerl ,  Marko David Swoboda

IPC: B23K26/0622 ,  H01L21/02 ,  B23K26/00 ,  H01L21/78

CPC classification number: B23K26/0624 ,  H01L21/02378 ,  B23K26/0006 ,  H01L21/7813

Abstract: Provided is a machining apparatus including a profile sensor unit configured to obtain shape information about a parent substrate; and a laser scan unit configured to direct a laser beam onto the parent substrate, wherein a laser beam axis of the laser beam is tilted to an exposed main surface of the parent substrate, and wherein a track of the laser beam on the parent substrate is controllable as a function of the shape information obtained from the profile sensor unit.

公开(公告)号：US10199255B2

公开(公告)日：2019-02-05

申请号：US15446059

申请日：2017-03-01

Applicant: Infineon Technologies AG

Inventor： Ingo Muri ,  Alexander Binter ,  Bernhard Goller ,  Christian Grindling

IPC: H01L21/687 ,  H01L21/683 ,  B23C3/13 ,  B23Q3/08 ,  H01L21/67 ,  H01L21/304

Abstract: According to various embodiments, a workpiece planarization arrangement may include: a chuck including at least one portion configured to support one or more workpieces; and a planarization tool configured to planarize the at least one portion of the chuck and to planarize one or more workpieces on the at least one portion of the chuck; wherein the at least one portion of the chuck includes at least one of particles, pores and/or a polymer.