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31.
公开(公告)号:US20170188455A1
公开(公告)日:2017-06-29
申请号:US14998263
申请日:2015-12-26
申请人: Intel Corporation
CPC分类号: H05K1/0393 , A41D1/002 , A41D13/0015 , A43B1/0054 , A43B3/0005 , H05K1/03 , H05K1/118 , H05K1/189 , H05K3/0011 , H05K3/007 , H05K3/32 , H05K2201/0129 , H05K2201/0203 , H05K2201/0215 , H05K2201/08 , H05K2201/083 , H05K2203/0152 , H05K2203/104
摘要: In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for implementing a magnetic particle embedded flexible substrate, a printed flexible substrate for a magnetic tray, or an electro-magnetic carrier for magnetized or ferromagnetic flexible substrates. For instance, in accordance with one embodiment, there are means disclosed for fabricating a flexible substrate having one or more electrical interconnects to couple with leads of an electrical device; integrating magnetic particles or ferromagnetic particles into the flexible substrate; supporting the flexible substrate with a carrier plate during one or more manufacturing processes for the flexible substrate, in which the flexible substrate is held flat against the carrier plate by an attractive magnetic force between the magnetic particles or ferromagnetic particles integrated with the flexible substrate and a complementary magnetic attraction of the carrier plate; and removing the flexible substrate from the carrier plate subsequent to completion of the one or more manufacturing processes for the flexible substrate. Other related embodiments are disclosed.
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公开(公告)号:US20170186705A1
公开(公告)日:2017-06-29
申请号:US14757835
申请日:2015-12-26
申请人: Intel Corporation
发明人: Pramod Malatkar , Sairam Agraharam , Shawna Liff
IPC分类号: H01L23/00 , H01L23/498
CPC分类号: H01L23/564 , H01L21/02002 , H01L21/78 , H01L23/13 , H01L23/49838 , H01L23/562 , H01L24/80 , H01L29/0657 , H01L2924/10155 , H01L2924/15158 , H05K1/02 , H05K1/0271 , H05K2201/09027
摘要: Electronic device shape configuration technology is disclosed. In an example, an electronic device substrate is provided that can comprise a top surface, and a bottom surface opposing the top surface. The top surface and/or the bottom surface can have a non-rectangular shaped perimeter. An electronic device die is also provided that can comprise a top surface, and a bottom surface opposing the top surface. The top surface and/or the bottom surface can have a non-rectangular shaped perimeter. In addition, an electronic device package is provided that can comprise a substrate having a top surface configured to receive a die and a bottom surface opposing the top surface. The package can also include a die having a top surface and a bottom surface opposing the top surface. The die can be coupled to the top surface of the substrate. The top surface and/or the bottom surface of either the substrate, or the die, or both can have a non-rectangular shaped perimeter.
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33.
公开(公告)号:US20170181339A1
公开(公告)日:2017-06-22
申请号:US14974113
申请日:2015-12-18
申请人: Intel Corporation
发明人: Kyle Yazzie , Pramod Malatkar , Xiao Lu , Daniel Chavez-Clemente
CPC分类号: H05K13/0404 , H05K3/30 , H05K13/0408
摘要: A method of assembly comprising providing an assembly probe, the assembly probe having an end coupling face; providing a droplet of fluid on the end coupling face of the assembly probe; coupling an electronic component to the end coupling face of the assembly probe with the fluid droplet, the electronic component having a peripheral dimension equal to or less than 2 mm in each of length, width and height; placing the electronic component on a substrate with the assembly probe; decoupling the electronic component from the end coupling face of the assembly probe; and assembling the electronic component to the substrate.
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公开(公告)号:US09627227B2
公开(公告)日:2017-04-18
申请号:US14465325
申请日:2014-08-21
申请人: Intel Corporation
发明人: Pramod Malatkar , Drew W. Delaney
CPC分类号: H01L21/561 , H01L21/568 , H01L21/6835 , H01L23/562 , H01L24/19 , H01L24/20 , H01L24/32 , H01L24/73 , H01L25/105 , H01L25/16 , H01L25/50 , H01L2221/68372 , H01L2224/214 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/92244 , H01L2225/1035 , H01L2225/107 , H01L2924/01029 , H01L2924/12042 , H01L2924/1815 , H01L2924/3511 , H01L2924/00
摘要: The present disclosure relates to the field of fabricating microelectronic packages and the fabrication thereof, wherein a microelectronic device may be formed within a bumpless build-up layer coreless (BBUL-C) microelectronic package and wherein a warpage control structure may be disposed on a back surface of the microelectronic device. The warpage control structure may be a layered structure comprising at least one layer of high coefficient of thermal expansion material, including but not limited to a filled epoxy material, and at least one high elastic modulus material layer, such as a metal layer.
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公开(公告)号:US09548284B2
公开(公告)日:2017-01-17
申请号:US14132812
申请日:2013-12-18
申请人: Intel Corporation
IPC分类号: H01L23/00 , H01L21/603 , B29L31/34
CPC分类号: H01L24/75 , B29L2031/34 , B29L2031/3425 , H01L2021/603 , H01L2224/75102 , H01L2224/75252 , H01L2224/75266 , H01L2224/75301 , H01L2224/75501 , H01L2224/75502 , H01L2224/81203 , H01L2224/81801 , H01L2924/01008 , H01L2924/01014 , H01L2924/01022 , H01L2924/0104 , H01L2924/01074 , H01L2924/0474 , H01L2924/0489 , H01L2924/04894 , H01L2924/05032 , H01L2924/0549 , Y10T29/49826
摘要: Embodiments of a thermal compression bonding process bond head and a method for producing a thermal compression bonding process bond head are disclosed. In some embodiments, the bond head includes a thermal compression bonding process heater and a cooling block coupled to the heater through an annular structure. The annular structure surrounds a lower portion of the cooling block and couples the cooling block to the heater such that there is no direct mechanical contact between the cooling block and the heater.
摘要翻译: 公开了热压接工艺粘结头的实施例和用于制造热压接工艺粘合头的方法。 在一些实施例中,接合头包括热压接工艺加热器和通过环形结构联接到加热器的冷却块。 环形结构围绕冷却块的下部并且将冷却块连接到加热器,使得冷却块和加热器之间不存在直接的机械接触。
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