公开(公告)号：US20100161885A1

公开(公告)日：2010-06-24

申请号：US12555274

申请日：2009-09-08

申请人： Shinichi KANNO ,  Shigehiro Asano ,  Kazuya Kitsunai ,  Hirokuni Yano ,  Toshikatsu Hida

发明人： Shinichi KANNO ,  Shigehiro Asano ,  Kazuya Kitsunai ,  Hirokuni Yano ,  Toshikatsu Hida

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G11C16/10 ,  G11C11/5628 ,  G11C16/105 ,  G11C2216/14

摘要： A semiconductor storage device includes a first storage unit having a plurality of first blocks as data write regions; an instructing unit that issues a write instruction of writing data into the first blocks; a converting unit that converts an external address of input data to a memory position in the first block with reference to a conversion table in which external addresses of the data are associated with the memory positions of the data in the first blocks; and a judging unit that judges whether any of the first blocks store valid data associated with the external address based on the memory positions of the input data, wherein the instructing unit issues the write instruction of writing the data into the first block in which the valid data is not stored, when any of the first blocks does not store the valid data.

摘要翻译： 半导体存储装置包括具有作为数据写入区域的多个第一块的第一存储单元; 指示单元，其发出将数据写入到所述第一块中的写入指令; 转换单元，参照其中数据的外部地址与第一块中的数据的存储位置相关联的转换表，将输入数据的外部地址转换为第一块中的存储器位置; 以及判断单元，其基于所述输入数据的存储器位置判断所述第一块是否存储与所述外部地址相关联的有效数据，其中，所述指示单元发出将所述数据写入到所述第一块中的写入指令， 当任何第一个块不存储有效数据时，不存储数据。

公开(公告)号：US20090327803A1

公开(公告)日：2009-12-31

申请号：US12395811

申请日：2009-03-02

申请人： Kazuhiro Fukutomi ,  Hideaki Sato ,  Shinichi Kanno ,  Shigehiro Asano

发明人： Kazuhiro Fukutomi ,  Hideaki Sato ,  Shinichi Kanno ,  Shigehiro Asano

IPC分类号： G06F11/20

CPC分类号： G06F11/108

摘要： A RAID is configured using plural nonvolatile semiconductor memory devices to enable recovery of data stored in the nonvolatile semiconductor memory devices, and data is read from the nonvolatile semiconductor memory device included in the RAID in response to a data reading request inputted from outside. When an error occurs during the reading, data for which the reading error occurs is recovered, and rewritten into an area of the nonvolatile semiconductor memory device in which the reading error occurs.

摘要翻译： 使用多个非易失性半导体存储器件来配置RAID，以使得能够恢复存储在非易失性半导体存储器件中的数据，并且响应于从外部输入的数据读取请求，从包括在RAID中的非易失性半导体存储器件读取数据。 当在读取期间发生错误时，发生读取错误的数据被恢复，并被重写到发生读取错误的非易失性半导体存储器件的区域中。

公开(公告)号：US06611870B1

公开(公告)日：2003-08-26

申请号：US09136513

申请日：1998-08-19

申请人： Shigehiro Asano ,  Tatsunori Kanai ,  Shinichi Kanno ,  Seiji Maeda

发明人： Shigehiro Asano ,  Tatsunori Kanai ,  Shinichi Kanno ,  Seiji Maeda

IPC分类号： G06F1516

CPC分类号： G06F13/385

摘要： A server device and a communication connection scheme capable of expanding the memory bandwidth and thereby expanding the power to transmit Web data to the network are disclosed. Network cards are detachably attached to a host machine (main machine). Each network card contains a processor, a memory, and a network interface unit, where data are transmitted to the network from a memory on the network card and the memory bandwidth expansion is realized by the presence of a plurality of network cards. In addition, using a memory of the network card as a cache, the load on the host machine is reduced by transmitting data from this memory to the network when the data exists on the memory and a certain condition is satisfied.

摘要翻译： 公开了能够扩展存储器带宽并由此扩展将网络数​​据传输到网络的功能的服务器设备和通信连接方案。 网卡可拆卸地连接到主机（主机）。 每个网卡包含处理器，存储器和网络接口单元，其中数据从网卡上的存储器发送到网络，并且通过存在多个网卡来实现存储器带宽扩展。 此外，使用网卡的存储器作为缓存，当数据存在于存储器上并且满足一定条件时，通过从该存储器向网络发送数据来减少主机上的负载。

公开(公告)号：US06295560B1

公开(公告)日：2001-09-25

申请号：US09205368

申请日：1998-12-04

申请人： Shinichi Kanno ,  Shigehiro Asano

发明人： Shinichi Kanno ,  Shigehiro Asano

IPC分类号： G06F1300

CPC分类号： G06F9/5083

摘要： A data delivery system capable of distributing processing loads on the data supply side without providing the control processor, in which clients can receive data delivery without becoming conscious of the switching of processors that carry out the data delivery, is disclosed. In this data delivery system, a request from the client to the data delivery system is always received by all the data delivery units according to the shared lower layer address, while a response to the connection request is made by only one data delivery unit which has the response right at that moment using the unique lower layer address of that data delivery unit. In this way, it appears to the client as if the request is always made with respect to the same correspondent, while at the data supply side, the data delivery unit for responding to the client is appropriately switched by appropriately transferring the response right so as to realize the load distribution within the data delivery system.

摘要翻译： 公开了一种能够在不提供控制处理器的情况下在数据提供侧分配处理负荷的数据传送系统，其中客户端可以在不意识到进行数据传送的处理器的切换的情况下接收数据传送。 在该数据传送系统中，由所有数据传送单元总是按照共享的下层地址接收来自客户端到数据传送系统的请求，而对连接请求的响应仅由一个数据传送单元进行， 此时使用该数据传送单元的唯一下层地址的响应权限。 以这种方式，对于客户端来说，似乎总是针对相同的记者进行请求，而在数据提供端，通过适当地转移响应权来适当地切换用于响应客户端的数据传送单元，以便 实现数据传送系统内的负载分配。

公开(公告)号：US08549388B2

公开(公告)日：2013-10-01

申请号：US13035194

申请日：2011-02-25

申请人： Kazuhiro Fukutomi ,  Hiroshi Yao ,  Shinichi Kanno ,  Shigehiro Asano ,  Toshikatsu Hida ,  Yasuhiro Kimura

发明人： Kazuhiro Fukutomi ,  Hiroshi Yao ,  Shinichi Kanno ,  Shigehiro Asano ,  Toshikatsu Hida ,  Yasuhiro Kimura

IPC分类号： H03M13/00

CPC分类号： G06F11/108 ,  G06F2211/1059 ,  G06F2211/1073 ,  G06F2211/1092

摘要： According to one embodiment, a controller controls writing into and reading from a storage apparatus that includes a first data-storage unit and a second data-storage unit. The second data-storage unit stores user data and parity data of the user data. The first data-storage unit stores the parity data. The controller includes a parity updating unit and a parity writing unit. When parity data is updated, the parity updating unit writes the updated parity data into the first data-storage unit. When a certain requirement is satisfied, the parity writing unit reads the parity data written in the first data-storage unit, and writes the parity data thus read into the second data-storage unit.

摘要翻译： 根据一个实施例，控制器控制对包括第一数据存储单元和第二数据存储单元的存储装置的写入和读取。 第二数据存储单元存储用户数据和用户数据的奇偶校验数据。 第一数据存储单元存储奇偶校验数据。 控制器包括奇偶校验更新单元和奇偶校验写入单元。 当更新奇偶校验数据时，奇偶校验更新单元将更新的奇偶校验数据写入第一数据存储单元。 当满足特定要求时，奇偶写入单元读取写入第一数据存储单元中的奇偶校验数据，并将读出的奇偶校验数据写入第二数据存储单元。

公开(公告)号：US20130238838A1

公开(公告)日：2013-09-12

申请号：US13603989

申请日：2012-09-05

申请人： Kazuhiro FUKUTOMI ,  Shinichi Kanno ,  Shigehiro Asano

发明人： Kazuhiro FUKUTOMI ,  Shinichi Kanno ,  Shigehiro Asano

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F12/02 ,  G06F12/0802 ,  G06F12/0859 ,  G06F12/0868 ,  G06F12/0871 ,  G06F12/0873 ,  G06F2212/604 ,  G06F2212/7202 ,  G06F2212/7203

摘要： According to an embodiment, a controller is connected to an external storage device and controls access to a semiconductor storage device including blocks each including memory cell groups each having memory cells. The block includes pages associated with each memory cell group. A writing process for each memory cell group includes writing stages. The controller includes a determining unit configured to determine data to be transferred to the page required in the writing process for a first memory cell group before the writing stage first starts when the writing stage is performed; a reading unit configured to read the determined data from the semiconductor storage device and to store the read data in the external storage device before the writing stage starts; and a writing unit configured to perform the writing process using the data stored in the external storage device when the writing stage is performed.

摘要翻译： 根据实施例，控制器连接到外部存储装置，并且控制对包括各自包含存储单元的存储单元组的块的半导体存储装置的访问。 该块包括与每个存储器单元组相关联的页面。 每个存储单元组的写入过程包括写入阶段。 控制器包括：确定单元，被配置为在执行写入阶段时，在写入阶段首先开始之前，确定要传送到第一存储单元组的写入处理所需的页面的数据; 读取单元，其被配置为从所述半导体存储装置读取所确定的数据，并且在所述写入阶段开始之前将读取的数据存储在所述外部存储装置中; 以及写入单元，被配置为当执行写入阶段时，使用存储在外部存储装置中的数据执行写入处理。

公开(公告)号：US08341497B2

公开(公告)日：2012-12-25

申请号：US12713631

申请日：2010-02-26

申请人： Kazuhiro Fukutomi ,  Hideaki Sato ,  Shinichi Kanno ,  Shigehiro Asano

发明人： Kazuhiro Fukutomi ,  Hideaki Sato ,  Shinichi Kanno ,  Shigehiro Asano

IPC分类号： G11C29/00 ,  G06F11/00

CPC分类号： G06F11/108 ,  G06F11/1052

摘要： A semiconductor storage includes a receiver configured to receive a write request from a host device; a storage unit configured to hold redundancy data generation/non-generation information; a writing unit configured to write data in a semiconductor memory array and write redundancy data generation/non-generation information of the written data in the storage unit; a first data extracting unit configured to extract data whose redundancy data is not generated from among the data held by the semiconductor memory array; a first redundancy data generating unit configured to generate redundancy data; a first redundancy data writing unit configured to write the generated redundancy data in the semiconductor memory array; and a first redundancy data generation/non-generation information updating unit configured to update the redundancy data generation/non-generation information of the data whose redundancy data held by the storage unit is generated.

摘要翻译： 半导体存储器包括被配置为从主机设备接收写请求的接收器; 存储单元，被配置为保存冗余数据生成/非生成信息; 写入单元，被配置为在半导体存储器阵列中写入数据，并将写入的数据的冗余数据生成/非生成信息写入存储单元中; 第一数据提取单元，被配置为从半导体存储器阵列保存的数据中提取不产生冗余数据的数据; 第一冗余数据生成单元，被配置为生成冗余数据; 第一冗余数据写入单元，被配置为将所生成的冗余数据写入所述半导体存储器阵列中; 以及第一冗余数据生成/非生成信息更新单元，被配置为更新由所述存储单元保持的冗余数据生成的数据的冗余数据生成/非生成信息。

公开(公告)号：US08219861B2

公开(公告)日：2012-07-10

申请号：US13270788

申请日：2011-10-11

申请人： Toshikatsu Hida ,  Shinichi Kanno ,  Hirokuni Yano ,  Kazuya Kitsunai ,  Shigehiro Asano ,  Junji Yano

发明人： Toshikatsu Hida ,  Shinichi Kanno ,  Hirokuni Yano ,  Kazuya Kitsunai ,  Shigehiro Asano ,  Junji Yano

IPC分类号： G11C29/00

CPC分类号： G06F11/1412 ,  G06F11/1068 ,  G06F11/1402 ,  G06F12/02 ,  G11C16/0483 ,  G11C16/3418 ,  G11C16/3431

摘要： As a semiconductor storage device that can efficiently perform a refresh operation, provided is a semiconductor storage device comprising a non-volatile semiconductor memory storing data in blocks, the block being a unit of data erasing, and a controlling unit monitoring an error count of data stored in a monitored block selected from the blocks and refreshing data in the monitored block in which the error count is equal to or larger than a threshold value.

摘要翻译： 作为可以有效地执行刷新操作的半导体存储装置，提供了一种半导体存储装置，其包括以块为单位存储数据的非易失性半导体存储器，该块是数据擦除单元，以及监视数据的错误计数的控制单元 存储在从所述块中选择的监视块和所述监视块中的刷新数据中，其中所述错误计数等于或大于阈值。

公开(公告)号：US08060797B2

公开(公告)日：2011-11-15

申请号：US12529282

申请日：2008-09-22

申请人： Toshikatsu Hida ,  Shinichi Kanno ,  Hirokuni Yano ,  Kazuya Kitsunai ,  Shigehiro Asano ,  Junji Yano

发明人： Toshikatsu Hida ,  Shinichi Kanno ,  Hirokuni Yano ,  Kazuya Kitsunai ,  Shigehiro Asano ,  Junji Yano

IPC分类号： G06F11/00

CPC分类号： G06F11/1412 ,  G06F11/1068 ,  G06F11/1402 ,  G06F12/02 ,  G11C16/0483 ,  G11C16/3418 ,  G11C16/3431

摘要： A semiconductor storage device can efficiently perform a refresh operation. A semiconductor storage device is provided which includes a non-volatile semiconductor memory storing data in blocks, the block being a unit of data erasing. A controlling unit is further included monitoring an error count of data stored in a monitored block selected from the blocks and for refreshing data in the monitored block in which the error count is equal to or larger than a threshold value.

摘要翻译： 半导体存储装置可以有效地执行刷新操作。 提供一种半导体存储装置，其包括以块为单位存储数据的非易失性半导体存储器，该块是数据擦除的单位。 还包括控制单元，用于监视存储在从块中选择的监视块中的数据的错误计数，以及用于刷新其中错误计数等于或大于阈值的监视块中的数据。

公开(公告)号：US20100037011A1

公开(公告)日：2010-02-11

申请号：US12552442

申请日：2009-09-02

申请人： Hirokuni Yano ,  Shinichi Kanno ,  Toshikatsu Hida ,  Hidenori Matsuzaki ,  Kazuya Kitsunai ,  Shigehiro Asano

发明人： Hirokuni Yano ,  Shinichi Kanno ,  Toshikatsu Hida ,  Hidenori Matsuzaki ,  Kazuya Kitsunai ,  Shigehiro Asano

IPC分类号： G06F12/02

CPC分类号： G06F3/0604 ,  G06F3/0616 ,  G06F3/0631 ,  G06F3/064 ,  G06F3/0656 ,  G06F3/0658 ,  G06F3/0679 ,  G06F3/0685 ,  G06F12/0246 ,  G06F12/0804 ,  G06F12/0866 ,  G06F2212/7201 ,  G06F2212/7202 ,  G06F2212/7203 ,  G06F2212/7209 ,  G11C11/5628

摘要： A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second, third, and fourth memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data by a first management unit in the fourth memory area, a third processing for storing data by a second management unit in the third memory area, a fourth processing for moving an area of the third unit having the oldest allocation order in the fourth memory area to the second memory area, and a fifth processing for selecting data in the second memory area and copying the selected data to an empty area of the third unit in the second memory area.

摘要翻译： 半导体存储装置包括配置在非易失性半导体存储器中的易失性半导体存储器，第二，第三和第四存储区域中的第一存储区域和执行以下处理的控制器。 控制器执行第一处理，用于将第一单元存储在第一存储区域中的多个数据，第二处理，用于由第一管理单元存储在第四存储区域中的数据;第三处理，用于由第二管理单元存储数据 在第三存储区域中，用于将第四存储区域中具有最早分配顺序的第三单元的区域移动到第二存储区域的第四处理，以及用于选择第二存储区域中的数据并复制所选数据的第五处理 到第二存储器区域中的第三单元的空区域。