Process for production of an integrated circuit
    31.
    发明授权
    Process for production of an integrated circuit 失效
    集成电路生产工艺

    公开(公告)号:US5409857A

    公开(公告)日:1995-04-25

    申请号:US403934

    申请日:1989-09-07

    摘要: An integrated circuit is formed thereof a conductive wiring pattern. On the conductive wiring semiconductor layer is directly formed in a form of amorphous on the substrate. The amorphous semiconductor layer is annealed to form a polycrystalline structure while avoiding influence of annealing heat for the substrate. In the polycrystalline semiconductor layer is formed a semiconductor element, such as MOS transistor, MIS transistor, TFT and so forth. The semiconductor element is directly connected to the wiring pattern on the substrate.

    摘要翻译: 集成电路由导电布线图形形成。 导电布线半导体层直接在基板上形成非晶态。 将非晶半导体层进行退火以形成多晶结构,同时避免对基板的退火热的影响。 在多晶半导体层中形成诸如MOS晶体管,MIS晶体管,TFT等的半导体元件。 半导体元件直接连接到基板上的布线图案。

    Process for producing substrate of optical disc
    32.
    发明授权
    Process for producing substrate of optical disc 失效
    制造光盘基片的方法

    公开(公告)号:US4961884A

    公开(公告)日:1990-10-09

    申请号:US387661

    申请日:1989-07-31

    摘要: An improved injection molding process for producing a substrate of an optical disc having a high quality is disclosed. The process includes the steps of: fixing a stamper having protrusions corresponding to pits for recorded information or a groove for tracking onto one mold unit of a pair of mold units of an injection molding machine; combining the mold units to form a closed cavity between the pair of mold units; charging a molten molding resin into the cavity; cooling the resin in the cavity to form a molded substrate; separating one mold unit from another mold unit; and releasing the molded substrate simultaneously from both mold units when the two mold units are separated from each other by applying pressurized air onto both sides of the substrate.

    摘要翻译: 公开了一种用于制造具有高质量的光盘的基板的改进的注射成型方法。 该方法包括以下步骤:将具有与用于记录信息的凹坑相对应的突起的压模或用于跟踪的凹槽固定到注射成型机的一对模具单元的一个模具单元上; 组合所述模具单元以在所述一对模具单元之间形成封闭空腔; 将熔融成型树脂装入空腔中; 冷却空腔中的树脂以形成模塑基材; 将一个模具单元与另一个模具单元分离; 并且当两个模具单元通过在基板的两侧上施加加压空气而彼此分离时,从两个模具单元同时释放模制基板。

    Apparatus for detecting a surface flaw of a material at high temperature
    33.
    发明授权
    Apparatus for detecting a surface flaw of a material at high temperature 失效
    用于在高温下检测材料的表面缺陷的装置

    公开(公告)号:US4118732A

    公开(公告)日:1978-10-03

    申请号:US768822

    申请日:1977-02-15

    IPC分类号: G01N25/72 H04N7/18

    CPC分类号: G01N25/72

    摘要: The present invention is an apparatus for detecting a surface flaw in hot metal including a particularly designed television camera, a shutter means and a control circuit which compensates the television camera's shading as well as the temperature difference among normal parts of the observed material.The apparatus makes it possible to conduct clear detection of a flaw on the surface of the hot material as it is so that yield loss at the time of scarfing can be avoided while heat energy can effectively be utilized.

    摘要翻译: 本发明是一种用于检测热金属表面缺陷的装置,包括特别设计的电视摄像机,快门装置和控制电路,其补偿电视摄像机的阴影以及观察材料的正常部分之间的温差。

    METHOD FOR PRODUCING ELECTRICALLY-CONDUCTING MATERIAL WITH MODIFIED SURFACE
    34.
    发明申请
    METHOD FOR PRODUCING ELECTRICALLY-CONDUCTING MATERIAL WITH MODIFIED SURFACE 有权
    用改性表面生产导电材料的方法

    公开(公告)号:US20140144782A1

    公开(公告)日:2014-05-29

    申请号:US13819121

    申请日:2011-08-26

    IPC分类号: C25D5/16

    摘要: A method to inexpensively and efficiently produce conductive materials on the surface of which a nano-level fine structure is formed includes surface modification including immersing a stable anode electrode and a workpiece as a cathode electrode, the workpiece including a conductive material with a work surface, in an electrolytic solution, then applying a voltage not less than a first voltage and less than a second voltage between the stable anode electrode and the workpiece as the cathode electrode immersed in the electrolytic solution, thereby modifying the work surface, the first voltage being a voltage corresponding to a current value that is ½ of the sum of a first maximum current value appearing first in a positive voltage region and a first minimum current value appearing first in the positive voltage region with respect to voltage-current characteristics of a surface modification treatment system, the second voltage exhibiting a complete-state plasma.

    摘要翻译: 在其上形成纳米级精细结构的表面上廉价有效地制造导电材料的方法包括表面改性,包括浸渍稳定的阳极电极和工件作为阴极,工件包括具有工作表面的导电材料, 在电解液中,在浸渍在电解液中的阴极电极之间施加稳定的阳极和工件之间的不小于第一电压和小于第二电压的电压,从而改变工作表面,第一电压为 对应于相对于表面改性处理的电压 - 电流特性,正电压区域中首先出现的第一最大电流值和正电压区域中首先出现的第一最小电流值之和的电流值的1/2的电压 系统,第二电压呈现完全状态的等离子体。

    Plasma processing method
    35.
    发明授权
    Plasma processing method 有权
    等离子体处理方法

    公开(公告)号:US08497213B2

    公开(公告)日:2013-07-30

    申请号:US12013537

    申请日:2008-01-14

    IPC分类号: H01L21/302

    摘要: The invention provides a method for subjecting laminated thin films disposed below a photoresist mask pattern to plasma processing, wherein the roughness on the side walls of the formed pattern is reduced, and the LER and LWR are reduced. When etching a material to be processed to form a gate electrode including thin films such as a gate insulating film 205, a conducting layer 204, a mask layer 203 and an antireflection film 202 laminated on a semiconductor substrate 206 and a photoresist mask pattern 201 disposed on the antireflection film, prior to etching the mask pattern 201, plasma is generated from nitrogen gas or a mixed gas including nitrogen gas and deposition gas to subject the mask pattern 201 to a plasma curing process so as to reduce the roughness on the surface and side walls of the mask pattern 201, and then the laminated thin films 202, 203 and 204 disposed below the mask pattern 201 are subjected to a plasma etching process.

    摘要翻译: 本发明提供了一种用于对设置在光致抗蚀剂掩模图案下方的层叠薄膜进行等离子体处理的方法,其中形成图案的侧壁上的粗糙度减小,并且LER和LWR减小。 当蚀刻待处理的材料以形成包括诸如栅极绝缘膜205,导电层204,掩模层203和层叠在半导体衬底206上的抗反射膜202和设置的光刻胶掩模图案201的薄膜的栅电极时 在防反射膜上,在蚀刻掩模图案201之前,从氮气或包括氮气和沉积气体的混合气体产生等离子体,以使掩模图案201进行等离子体固化处理,以减少表面上的粗糙度, 掩模图案201的侧壁,然后设置在掩模图案201下方的层叠薄膜202,203和204进行等离子体蚀刻处理。

    ELECTRONIC COMPONENT PROVIDED WITH CU-AL-CO-BASED ALLOY ELECTRODE OR WIRING
    36.
    发明申请
    ELECTRONIC COMPONENT PROVIDED WITH CU-AL-CO-BASED ALLOY ELECTRODE OR WIRING 有权
    电子元件提供基于铜合金的电极或接线

    公开(公告)号:US20120285733A1

    公开(公告)日:2012-11-15

    申请号:US13263359

    申请日:2010-04-08

    IPC分类号: H01B1/02 H05K1/09 H01B5/00

    摘要: An object of the present invention is to provide an electronic component using a Cu-based conductive material that can suppress oxidization even in a heat treatment in an oxidizing atmosphere and that can suppress an increase in an electrical resistance. In an electronic component having an electrode or a wiring, a ternary alloy made from three elements consisting of Cu, Al, and Co is used as a Cu-based wiring material that can prevent oxidization of the electrode or the wiring. Specifically, part or the whole of the electrode or the wiring has a chemical composition in which an Al content is 10 at % to 25 at %, a Co content is 5 at % to 20 at %, and the balance is composed of Cu and unavoidable impurities, and the chemical composition represents a ternary alloy in which two phases of a Cu solid solution formed by Al and Co being dissolved into Cu and a CoAl intermetallic compound coexist together.

    摘要翻译: 本发明的目的是提供一种使用Cu基导电材料的电子部件,即使在氧化气氛中的热处理中也能够抑制氧化,并且能够抑制电阻的增加。 在具有电极或布线的电子部件中,使用由Cu,Al和Co组成的三个元素制成的三元合金作为能够防止电极或布线的氧化的Cu系布线材料。 具体地说,电极或布线的一部分或全部具有Al含量为10原子%至25原子%的Co化学组成,Co含量为5原子%至20原子%,余量由Cu和 不可避免的杂质,化学组成表示三元合金,其中由Al和Co形成的Cu固溶体中的两相溶解于Cu和CoAl金属间化合物共存。

    Plasma Processing Apparatus and Plasma Processing Method
    37.
    发明申请
    Plasma Processing Apparatus and Plasma Processing Method 审中-公开
    等离子体处理装置和等离子体处理方法

    公开(公告)号:US20120145323A1

    公开(公告)日:2012-06-14

    申请号:US13399465

    申请日:2012-02-17

    IPC分类号: B05C11/00

    CPC分类号: H01L21/6833 H01J37/32706

    摘要: A plasma processing apparatus for subjecting a substrate to be processed to plasma processing includes a processing chamber, a substrate electrode having an electrostatic chuck mechanism, a plasma generator, a high-frequency bias power supply which applies a high-frequency bias voltage to the substrate electrode, a voltage monitor which monitors the high-frequency bias voltage, a current monitor which monitors a high-frequency bias current, a measurement storage unit which stores a resistance component, an induction component and a capacity component of the electrostatic chuck mechanism, which have been calculated beforehand as fitting parameters of an expression V w = V esc - R esc  I esc - L esc   I esc  t - 1 C esc  ∫ I esc   t + A , ( A ) that is an approximate curve of a correlation among a voltage of the substrate, a computing unit which estimates the voltage of the substrate according to the expression, and a control unit that generates a control signal for the high-frequency bias power supply based on the voltage of the substrate.

    摘要翻译: 用于对待处理的基板进行等离子体处理的等离子体处理装置包括处理室,具有静电卡盘机构的基板电极,等离子体发生器,向基板施加高频偏置电压的高频偏置电源 电极,监视高频偏置电压的电压监视器,监视高频偏置电流的电流监视器,存储电阻分量的测量存储单元,静电卡盘机构的感应部件和电容分量,其中 预先计算出的表达式的拟合参数V w = V esc - R esc I I I - - - - - - - ( - 衬底的电压,根据表达式估计衬底的电压的计算单元和产生t的控制信号的控制单元之间的相关性的近似曲线 他基于基板电压的高频偏置电源。

    Plasma processing apparatus and plasma processing method
    40.
    发明授权
    Plasma processing apparatus and plasma processing method 有权
    等离子体处理装置和等离子体处理方法

    公开(公告)号:US07807581B2

    公开(公告)日:2010-10-05

    申请号:US11683014

    申请日:2007-03-07

    IPC分类号: H01L21/302

    摘要: The present invention provides a plasma processing apparatus or a plasma processing method that can etch a multilayer film structure for constituting a gate structure with high accuracy and high efficiency. A plasma processing method of, on processing a sample on a sample stage 112 in a depressurized discharge room 117, etching a multilayer film (including a high-k and a metal gate) at 0.1 Pa or less and with the sample stage 112 temperature-regulated by using a pressure gauge 133 to be used for pressure regulation and connected to the processing room and a main pump for exhaustion 130.

    摘要翻译: 本发明提供等离子体处理装置或等离子体处理方法,其可以以高精度和高效率蚀刻用于构成栅极结构的多层膜结构。 一种等离子体处理方法,在对减压排出室117中的样品台112上的样品进行处理时,蚀刻0.1Pa以下的多层膜(包括高k和金属栅极),并且在样品台112中, 通过使用用于压力调节并连接到处理室的压力计133和用于耗尽的主泵130进行调节。