公开(公告)号：US20130127584A1

公开(公告)日：2013-05-23

申请号：US13298661

申请日：2011-11-17

申请人： Ronald G. Filippi ,  Griselda Bonilla ,  Kaushik Chanda ,  Samuel S. Choi ,  Stephan Grunow ,  Naftali E. Lustig ,  Andrew H. Simon

发明人： Ronald G. Filippi ,  Griselda Bonilla ,  Kaushik Chanda ,  Samuel S. Choi ,  Stephan Grunow ,  Naftali E. Lustig ,  Andrew H. Simon

IPC分类号： H01H85/04

CPC分类号： G11C17/16 ,  G11C29/702 ,  H01H2085/466 ,  H01L23/5226 ,  H01L23/5256 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A metal fuse structure using redundant vias. The redundant vias are formed on one metal level in a stacked via metal fuse structure to force failures to occur in the metal level that does not have the redundant vias. The metal fuse structure includes: a first dielectric layer having a metal feature; a second dielectric layer having a first metal connector embedded therein; and a third dielectric layer having a second metal connector embedded therein. The metal connectors include at least one via and one line, and at least one metal connector has at least two vias.

摘要翻译： 使用冗余通孔的金属保险丝结构。 冗余通孔在堆叠的通孔金属熔断器结构中的一个金属层上形成，以迫使在不具有冗余通孔的金属层中发生故障。 金属熔丝结构包括：具有金属特征的第一介电层; 第二电介质层，其中嵌有第一金属连接器; 以及具有嵌入其中的第二金属连接器的第三电介质层。 金属连接器包括至少一个通孔和一条线，并且至少一个金属连接器具有至少两个通孔。

公开(公告)号：US20130005137A1

公开(公告)日：2013-01-03

申请号：US13609668

申请日：2012-09-11

申请人： Takeshi Nogami ,  Thomas M. Shaw ,  Andrew H. Simon ,  Jean E. Wynne ,  Chih-Chao Yang

发明人： Takeshi Nogami ,  Thomas M. Shaw ,  Andrew H. Simon ,  Jean E. Wynne ,  Chih-Chao Yang

IPC分类号： H01L21/768

CPC分类号： H01L23/53238 ,  H01L21/76844 ,  H01L21/76846 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method patterns at least one opening in a low-K insulator layer of a multi-level integrated circuit structure, such that a copper conductor is exposed at the bottom of the opening. The method then lines the sidewalls and the bottom of the opening with a first Tantalum Nitride layer in a first chamber and forms a Tantalum layer on the first Tantalum Nitride layer in the first chamber. Next, sputter etching on the opening is performed in the first chamber, so as to expose the conductor at the bottom of the opening. A second Tantalum Nitride layer is formed on the conductor, the Tantalum layer, and the first Tantalum Nitride layer, again in the first chamber. After the second Tantalum Nitride layer is formed, the methods herein form a flash layer comprising a Platinum group metal on the second Tantalum Nitride layer in a second, different chamber.

摘要翻译： 一种方法图形为多级集成电路结构的低K绝缘体层中的至少一个开口，使得铜导体在开口的底部露出。 该方法然后在第一室中用第一钽氮化物层排列开口的侧壁和底部，并在第一室中的第一氮化钽层上形成钽层。 接下来，在第一室中进行对开口的溅射蚀刻，以使开口底部的导体露出。 在第一室中再次在导体，钽层和第一氮化钽层上形成第二钽氮化物层。 在形成第二钽氮化物层之后，本文的方法在第二不同室中在第二氮化钽层上形成包含铂族金属的闪蒸层。

公开(公告)号：US20090179328A1

公开(公告)日：2009-07-16

申请号：US12013649

申请日：2008-01-14

申请人： Takeshi Nogami ,  Thomas M. Shaw ,  Andrew H. Simon ,  Jean E. Wynne ,  Chih-Chao Yang

发明人： Takeshi Nogami ,  Thomas M. Shaw ,  Andrew H. Simon ,  Jean E. Wynne ,  Chih-Chao Yang

IPC分类号： H01L23/52 ,  H01L21/4763

CPC分类号： H01L23/53238 ,  H01L21/76844 ,  H01L21/76846 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method patterns at least one opening in a low-K insulator layer of a multi-level integrated circuit structure, such that a copper conductor is exposed at the bottom of the opening. The method then lines the sidewalls and the bottom of the opening with a first Tantalum Nitride layer in a first chamber and forms a Tantalum layer on the first Tantalum Nitride layer in the first chamber. Next, sputter etching on the opening is performed in the first chamber, so as to expose the conductor at the bottom of the opening. A second Tantalum Nitride layer is formed on the conductor, the Tantalum layer, and the first Tantalum Nitride layer, again in the first chamber. After the second Tantalum Nitride layer is formed, the methods herein form a flash layer comprising a Platinum group metal on the second Tantalum Nitride layer in a second, different chamber. After this processing, the structure can be moved to a third chamber where copper is deposited on the flash layer in the opening until the opening is coated with copper in a third chamber.

摘要翻译： 一种方法图形为多级集成电路结构的低K绝缘体层中的至少一个开口，使得铜导体在开口的底部露出。 该方法然后在第一室中用第一钽氮化物层排列开口的侧壁和底部，并在第一室中的第一氮化钽层上形成钽层。 接下来，在第一室中进行对开口的溅射蚀刻，以使开口底部的导体露出。 在第一室中再次在导体，钽层和第一氮化钽层上形成第二钽氮化物层。 在形成第二钽氮化物层之后，本文的方法在第二不同室中在第二氮化钽层上形成包含铂族金属的闪蒸层。 在该处理之后，可以将结构移动到第三室，其中铜沉积在开口中的闪蒸层上，直到在第三室中用铜涂覆开口。

公开(公告)号：US20090098728A1

公开(公告)日：2009-04-16

申请号：US11870649

申请日：2007-10-11

申请人： Stephan Grunow ,  Thomas McCarroll Shaw ,  Andrew H. Simon ,  Chih-Chao Yang ,  Tiblor Bolom ,  James Werking

发明人： Stephan Grunow ,  Thomas McCarroll Shaw ,  Andrew H. Simon ,  Chih-Chao Yang ,  Tiblor Bolom ,  James Werking

IPC分类号： H01L21/4763

CPC分类号： H01L21/76846 ,  H01L21/76805 ,  H01L21/76865

摘要： The disclosed method forms a via between metallization layers in a semiconductor structure by patterning an insulator layer overlying a first metallization layer to include a via opening. The method lines the via opening with TaN and Ta liners and then sputter etches the via opening deeper through the TaN and Ta liners into the first metallization layer. After sputter etching, the method then lines the via opening with second TaN and Ta liners. Next, the method deposits a conductor into the via opening, thereby connecting the first and second metallization layers.

摘要翻译： 所公开的方法通过图案化覆盖在第一金属化层上的绝缘体层以包括通孔开口在半导体结构中的金属化层之间形成通孔。 该方法用TaN和Ta衬垫将通孔开口排列，然后通过TaN和Ta衬垫将通孔开口溅射到第一金属化层中。 在溅射蚀刻之后，该方法然后将通孔与第二TaN和Ta衬垫分开。 接下来，该方法将导体沉积到通孔开口中，从而连接第一和第二金属化层。

公开(公告)号：US07227265B2

公开(公告)日：2007-06-05

申请号：US10810719

申请日：2004-03-29

申请人： Panayotis C. Andricacos ,  Steven H. Boettcher ,  Dean S. Chung ,  Hariklia Deligianni ,  James E. Fluegel ,  Wilma Jean Horkans ,  Keith T. Kwietniak ,  Peter S. Locke ,  Christopher C. Parks ,  Soon-Cheon Seo ,  Andrew H. Simon ,  Erick G. Walton

发明人： Panayotis C. Andricacos ,  Steven H. Boettcher ,  Dean S. Chung ,  Hariklia Deligianni ,  James E. Fluegel ,  Wilma Jean Horkans ,  Keith T. Kwietniak ,  Peter S. Locke ,  Christopher C. Parks ,  Soon-Cheon Seo ,  Andrew H. Simon ,  Erick G. Walton

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/2885 ,  C25D3/38 ,  C25D5/024 ,  C25D5/18 ,  C25D7/123 ,  H01L21/76877

摘要： Interconnect structures with copper conductors being at least substantially free of internal seams or voids are obtained employing an electroplating copper bath containing dissolved cupric salt wherein the concentration of the salt is at least about 0.4 molar and up to about 0.5 molar concentration of an acid. Also provided are copper damascene structures having an aspect ratio of greater than about 3 and a width of less than about 0.275 μm and via openings filled with electroplated copper than is substantially free of internal seams or voids.

摘要翻译： 使用包含溶解的铜盐的电镀铜浴获得至少基本上不含内部接缝或空隙的铜导体的互连结构，其中盐的浓度为酸的至少约0.4摩尔浓度至高达约0.5摩尔浓度。 还提供了具有大于约3的宽高比和小于约0.275μm的宽度的铜镶嵌结构以及填充有电镀铜的通孔，基本上不含内部接缝或空隙。

公开(公告)号：US5268069A

公开(公告)日：1993-12-07

申请号：US895493

申请日：1992-06-08

申请人： Jonathan D. Chapple-Sokol ,  Richard A. Conti ,  David E. Kotecki ,  Andrew H. Simon ,  Manu Tejwani

发明人： Jonathan D. Chapple-Sokol ,  Richard A. Conti ,  David E. Kotecki ,  Andrew H. Simon ,  Manu Tejwani

IPC分类号： H01L21/306 ,  H01L21/311 ,  H01L21/00

CPC分类号： H01L21/02046 ,  H01L21/02049 ,  H01L21/31116

摘要： Anhydrous ammonium fluoride is used as a safe source of hydrogen fluoride for etching native or other silicon dioxide layers from silicon substrates. Heating the anhydrous ammonium fluoride above its sublimation temperature results in the generation of hydrogen fluoride gas which etches the silicon dioxide. Controlled amounts of water vapor are used during the etch reaction to ensure complete etching of the thin oxide layers down to within hundredths of a monolayer and to achieve precise etch rate control.

摘要翻译： 无水氟化铵用作氟化氢的安全源，用于从硅衬底蚀刻天然或其他二氧化硅层。 在其升华温度以上加热无水氟化铵导致产生二氧化硅蚀刻的氟化氢气体。 在蚀刻反应期间使用受控量的水蒸气，以确保将薄氧化物层完全蚀刻到百分之几以下的单层并且实现精确的蚀刻速率控制。

公开(公告)号：US09059176B2

公开(公告)日：2015-06-16

申请号：US13451947

申请日：2012-04-20

申请人： Frieder Hainrich Baumann ,  Chao-Kun Hu ,  Andrew H. Simon ,  Tibor Bolom ,  Koichi Motoyama ,  Chengyu Charles Niu

发明人： Frieder Hainrich Baumann ,  Chao-Kun Hu ,  Andrew H. Simon ,  Tibor Bolom ,  Koichi Motoyama ,  Chengyu Charles Niu

IPC分类号： H01L23/532 ,  H01L21/768

CPC分类号： H01L23/53238 ,  H01L21/76804 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76873 ,  H01L2924/0002 ,  H01L2924/00

摘要： A structure having a diffusion barrier positioned adjacent to a sidewall and a bottom of an opening being etched in a layer of dielectric material. The structure also having a metal liner positioned directly on top of the diffusion barrier, a seed layer positioned directly on top of the metal liner, wherein the seed layer is made from a material comprising copper, a copper material positioned directly on top of the seed layer, a metallic cap positioned directly on top of and selective to the copper material, and a capping layer positioned directly on top of and adjacent to the metallic cap.

摘要翻译： 具有位于邻近侧壁的扩散阻挡层的结构和在介电材料层中蚀刻的开口的底部。 该结构还具有直接位于扩散阻挡层顶部的金属衬垫，直接位于金属衬垫顶部上的种子层，其中种子层由包括铜的材料制成，铜材料直接位于种子顶部 层，直接位于铜材料的顶部和选择性上的金属盖，以及直接位于金属盖的顶部并且邻近金属盖的封盖层。

公开(公告)号：US08962467B2

公开(公告)日：2015-02-24

申请号：US13399266

申请日：2012-02-17

申请人： Griselda Bonilla ,  Kaushik Chanda ,  Samuel S. Choi ,  Ronald G. Filippi ,  Stephan Grunow ,  Naftali E. Lustig ,  Andrew H. Simon ,  Junjing Bao

发明人： Griselda Bonilla ,  Kaushik Chanda ,  Samuel S. Choi ,  Ronald G. Filippi ,  Stephan Grunow ,  Naftali E. Lustig ,  Andrew H. Simon ,  Junjing Bao

IPC分类号： H01L21/44

CPC分类号： H01L23/5256 ,  H01H69/02 ,  H01H85/046 ,  H01H2085/0275 ,  H01L23/5226 ,  H01L23/528 ,  H01L2924/0002 ,  Y10T29/49107 ,  H01L2924/00

摘要： Structure providing more reliable fuse blow location, and method of making the same. A vertical metal fuse blow structure has, prior to fuse blow, an intentionally damaged portion of the fuse conductor. The damaged portion helps the fuse blow in a known location, thereby decreasing the resistance variability in post-blow circuits. At the same time, prior to fuse blow, the fuse structure is able to operate normally. The damaged portion of the fuse conductor is made by forming an opening in a cap layer above a portion of the fuse conductor, and etching the fuse conductor. Preferably, the opening is aligned such that the damaged portion is on the top corner of the fuse conductor. A cavity can be formed in the insulator adjacent to the damaged fuse conductor. The damaged fuse structure having a cavity can be easily incorporated in a process of making integrated circuits having air gaps.

摘要翻译： 提供更可靠的保险丝熔断位置的结构及其制作方法。 在熔断器熔断之前，垂直金属保险丝熔断结构在熔丝导体有意损坏的部分。 损坏的部分有助于熔断器在已知位置中熔断，从而降低后吹回路中的电阻变化。 同时，在保险丝熔断之前，保险丝结构能够正常工作。 熔丝导体的损坏部分是通过在保险丝导体的一部分上方的盖层中形成开口，并蚀刻熔丝导体而制成的。 优选地，开口对准，使得损坏部分在熔丝导体的顶角上。 可以在与损坏的保险丝导体相邻的绝缘体中形成空腔。 具有空腔的损坏的保险丝结构可以容易地结合在制造具有气隙的集成电路的过程中。

公开(公告)号：US20140061914A1

公开(公告)日：2014-03-06

申请号：US13599256

申请日：2012-08-30

申请人： Thomas W. Dyer ,  Daniel C. Edelstein ,  Tze-man Ko ,  Andrew H. Simon ,  Wei-tsu Tseng

发明人： Thomas W. Dyer ,  Daniel C. Edelstein ,  Tze-man Ko ,  Andrew H. Simon ,  Wei-tsu Tseng

IPC分类号： H01L21/768 ,  H01L23/532

CPC分类号： H01L23/53238 ,  H01L21/76834 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76873 ,  H01L21/76886 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming a metal interconnect structure includes forming a copper line within an interlevel dielectric (ILD) layer; directly doping a top surface of the copper line with a copper alloy material; and forming a dielectric layer over the ILD layer and the copper alloy material; wherein the copper alloy material serves an adhesion interface layer between the copper line and the dielectric layer.

公开(公告)号：US20130277842A1

公开(公告)日：2013-10-24

申请号：US13451947

申请日：2012-04-20

申请人： Frieder Hainrich Baumann ,  Chao-Kun Hu ,  Andrew H. Simon ,  Tibor Bolom ,  Koichi Motoyama ,  Chengyu Charles Niu

发明人： Frieder Hainrich Baumann ,  Chao-Kun Hu ,  Andrew H. Simon ,  Tibor Bolom ,  Koichi Motoyama ,  Chengyu Charles Niu

IPC分类号： H01L23/532 ,  H01L21/768

CPC分类号： H01L23/53238 ,  H01L21/76804 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76873 ,  H01L2924/0002 ,  H01L2924/00

摘要： A structure having a diffusion barrier positioned adjacent to a sidewall and a bottom of an opening being etched in a layer of dielectric material. The structure also having a metal liner positioned directly on top of the diffusion barrier, a seed layer positioned directly on top of the metal liner, wherein the seed layer is made from a material comprising copper, a copper material positioned directly on top of the seed layer, a metallic cap positioned directly on top of and selective to the copper material, and a capping layer positioned directly on top of and adjacent to the metallic cap.