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31.发明申请公开(公告)号：US20190204893A1
公开(公告)日：2019-07-04
申请号：US15857802
申请日：2017-12-29
申请人： Efraim Rotem , Esfir Natanzon , Doron Rajwan , Eliezer Weissmann , Dorit Shapira , Lily P. Looi , Bart Plackle , Nadav Shulman
发明人： Efraim Rotem , Esfir Natanzon , Doron Rajwan , Eliezer Weissmann , Dorit Shapira , Lily P. Looi , Bart Plackle , Nadav Shulman
CPC分类号： G06F1/324 , G06F1/206 , G06F11/3024 , G06F11/3062
摘要： In one embodiment, a processor includes: at least one core; a stress detector coupled to the at least one core to receive at least one of a voltage and a temperature at which the processor is to operate, calculate an effective stress based at least in part thereon, and maintain an accumulated effective stress; a clock circuit to calculate a lifetime duration of the processor in a platform; a meter to receive the accumulated effective stress, the lifetime duration and a stress model value and generate a control signal based on a comparison of the accumulated effective stress and the stress model value; and a power controller to control at least one parameter of a turbo mode of the processor based at least in part on the control signal. Other embodiments are described and claimed.
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公开(公告)号：US20180336111A1
公开(公告)日：2018-11-22
申请号：US15599587
申请日：2017-05-19
申请人： Alexander Gendler , Efraim Rotem , Doron Rajwan , Eliezer Weissmann , Michael Mishaeli , Ilya Zegelman , Krishnakanth V. Sistla
发明人： Alexander Gendler , Efraim Rotem , Doron Rajwan , Eliezer Weissmann , Michael Mishaeli , Ilya Zegelman , Krishnakanth V. Sistla
CPC分类号： G06F11/2284 , G06F1/3287 , G06F1/3296 , G06F11/2236 , G06F11/27 , G06F11/321 , G06F13/1663
摘要： In one embodiment, a processor includes a core and a power controller coupled to the core that in turn includes a self-test control circuit. The self-test circuit is adapted to: isolate the core during field operation; cause the core to execute at least one diagnostic test at a first operating voltage to identify a guard band voltage for the core; and cause the core to enter into a low power state after the execution of the at least one diagnostic test. Other embodiments are described and claimed.
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33.发明申请METHOD AND APPARATUS FOR SELECTING AN INTERCONNECT FREQUENCY IN A COMPUTING SYSTEM 有权在计算机系统中选择互连频率的方法和装置公开(公告)号：US20160026479A1
公开(公告)日：2016-01-28
申请号：US14338692
申请日：2014-07-23
申请人： Nir Rosenzweig , Efraim Rotem , Doron Rajwan , Nadav Shulman , Eliezer Weissmann
发明人： Nir Rosenzweig , Efraim Rotem , Doron Rajwan , Nadav Shulman , Eliezer Weissmann
CPC分类号： G06F9/44505 , G06F1/324 , G06F12/0844 , G06F13/4234 , G06F2212/1052 , G06F2212/604 , Y02D10/14 , Y02D10/151
摘要： In an embodiment, a processor includes at least one core and an interconnect that couples the at least one core and the cache memory. The interconnect is to operate at an interconnect frequency (fCL). The processor also includes a power management unit (PMU) including fCL logic to determine whether to adjust the fCL responsive to a Bayesian prediction value that is associated with scalability of a workload to be processed by the processor. The Bayesian prediction value may be determined based on one or more activity measures associated with the processor. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，处理器包括耦合至少一个核心和高速缓冲存储器的至少一个核心和互连。 互连以互连频率（fCL）运行。 处理器还包括功率管理单元（PMU），其包括fCL逻辑以确定是否响应于与要由处理器处理的工作负载的可伸缩性相关联的贝叶斯预测值来调整fCL。 可以基于与处理器相关联的一个或多个活动度量来确定贝叶斯预测值。 描述和要求保护其他实施例。
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公开(公告)号：US09158693B2
公开(公告)日：2015-10-13
申请号：US13285465
申请日：2011-10-31
申请人： Avinash N. Ananthakrishnan , Efraim Rotem , Eliezer Weissmann , Doron Rajwan , Nadav Shulman , Alon Naveh , Hisham Abu-Salah
发明人： Avinash N. Ananthakrishnan , Efraim Rotem , Eliezer Weissmann , Doron Rajwan , Nadav Shulman , Alon Naveh , Hisham Abu-Salah
CPC分类号： G06F1/3275 , G06F1/28 , G06F1/3287 , G06F12/0802 , G06F12/084 , G06F12/0848 , G06F12/0864 , G06F2212/1028 , G06F2212/282 , G06F2212/502 , G06F2212/621 , Y02D10/13
摘要： In one embodiment, the present invention is directed to a processor having a plurality of cores and a cache memory coupled to the cores and including a plurality of partitions. The processor can further include a logic to dynamically vary a size of the cache memory based on a memory boundedness of a workload executed on at least one of the cores. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明涉及具有多个核心的处理器和耦合到核心并且包括多个分区的高速缓冲存储器。 处理器还可以包括基于在至少一个核上执行的工作负载的存储器有界性来动态地改变高速缓存存储器的大小的逻辑。 描述和要求保护其他实施例。
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35.发明授权Estimating temperature of a processor core in a low power state without thermal sensor information 有权在没有热传感器信息的低功率状态下估计处理器内核的温度公开(公告)号：US09074947B2
公开(公告)日：2015-07-07
申请号：US13247564
申请日：2011-09-28
申请人： Avinash N. Ananthakrishnan , Efraim Rotem , Itai Feit , Tomer Ziv , Doron Rajwan , Nadav Shulman , Alon Naveh
发明人： Avinash N. Ananthakrishnan , Efraim Rotem , Itai Feit , Tomer Ziv , Doron Rajwan , Nadav Shulman , Alon Naveh
CPC分类号： G01K7/42 , G06F1/206 , G06F1/3243 , Y02D10/152 , Y02D10/16 , Y02D50/20
摘要： In one embodiment, the present invention includes a method for determining if a core of a multicore processor is in a low power state, and if so, estimating a temperature of the core and storing the estimated temperature in a thermal storage area for the first core. By use of this estimated temperature, an appropriate voltage at which to operate the core when it exits the low power state can be determined. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括一种用于确定多核处理器的核心是否处于低功率状态的方法，如果是，则估计核心的温度并将估计的温度存储在第一核心的热存储区域中 。 通过使用该估计的温度，可以确定当其离开低功率状态时操作芯的适当电压。 描述和要求保护其他实施例。
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36.发明授权公开(公告)号：US08769316B2
公开(公告)日：2014-07-01
申请号：US13225677
申请日：2011-09-06
CPC分类号： G06F1/26 , G06F1/3243 , G06F9/5094 , Y02D10/152
摘要： In one embodiment, the present invention includes a method for determining a power budget for a multi-domain processor for a current time interval, determining a portion of the power budget to be allocated to first and second domains of the processor, and controlling a frequency of the domains based on the allocated portions. Such determinations and allocations can be dynamically performed during runtime of the processor. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括一种用于当前时间间隔确定多域处理器的功率预算的方法，确定要分配给处理器的第一和第二域的功率预算的一部分，以及控制频率 基于所分配的部分的域。 这样的确定和分配可以在处理器的运行期间动态地执行。 描述和要求保护其他实施例。
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37.发明申请公开(公告)号：US20130179704A1
公开(公告)日：2013-07-11
申请号：US13780066
申请日：2013-02-28
CPC分类号： G06F1/26 , G06F1/3243 , G06F9/5094 , Y02D10/152
摘要： In one embodiment, the present invention includes a method for determining a power budget for a multi-domain processor for a current time interval, determining a portion of the power budget to be allocated to first and second domains of the processor, and controlling a frequency of the domains based on the allocated portions. Such determinations and allocations can be dynamically performed during runtime of the processor. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括一种用于当前时间间隔确定多域处理器的功率预算的方法，确定要分配给处理器的第一和第二域的功率预算的一部分，以及控制频率 基于所分配的部分的域。 这样的确定和分配可以在处理器的运行期间动态地执行。 描述和要求保护其他实施例。
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38.发明申请CONTROLLING POWER CONSUMPTION THROUGH MULTIPLE POWER LIMITS OVER MULTIPLE TIME INTERVALS 审中-公开通过多个时间间隔的多个功率限制来控制功耗公开(公告)号：US20130173946A1
公开(公告)日：2013-07-04
申请号：US13340433
申请日：2011-12-29
申请人： Efraim Rotem , Avinash N. Ananthakrishnan , Doron Rajwan , Eliezer Weissmann , Alon Naveh , James G. Hermerding, II , Riad Durr , Hisham Abu Salah
发明人： Efraim Rotem , Avinash N. Ananthakrishnan , Doron Rajwan , Eliezer Weissmann , Alon Naveh , James G. Hermerding, II , Riad Durr , Hisham Abu Salah
IPC分类号： G06F1/26
CPC分类号： G06F1/3206 , G06F1/324 , G06F1/3287 , G06F1/3296 , Y02D10/126 , Y02D10/171
摘要： Methods and apparatus relating to controlling power consumption through multiple power limits over multiple time intervals are described. In one embodiment, the level of power consumption by a computing device component (e.g., a processor or one of its processor cores) is modified based on a determined power limit value. The power limit value may be determined based on rolling power consumption averages over multiple time intervals and their comparison against multiple corresponding power limits. Other embodiments are also disclosed and claimed.
摘要翻译： 描述了通过多个时间间隔通过多个功率限制来控制功耗的方法和装置。 在一个实施例中，基于所确定的功率限制值来修改计算设备组件（例如，处理器或其处理器核心之一）的功率消耗水平。 功率极限值可以基于多个时间间隔上的滚动功率消耗平均值和它们与多个对应功率限制的比较来确定。 还公开并要求保护其他实施例。
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39.发明申请公开(公告)号：US20130111236A1
公开(公告)日：2013-05-02
申请号：US13282947
申请日：2011-10-27
申请人： Avinash N. Ananthakrishnan , Efraim Rotem , Doron Rajwan , Jeremy J. Shrall , Eric C. Samson , Eliezer Wiessman , Ryan Wells
发明人： Avinash N. Ananthakrishnan , Efraim Rotem , Doron Rajwan , Jeremy J. Shrall , Eric C. Samson , Eliezer Wiessman , Ryan Wells
IPC分类号： G06F1/32
CPC分类号： G06F1/324 , G06F1/26 , G06F1/30 , G06F1/3203 , G06F1/3234 , G06F1/3243 , G06F13/14 , Y02D10/126
摘要： In one embodiment, the present invention includes a method for determining that a non-core domain of a multi-domain processor is not operating at a frequency requested by the non-core domain, sending a request from the non-core domain to a power controller to reduce a frequency of a core domain of the multi-domain processor, and responsive to the request, reducing the core domain frequency. Other embodiments are described and claimed.
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公开(公告)号：US20130111226A1
公开(公告)日：2013-05-02
申请号：US13285414
申请日：2011-10-31
申请人： Avinash N. Ananthakrishnan , Efraim Rotem , Doron Rajwan , Eliezer Wiessman , Ryan Wells , Nadav Shulman
发明人： Avinash N. Ananthakrishnan , Efraim Rotem , Doron Rajwan , Eliezer Wiessman , Ryan Wells , Nadav Shulman
IPC分类号： G06F1/00
CPC分类号： G06F1/3206 , G06F1/26 , G06F1/324 , G06F1/3243 , G06F1/3287 , G06F9/3885 , Y02D10/126 , Y02D10/152 , Y02D10/171
摘要： In one embodiment, the present invention includes a multicore processor with a power controller to control a frequency at which the processor operates. More specifically, the power controller can limit a maximum operating frequency of the processor to less than a configured maximum operating frequency to enable a reduction in a number of frequency transitions occurring responsive to power state events, thus avoiding the overhead of operations performed in handling such transitions. Other embodiments are described and claimed.
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