-
公开(公告)号：US11710528B2
公开(公告)日：2023-07-25
申请号：US17487792
申请日：2021-09-28
Applicant: Micron Technology, Inc.
Inventor： Karthik Sarpatwari , Nevil N. Gajera , Hongmei Wang , Mingdong Cui
CPC classification number: G11C16/3404 , G11C16/10 , G11C16/26 , G11C16/30
Abstract: Methods, systems, and devices for data-based polarity write operations are described. A write command may cause a set of data to be written to a set of memory cells. To write the set of data, a write operation that applies voltages across the memory cells based on a logic state of data to be written to the memory cells may be used. During a first interval of the write operation, a voltage may be applied across a memory cell based on a logic state of a data bit to be written to the memory cell. During a second interval of the write operation, a voltage may be applied across the memory cell based on an amount of charge conducted by the memory cell during the first interval.
-
公开(公告)号：US20230115339A1
公开(公告)日：2023-04-13
申请号：US17496667
申请日：2021-10-07
Applicant: Micron Technology, Inc.
Inventor： Mingdong Cui , Hongmei Wang , Hari Giduturi
IPC: G11C13/00
Abstract: Systems, methods, and apparatus related to selecting memory cells in a memory array of a memory device. In one approach, bias circuitry generates a voltage on an access line used to select a memory cell for programming. During programming, a controller connects a boost capacitor to the access line by controlling a switch. Connecting the boost capacitor causes an increase in the rate of discharge of the access line (e.g., discharge of a word line to a negative voltage). After programming, the controller disconnects the boost capacitor from the access line, and the boost capacitor is pre-charged in preparation for a next programming operation (e.g., on the same or a different memory cell).
-
公开(公告)号：US20220415394A1
公开(公告)日：2022-12-29
申请号：US17898001
申请日：2022-08-29
Applicant: Micron Technology, Inc.
Inventor： Hongmei Wang , Mingdong Cui , Nevil N. Gajera
IPC: G11C13/00
Abstract: A memory device having memory cells, voltage drivers, and a controller configured to determine, based on an attribute of a memory cell, whether to apply a drift cancellation pulse that is in the opposite polarity of a programming pulse configured to place the memory cell in a state to represent a bit of data. If the drift in the state of the memory cell from a previous programming operation to write data into the memory cell is predicted to be insufficient to prevent the selection of the memory cell during the application of the programming pulse, the drift cancellation pulse is skipped. Otherwise, the drift cancellation pulse is applied in the opposite polarity of the programming pulse.
-
公开(公告)号：US11430518B1
公开(公告)日：2022-08-30
申请号：US17217379
申请日：2021-03-30
Applicant: Micron Technology, Inc.
Inventor： Hongmei Wang , Mingdong Cui , Nevil N. Gajera
Abstract: A memory device having memory cells, voltage drivers, and a controller configured to determine, based on an attribute of a memory cell, whether to apply a drift cancellation pulse that is in the opposite polarity of a programming pulse configured to place the memory cell in a state to represent a bit of data. If the drift in the state of the memory cell from a previous programming operation to write data into the memory cell is predicted to be insufficient to prevent the selection of the memory cell during the application of the programming pulse, the drift cancellation pulse is skipped. Otherwise, the drift cancellation pulse is applied in the opposite polarity of the programming pulse.
-
公开(公告)号：US11100986B2
公开(公告)日：2021-08-24
申请号：US16717944
申请日：2019-12-17
Applicant: Micron Technology, Inc.
Inventor： Hongmei Wang
Abstract: Methods, systems, and devices for discharge current mitigation in a memory array are described. Access lines of a memory array may be divided into discrete segments, with each segment coupled with a driver for the access line by one or more vias respective to the segment. For example, a first segment of an access line may be coupled with a first set of memory cells, a second segment of the access line may be coupled with a second set of memory cells, and a driver may be coupled to the first segment by a first via and to the second segment by a second via. To access a memory cell in either the first set or the second, both the first segment of the access line and the second segment of the access line may be activated together by the common driver.
-
Patent Agency Ranking
公开(公告)号：US20210151103A1
公开(公告)日：2021-05-20
申请号：US17158984
申请日：2021-01-26
Applicant: Micron Technology, Inc.
Inventor： Mingdong Cui , Hongmei Wang , Michel Ibrahim Ishac
IPC: G11C13/00
Abstract: An integrated circuit memory device having: a memory cell; a current sensor connected to the memory cell; a voltage driver connected to the memory cell; and a bleed circuit connected to the voltage driver. During an operation to read the memory cell, the voltage driver drives a voltage applied on the memory cell. The bleed circuit is activated to reduce the voltage during a time period in which the current sensor operates to determine whether or not at least a predetermined level of current is presented in the memory cell.
-
公开(公告)号：US10930345B1
公开(公告)日：2021-02-23
申请号：US16660590
申请日：2019-10-22
Applicant: Micron Technology, Inc.
Inventor： Mingdong Cui , Hongmei Wang , Michel Ibrahim Ishac
IPC: G11C11/419 , G11C13/00
Abstract: An integrated circuit memory device having: a memory cell; a current sensor connected to the memory cell; a voltage driver connected to the memory cell; and a bleed circuit connected to the voltage driver. During an operation to read the memory cell, the voltage driver drives a voltage applied on the memory cell. The bleed circuit is activated to reduce the voltage during a time period in which the current sensor operates to determine whether or not at least a predetermined level of current is presented in the memory cell.
-
公开(公告)号：US20190355418A1
公开(公告)日：2019-11-21
申请号：US16419895
申请日：2019-05-22
Applicant: Micron Technology, Inc.
Inventor： Amitava Majumdar , Rajesh Kamana , Hongmei Wang , Shawn D. Lyonsmith , Ervin T. Hill , Zengtao T. Liu , Marlon W. Hug
Abstract: Methods, systems, and devices for non-contact electron beam probing techniques, including at one or more intermediate stages of fabrication, are described. One subset of first access lines may be grounded and coupled with one or more memory cells. A second subset of first access lines may be floating and coupled with one or more memory cells. A second access line may correspond to each first access line and may be configured to be coupled with the corresponding first access line, by way of one or more corresponding memory cells, when scanned with an electron beam. A leakage path may be determined by comparing an optical pattern generated in part by determining a brightness of each scanned access line and comparing the generated optical pattern with a second optical pattern.
-
公开(公告)号：US20150179255A1
公开(公告)日：2015-06-25
申请号：US14137189
申请日：2013-12-20
Applicant: Micron Technology, Inc.
Inventor： Karthik Sarpatwari , Hongmei Wang , Rangan Sanjay
CPC classification number: G11C13/0038 , G11C7/02 , G11C7/12 , G11C8/08 , G11C11/1673 , G11C13/0004 , G11C13/0028 , G11C13/0033 , G11C13/004 , G11C2013/005 , G11C2213/72 , G11C2213/76
Abstract: Voltage balancing for a memory cell array is provided. One example method of voltage balancing for a memory array can include activating an access node coupled to a row of a memory array to provide voltage to the row of the memory array, activating a stabilizing transistor coupled to the row of the memory array to create a feedback loop, and activating a driving node coupled to a column of the memory array, wherein activating the driving node deactivates the stabilizing transistor once the column reaches a particular voltage potential.
Abstract translation: 提供了存储单元阵列的电压平衡。 用于存储器阵列的电压平衡的一个示例性方法可以包括激活耦合到存储器阵列的接入节点以向存储器阵列的行提供电压，激活耦合到存储器阵列的稳定晶体管以产生 反馈回路，以及激活耦合到存储器阵列的列的驱动节点，其中一旦列达到特定电压电位，激活驱动节点就使稳定晶体管去激活。
-
公开(公告)号：US20240363241A1
公开(公告)日：2024-10-31
申请号：US18764929
申请日：2024-07-05
Applicant: Micron Technology, Inc.
Inventor： Gitanjali T. Ghosh , Irene K. Thompson , Jessica M. Maderos , Hongmei Wang , Fatma Arzum Simsek-Ege , Kathryn H. Russo
Abstract: Systems, apparatuses, and methods related to medical device data analysis are described. In some examples, a medical device is implanted in a user of the medical device and the data generated by the medical device is not easily accessible to the user. In an example, a controller can be configured to receive, by a mobile device coupled to a medical device, data from the medical device, where the data is a part of a baseline dataset related to the medical device. The controller can be configured to receive different data from the medical device, where the different data is received from the medical device as the different data is generated by the medical device, analyze the data from the medical device and the different data generated by the medical device, and perform an action based on the analyzed data and the different data generated by the medical device.
-
-
-
-
-
-
-
-
-
Search Results
53
records
(took 0.026 seconds)
