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公开(公告)号：US10720574B2
公开(公告)日：2020-07-21
申请号：US16266777
申请日：2019-02-04
Applicant: Micron Technology, Inc.
Inventor： Tsz W. Chan , Yongjun Jeff Hu , Swapnil Lengade , Shu Qin , Everett Allen McTeer
Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming the memory stack out of a plurality of elements. An adhesion species is formed on at least one sidewall of the memory stack wherein the adhesion species has a gradient structure that results in the adhesion species intermixing with an element of the memory stack to terminate unsatisfied atomic bonds of the element. The gradient structure further comprises a film of the adhesion species on an outer surface of the at least one sidewall. A dielectric material is implanted into the film of the adhesion species to form a sidewall liner.
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公开(公告)号：US10546895B2
公开(公告)日：2020-01-28
申请号：US16241525
申请日：2019-01-07
Applicant: Micron Technology, Inc.
Inventor： Yongjun Jeff Hu , Tsz W. Chan , Swapnil Lengade , Everett Allen McTeer , Shu Qin
Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such memory device includes a first electrode material formed on a word line material. A selector device material is formed on the first electrode material. A second electrode material is formed on the selector device material. A phase change material is formed on the second electrode material. A third electrode material is formed on the phase change material. An adhesion species is plasma doped into sidewalls of the memory stack and a liner material is formed on the sidewalls of the memory stack. The adhesion species intermixes with an element of the memory stack and the sidewall liner to terminate unsatisfied atomic bonds of the element and the sidewall liner.
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公开(公告)号：US20190362785A1
公开(公告)日：2019-11-28
申请号：US16417320
申请日：2019-05-20
Applicant: Micron Technology, Inc.
Inventor： Yongjun Jeff Hu , Tsz W. Chan , Christopher W. Petz , Everett Allen McTeer
Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming a memory stack out of a plurality of elements. A sidewall liner is formed on a sidewall of the memory stack using a physical vapor deposition (PVD) process, including an adhesion species and a dielectric, such that the adhesion species intermixes with an element of the memory stack to terminate unsatisfied atomic bonds of the element and the dielectric forms a dielectric film with the adhesive species on the sidewall.
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公开(公告)号：US10344398B2
公开(公告)日：2019-07-09
申请号：US14989097
申请日：2016-01-06
Applicant: Micron Technology, Inc.
Inventor： John Mark Meldrim , Yushi Hu , Yongjun Jeff Hu , Everett Allen McTeer
IPC: C30B23/02 , C30B29/38 , H01L27/11556 , H01L29/792 , H01L27/11582 , C30B25/02 , H01L21/225 , H01L27/11524 , H01L27/1157
Abstract: Various embodiments include methods and apparatuses comprising methods for formation of and apparatuses including a source material for electronic devices. One such apparatus includes a vertical string of memory cells comprising a plurality of alternating levels of conductor and dielectric material, a semiconductor material extending through the plurality of alternating levels of conductor material and dielectric material, and a source material coupled to the semiconductor material. The source material includes a titanium nitride layer and a source polysilicon layer in direct contact with the titanium nitride layer. Other methods and apparatuses are disclosed.
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公开(公告)号：US10325653B2
公开(公告)日：2019-06-18
申请号：US15856806
申请日：2017-12-28
Applicant: Micron Technology, Inc.
Inventor： Yongjun Jeff Hu , Tsz W. Chan , Christopher W. Petz , Everett Allen McTeer
Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming a memory stack out of a plurality of elements. A sidewall liner is formed on a sidewall of the memory stack using a physical vapor deposition (PVD) process, including an adhesion species and a dielectric, such that the adhesion species intermixes with an element of the memory stack to terminate unsatisfied atomic bonds of the element and the dielectric forms a dielectric film with the adhesive species on the sidewall.
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Patent Agency Ranking
公开(公告)号：US10177198B2
公开(公告)日：2019-01-08
申请号：US15613823
申请日：2017-06-05
Applicant: Micron Technology, Inc.
Inventor： Yongjun Jeff Hu , Tsz W. Chan , Swapnil Lengade , Everett Allen McTeer , Shu Qin
Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such memory device includes a first electrode material formed on a word line material. A selector device material is formed on the first electrode material. A second electrode material is formed on the selector device material. A phase change material is formed on the second electrode material. A third electrode material is formed on the phase change material. An adhesion species is plasma doped into sidewalls of the memory stack and a liner material is formed on the sidewalls of the memory stack. The adhesion species intermixes with an element of the memory stack and the sidewall liner to terminate unsatisfied atomic bonds of the element and the sidewall liner.
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公开(公告)号：US20180166629A1
公开(公告)日：2018-06-14
申请号：US15882666
申请日：2018-01-29
Applicant: Micron Technology, Inc.
Inventor： Tsz W. Chan , Yongjun Jeff Hu , Swapnil Lengade , Shu Qin , Everett Allen McTeer
CPC classification number: H01L45/06 , G11C13/0004 , H01L27/2409 , H01L27/2481 , H01L45/12 , H01L45/1233 , H01L45/1253 , H01L45/141 , H01L45/16 , H01L45/1616 , H01L45/165 , H01L45/1675
Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming the memory stack out of a plurality of elements. An adhesion species is formed on at least one sidewall of the memory stack wherein the adhesion species has a gradient structure that results in the adhesion species intermixing with an element of the memory stack to terminate unsatisfied atomic bonds of the element. The gradient structure further comprises a film of the adhesion species on an outer surface of the at least one sidewall. A dielectric material is implanted into the film of the adhesion species to form a sidewall
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公开(公告)号：US20180144795A1
公开(公告)日：2018-05-24
申请号：US15856806
申请日：2017-12-28
Applicant: Micron Technology, Inc.
Inventor： Yongjun Jeff Hu , Tsz W. Chan , Christopher W. Petz , Everett Allen McTeer
CPC classification number: G11C13/0004 , G11C2213/35 , G11C2213/52 , G11C2213/71 , H01L27/2409 , H01L27/2463 , H01L27/2481 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/141 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/145 , H01L45/148 , H01L45/1625 , H01L45/1675
Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming a memory stack out of a plurality of elements. A sidewall liner is formed on a sidewall of the memory stack using a physical vapor deposition (PVD) process, including an adhesion species and a dielectric, such that the adhesion species intermixes with an element of the memory stack to terminate unsatisfied atomic bonds of the element and the dielectric forms a dielectric film with the adhesive species on the sidewall.
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公开(公告)号：US09780103B2
公开(公告)日：2017-10-03
申请号：US14942823
申请日：2015-11-16
Applicant: Micron Technology, Inc.
Inventor： Yongjun Jeff Hu , Allen McTeer
IPC: H01L27/115 , H01L27/11524 , H01L21/02 , H01L21/322 , H01L27/1157
CPC classification number: H01L27/11524 , H01L21/02672 , H01L21/3221 , H01L27/1157 , H01L27/11582
Abstract: Some embodiments include an integrated structure having semiconductor material within a region between two parallel surfaces. The semiconductor material has grain boundaries parallel to the parallel surfaces. At least one circuit component utilizes a region of the semiconductor material in a gated device. The semiconductor material has little if any metal therein so that the gated device has Ion/Ioff characteristics similar to if the semiconductor material had no metal therein. Some embodiments include a method in which semiconductor material is provided between a pair of parallel surfaces, and in which the parallel surfaces and semiconductor material extend between a first end and a second end. Metal is formed adjacent the first end, and gettering material is formed adjacent the second end. Thermal processing induces crystallization of the semiconductor material and drives the metal along the semiconductor material and into the gettering material. The gettering material is then removed.
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公开(公告)号：US09472663B2
公开(公告)日：2016-10-18
申请号：US14679703
申请日：2015-04-06
Applicant: Micron Technology, Inc.
Inventor： Yongjun Jeff Hu , Allen McTeer
IPC: H01L29/78 , H01L29/66 , H01L29/161 , H01L29/167 , H01L21/265 , H01L29/36 , H01L27/108
CPC classification number: H01L29/7827 , H01L21/26506 , H01L21/26513 , H01L27/108 , H01L27/10873 , H01L27/10882 , H01L29/161 , H01L29/167 , H01L29/36 , H01L29/66666
Abstract: An n-type field effect transistor includes silicon-comprising semiconductor material comprising a pair of source/drain regions having a channel region there-between. At least one of the source/drain regions is conductively doped n-type with at least one of As and P. A conductivity-neutral dopant is in the silicon-comprising semiconductor material in at least one of the channel region and the at least one source/drain region. A gate construction is operatively proximate the channel region. Methods are disclosed.
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