利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

78 条记录 (耗时 0.034 秒)

    Method for determining pore characteristics in porous materials
    31.
    发明授权
    Method for determining pore characteristics in porous materials 失效
    确定多孔材料孔隙特性的方法

    公开(公告)号：US06791081B1

    公开(公告)日：2004-09-14

    申请号：US10109517

    申请日：2002-03-27

    申请人： Robert Matthew Ulfig ,  Suzette K. Pangrle ,  Alline F. Myers ,  Jeremias D. Romero

    发明人： Robert Matthew Ulfig ,  Suzette K. Pangrle ,  Alline F. Myers ,  Jeremias D. Romero

    IPC分类号： G01B528

    CPC分类号： G01Q60/24 ,  G01N15/088 ,  Y10S977/852

    摘要： A method for measuring porosity of nanoporous materials is provided using atomic force microscopy (AFM). A surface topology map with sub-atomic resolution is created using AFM wherein the pore shape and size can be determined by measuring the pores that intersect the top or fracture surface. For porous materials requiring more accurate measurements, small scan areas with slow scan speed and fine AFM tips are used and a general estimation on distribution can be made from a sample area.

    摘要翻译： 使用原子力显微镜（AFM）提供了一种测量纳米多孔材料孔隙率的方法。 使用AFM创建具有亚原子分辨率的表面拓扑图，其中孔形状和尺寸可以通过测量与顶部或断裂面相交的孔来确定。 对于需要更精确测量的多孔材料，使用扫描速度慢的微小扫描区域和精细的AFM尖端，并且可以从样品区域进行一般的分布估计。

    Use of sic for preventing copper contamination of low-k dielectric layers
    32.
    发明授权
    Use of sic for preventing copper contamination of low-k dielectric layers 有权
    使用sic来防止低k电介质层的铜污染

    公开(公告)号：US06756672B1

    公开(公告)日：2004-06-29

    申请号：US09776750

    申请日：2001-02-06

    申请人： Lu You ,  Dawn M. Hopper ,  Suzette K. Pangrle

    发明人： Lu You ,  Dawn M. Hopper ,  Suzette K. Pangrle

    IPC分类号： H01L2348

    CPC分类号： H01L21/76831 ,  H01L21/76802 ,  H01L21/76804 ,  H01L21/76813 ,  H01L23/5222 ,  H01L23/5226 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device includes a first metallization level, a first diffusion barrier layer, a first etch stop layer, a dielectric layer and a via extending through the dielectric layer, the first etch stop layer, and the first diffusion barrier layer. The first diffusion barrier layer is disposed over the first metallization level. The first etch stop layer is disposed over the first diffusion barrier layer, and the dielectric layer is disposed over the first etch stop layer. The via can also have rounded corners. A sidewall diffusion barrier layer can be disposed on sidewalls of the via, and the sidewall diffusion barrier layer is formed from the same material as the first diffusion barrier layer. The first etch stop layer can be formed from silicon carbide. A method of manufacturing the semiconductor device is also disclosed.

    摘要翻译： 半导体器件包括第一金属化水平，第一扩散阻挡层，第一蚀刻停止层，介电层和延伸穿过介电层的通孔，第一蚀刻停止层和第一扩散阻挡层。 第一扩散阻挡层设置在第一金属化层上。 第一蚀刻停止层设置在第一扩散阻挡层上，并且电介质层设置在第一蚀刻停止层上。 通孔也可以有圆角。 侧壁扩散阻挡层可以设置在通孔的侧壁上，并且侧壁扩散阻挡层由与第一扩散阻挡层相同的材料形成。 第一蚀刻停止层可以由碳化硅形成。 还公开了制造半导体器件的方法。

    Vapor treatment for repairing damage of low-k dielectric
    33.
    发明授权
    Vapor treatment for repairing damage of low-k dielectric 有权
    用于修复低k电介质损伤的蒸气处理

    公开(公告)号：US06713382B1

    公开(公告)日：2004-03-30

    申请号：US10059268

    申请日：2002-01-31

    申请人： Suzette K. Pangrle ,  Ecran Adem ,  Calvin Gabriel ,  Lynne A. Okada

    发明人： Suzette K. Pangrle ,  Ecran Adem ,  Calvin Gabriel ,  Lynne A. Okada

    IPC分类号： H01L214763

    CPC分类号： H01L21/76802 ,  H01L21/76831

    摘要： A method of manufacturing a semiconductor device includes forming a first level, forming a first barrier layer over the first level, forming a dielectric layer over the first barrier layer, forming an opening having side surfaces through the dielectric layer, etching the first barrier layer, and filling the opening with metal to form a first metal feature. The process also includes the step of replacing hydroxyl terminated ions on the side surfaces. This step of replacing the hydroxyl terminated ions can occur after the opening is formed or after the first barrier layer is etched. A semiconductor device produced by the method of manufacturing is also disclosed.

    摘要翻译： 一种制造半导体器件的方法包括形成第一层，在第一层上形成第一势垒层，在第一阻挡层上形成电介质层，形成通过介电层的侧表面的开口，蚀刻第一阻挡层， 并用金属填充开口以形成第一金属特征。 该方法还包括在侧表面上置换羟基封端的离子的步骤。 取代羟基封端的离子的该步骤可以在形成开口之后或在第一阻挡层被蚀刻之后发生。 还公开了通过制造方法制造的半导体器件。

    Semiconductor component and method of manufacture
    40.
    发明授权
    Semiconductor component and method of manufacture 失效
    半导体元件及制造方法

    公开(公告)号：US06943096B1

    公开(公告)日：2005-09-13

    申请号：US10665938

    申请日：2003-09-17

    申请人： Connie Pin-Chin Wang ,  Suzette K. Pangrle ,  Sergey Lopatin

    发明人： Connie Pin-Chin Wang ,  Suzette K. Pangrle ,  Sergey Lopatin

    IPC分类号： H01L21/20 ,  H01L21/36

    CPC分类号： H01L21/76808 ,  H01L21/28562 ,  H01L21/76823 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76873 ,  H01L2221/1036

    摘要： A semiconductor component having a metallization system that includes a multi-metal seed layer and a method for manufacturing the semiconductor component. A layer of dielectric material is formed over a lower level interconnect. A hardmask is formed over the dielectric layer and an opening is etched through the hardmask into the dielectric layer. The opening is lined with a thin conformal barrier material. A plurality of metal oxide layers are formed over the conformal barrier material. The plurality of metal oxide layers are reduced by heat treatment to form a multi-metal seed layer. An electrically conductive material is formed over the multi-metal seed layer.

    摘要翻译： 具有包括多金属种子层的金属化系统的半导体部件和用于制造半导体部件的方法。 一层介电材料形成在较低级互连上。 在电介质层上形成硬掩模，并且通过硬掩模蚀刻开口到介电层中。 开口衬有薄的共形阻挡材料。 在保形阻挡材料上形成多个金属氧化物层。 通过热处理来还原多个金属氧化物层以形成多金属种子层。 在多金属种子层上形成导电材料。