Buried insulator isolation for solar cell contacts
    32.
    发明授权
    Buried insulator isolation for solar cell contacts 失效
    用于太阳能电池触点的绝缘绝缘体隔离

    公开(公告)号:US08367924B2

    公开(公告)日:2013-02-05

    申请号:US12360814

    申请日:2009-01-27

    申请人: Peter Borden Li Xu

    发明人: Peter Borden Li Xu

    摘要: The present invention relates to methods and apparatuses for providing a buried insulator isolation for solar cell contacts. According to certain aspects, the invention places a buried oxide under the emitter of a polysilicon emitter solar cell. The oxide provides an excellent passivation layer over most of the surface. Holes in the oxide provide contact areas, increasing the current density to enhance efficiency. The oxide isolates the contacts from the substrate, achieving the advantage of a selective emitter structure without requiring deep diffusions. The oxide further enables use of screen printing on advanced shallow emitter cells. Positioning of the grid lines close to the openings also enables use of a very thin emitter to maximize blue response.

    摘要翻译: 本发明涉及用于为太阳能电池触点提供掩埋绝缘体隔离的方法和装置。 根据某些方面,本发明将掩埋氧化物放置在多晶硅发射极太阳能电池的发射极之下。 该氧化物在大部分表面上提供优异的钝化层。 氧化物中的孔提供接触面积,增加电流密度以提高效率。 该氧化物将触点与衬底隔离,实现了选择性发射极结构的优点,而不需要深度扩散。 氧化物还能够在先进的浅发射极电池上使用丝网印刷。 靠近开口的网格线的定位也使得能够使用非常薄的发射器来最大化蓝色响应。

    Method of forming front contacts to a silicon solar cell wiithout patterning
    33.
    发明申请
    Method of forming front contacts to a silicon solar cell wiithout patterning 失效
    在没有图案化的情况下将前触点形成到硅太阳能电池的方法

    公开(公告)号:US20100120191A1

    公开(公告)日:2010-05-13

    申请号:US12291917

    申请日:2008-11-13

    摘要: A method for forming front contacts on a silicon solar cell which includes texture etching the front surface of the solar cell, forming an antireflective layer over the face, diffusing a doping material into the face to form a heavily doped region in valleys formed during the texture-etching of the face, depositing an electrically conductive material on the heavily doped regions in the valleys and annealing the solar cell.

    摘要翻译: 一种用于在硅太阳能电池上形成前触点的方法,其包括纹理蚀刻太阳能电池的前表面,在该表面上形成抗反射层,将掺杂材料扩散到面中以在纹理中形成的谷中形成重掺杂区域 刻蚀表面,在谷中的重掺杂区域上沉积导电材料并退火太阳能电池。

    Method for forming thin film photovoltaic interconnects using self-aligned process
    34.
    发明授权
    Method for forming thin film photovoltaic interconnects using self-aligned process 有权
    使用自对准工艺形成薄膜光伏互连的方法

    公开(公告)号:US07547570B2

    公开(公告)日:2009-06-16

    申请号:US11394721

    申请日:2006-03-31

    IPC分类号: H01L21/00

    摘要: Processing steps that are useful for forming interconnects in a photovoltaic module are described herein. According to one aspect, a method according to the invention includes processing steps that are similar to those performed in conventional integrated circuit fabrication. For example, the method can include etches to form a conductive step adjacent to the grooves that can be used to form interconnects between cells. According to another aspect the method for forming the conductive step can be self-aligned, such as by positioning a mirror above the module and exposing photoresist from underneath the substrate at an angle one or more times, and etching to expose the conductive step.

    摘要翻译: 本文描述了可用于在光伏模块中形成互连的处理步骤。 根据一个方面,根据本发明的方法包括与常规集成电路制造中执行的步骤相似的处理步骤。 例如,该方法可以包括蚀刻以形成邻近凹槽的导电步骤,其可用于在单元之间形成互连。 根据另一方面,用于形成导电步骤的方法可以是自对准的,例如通过在模块上方定位反射镜并以一个或多个角度从基底下方曝光光致抗蚀剂,以及蚀刻以暴露导电步骤。

    Method for forming thin film photovoltaic interconnects using self-aligned process
    35.
    发明申请
    Method for forming thin film photovoltaic interconnects using self-aligned process 有权
    使用自对准工艺形成薄膜光伏互连的方法

    公开(公告)号:US20070232057A1

    公开(公告)日:2007-10-04

    申请号:US11394721

    申请日:2006-03-31

    IPC分类号: H01L21/4763

    摘要: Processing steps that are useful for forming interconnects in a photovoltaic module are described herein. According to one aspect, a method according to the invention includes processing steps that are similar to those performed in conventional integrated circuit fabrication. For example, the method can include etches to form a conductive step adjacent to the grooves that can be used to form interconnects between cells. According to another aspect the method for forming the conductive step can be self-aligned, such as by positioning a mirror above the module and exposing photoresist from underneath the substrate at an angle one or more times, and etching to expose the conductive step.

    摘要翻译: 本文描述了可用于在光伏模块中形成互连的处理步骤。 根据一个方面,根据本发明的方法包括与常规集成电路制造中执行的步骤相似的处理步骤。 例如,该方法可以包括蚀刻以形成邻近凹槽的导电步骤,其可用于在单元之间形成互连。 根据另一方面,用于形成导电步骤的方法可以是自对准的,例如通过在模块上方定位反射镜并以一个或多个角度从基底下方曝光光致抗蚀剂,以及蚀刻以暴露导电步骤。

    Evaluating effects of tilt angle in ion implantation
    36.
    发明申请
    Evaluating effects of tilt angle in ion implantation 审中-公开
    评估离子注入中倾斜角的影响

    公开(公告)号:US20060114478A1

    公开(公告)日:2006-06-01

    申请号:US10998104

    申请日:2004-11-26

    IPC分类号: G01B11/04

    摘要: Effect of tilt angle, at which ions are implanted into a semiconductor layer of a wafer, is evaluated by measuring reflectance of a region which has implanted ions in first areas that are interdigitated with a corresponding number of second areas lacking the implanted ions (or having the same specie ions in a background concentration). The second areas are protected during ion implantation either by being covered up or by being in shadows, of bars located over the semiconductor layer. Due to a shadow cast by a bar, only a portion of each opening between two adjacent bars is implanted with ions to form each first area, depending on the tilt angle. Hence, tilt angle is determined e.g. from a bar's shadow's width and the bar's thickness. The bar's shadow's width in turn is determined from the width of an opening and the width of an implanted first area.

    摘要翻译: 通过测量在与缺少注入离子的相应数量的第二区域交错的第一区域中注入离子的区域的反射率来测量离子注入到晶片的半导体层中的倾斜角的影响(或具有 背景浓度相同的离子)。 第二个区域在离子注入过程中被保护,或者通过被覆盖或者通过阴影,位于半导体层上方的条状物中。 由于棒的阴影,两个相邻条之间的每个开口的仅一部分用离子注入,以形成每个第一区域,这取决于倾斜角。 因此,确定倾斜角。 从酒吧的阴影的宽度和酒吧的厚度。 条的阴影的宽度依次由开口的宽度和植入的第一区域的宽度确定。

    Evaluation of openings in a dielectric layer
    37.
    发明申请
    Evaluation of openings in a dielectric layer 失效
    评估电介质层中的开口

    公开(公告)号:US20060094136A1

    公开(公告)日:2006-05-04

    申请号:US10979397

    申请日:2004-11-01

    IPC分类号: H01L21/66 H01L21/00

    摘要: A patterned dielectric layer is evaluated by measuring reflectance of a region which has openings. A heating beam may be chosen for having reflectance from an underlying conductive layer that is several times greater than absorptance, to provide a heightened sensitivity to presence of residue and/or changes in dimension of the openings. Reflectance may be measured by illuminating the region with a heating beam modulated at a preset frequency, and measuring power of a probe beam that reflects from the region at the preset frequency. Openings of many embodiments have sub-wavelength dimensions (i.e. smaller than the wavelength of the heating beam). The underlying conductive layer may be patterned into links of length smaller than the diameter of heating beam, so that the links float to a temperature higher than a corresponding temperature attained by a continuous trace that transfers heat away from the illuminated region by conduction.

    摘要翻译: 通过测量具有开口的区域的反射率来评估图案化的介电层。 加热束可以被选择为具有比吸收率大几倍的下层导电层的反射率,以提供对残留物的存在和/或开口尺寸变化的更高的灵敏度。 反射率可以通过以预设频率调制的加热光束照射该区域并测量从预设频率的区域反射的探测光束的功率来测量。 许多实施例的开口具有亚波长尺寸(即小于加热束的波长)。 底层导电层可以被图案化成长度小于加热束直径的链节,使得链节浮动到高于通过传导将热量从照射区域传递的连续迹线获得的相应温度的温度。

    Calibration as well as measurement on the same workpiece during fabrication
    38.
    发明申请
    Calibration as well as measurement on the same workpiece during fabrication 审中-公开
    在制造过程中对同一工件进行校准和测量

    公开(公告)号:US20050264806A1

    公开(公告)日:2005-12-01

    申请号:US11173665

    申请日:2005-07-02

    摘要: A method of fabricating a wafer includes forming a portion of the wafer, making a first measurement in the wafer using a first process, making a second measurement in the wafer using a second process each time the first measurement is made, using one of the first measurement and the second measurement to calibrate the other of the first measurement and the second measurement, and changing a process control parameter used in forming the portion of the wafer depending on the first measurement and on the second measurement.

    摘要翻译: 制造晶片的方法包括形成晶片的一部分,使用第一工艺在晶片中进行第一测量,使用第一测量中的第二处理在晶片中进行第二测量,使用第一测量中的一个 测量和第二测量以校准第一测量和第二测量中的另一个,并且根据第一测量和第二测量改变在形成晶片的部分中使用的过程控制参数。

    Evaluating sidewall coverage in a semiconductor wafer

    公开(公告)号:US20050099190A1

    公开(公告)日:2005-05-12

    申请号:US10996194

    申请日:2004-11-22

    CPC分类号: G01N21/55 G01R31/307

    摘要: A sidewall or other feature in a semiconductor wafer is evaluated by illuminating the wafer with at least one beam of electromagnetic radiation, and measuring intensity of a portion of the beam reflected by the wafer. Change in reflectance between measurements provides a measure of a property of the feature. The change may be either a decrease in reflectance or an increase in reflectance, depending on the embodiment. A single beam may be used if it is polarized in a direction substantially perpendicular to a longitudinal direction of the sidewall. A portion of the energy of the beam is absorbed by the sidewall, thereby to cause a decrease in reflectance when compared to reflectance by a flat region. Alternatively, two beams may be used, of which a first beam applies heat to the feature itself or to a region adjacent to the feature, and a second beam is used to measure an increase in reflectance caused by an elevation in temperature due to heat transfer through the feature. The elevation in temperature that is measured can be either of the feature itself, or of a region adjacent to the feature.