Abstract:
Multilevel power converters, power cells and methods are presented for selectively bypassing a power stage of a multilevel inverter circuit, in which a single relay or contactor includes first and second normally closed output control contacts coupled between a given power cell switching circuit and the given power cell output, along with a normally open bypass contact coupled across the power stage output, with a local or central controller energizing the coil of the relay or contactor of a given cell to bypass that cell.
Abstract:
The disclosed apparatus provides a simple and low cost solution of reducing voltage stress on AC motors and cables in VFD fed motor systems without connecting apparatus to live circuits. Disclosed examples include apparatus to couple a motor drive to a motor, including a cable with a first end coupled with an output of a motor drive, a second end coupled with a motor, a plurality of conductors to convey an output signal of the motor drive between the first and second ends to drive the motor, and a plurality of shields, with a conductive junction to couple tap points of at least two of the shields together. Resistors can be used to connect the tap points to the conductive junction to provide an impedance in series with the corresponding shield to reduce voltage stress to the motor or the cable. In certain examples, the shields include a semiconductor material to provide an impedance between the first end and the conductive junction to reduce voltage stress to the motor or the cable.
Abstract:
Power conversion systems, methods and precharge systems are disclosed to charge a DC bus capacitor, including thyristors and reverse diodes coupled in AC circuit paths between AC input lines and a rectifier, a precharge resistor coupled in one or more of the AC circuit paths, and a controller to turn all the thyristors off to allow the DC bus capacitor to charge through the precharge resistor, and to turn all the thyristors on when the DC bus voltage reaches a non-zero threshold value.
Abstract:
The present techniques include methods and systems for detecting a failure in a capacitor bank of an electrical drive system. Embodiments include using discharge resistors to discharge capacitors in the capacitor bank, forming a neutral node of the capacitor bank. In different capacitor configurations, the neutral node is measured, and the voltage is analyzed to determine whether a capacitor bank unbalance has occurred. In some embodiments, the node is a neutral-to-neutral node between the discharged side of the discharge resistors and a neutral side of the capacitor bank, or between the discharged side of the discharge resistors and a discharged side of a second set of discharge resistors. In some embodiments, the node is a neutral-to-ground node between the discharged side of the discharge resistors and a ground potential.
Abstract:
A method is provided for detection of a ground fault in a high resistance network in a voltage source power conversion circuit comprising a power converter that converts incoming AC power to DC power applied to a DC bus and an inverter that converts DC power from the DC bus to output AC power. The method includes detecting a midpoint-to-ground voltage between a low side of the DC bus and a ground potential and detecting the presence of a ground fault in a high resistance network based upon the detected midpoint-to-ground voltage.
Abstract:
A double fed induction generator (DFIG) converter, methods and computer readable mediums are presented in which rotor side current spikes are attenuated by selectively activating at least one series damping circuit to conduct current through a series damping circuit resistance coupled in series between one or more DFIG rotor leads and a grid side converter in response to a grid fault occurrence or a grid fault clearance, and selectively bypassing the series damping circuit resistance after activating the series damping circuit.
Abstract:
Control apparatus, techniques and computer readable mediums are presented to mitigate LCL filter resonance issue for voltage source converters. Two level voltage source converter with and without passive damping of LCL filter are selected for the comparative study. Control algorithms are presented to estimate the source impedance based on variable carrier PWM. Estimated source impedance is used to tune the control of the VSC to avoid the resonance of LCL filter has been presented. In situations in which LCL resonance cannot be avoided by tuning the control parameters, energy efficient techniques are disclosed to provide selective passive damping to facilitate continued power conversion system operation without significant adverse impact on system performance.
Abstract:
The present techniques include methods and systems for detecting the grounding condition of an electrical system to automatically determine a suitable electrical drive configuration. The drive includes a test resistor which may be connected or disconnected from the drive to measure different drive voltages. The measured drive voltages are analyzed to determine a type of grounding configuration of the electrical system in which the drive is to be installed. Embodiments also include determining ground resistance condition such as a high resistance ground (HRG) fault or a ground resistance fault when the drive is in operation.
Abstract:
An electric motor drive system includes a fan configured to cool power electronic components of the electric motor drive system. The electric motor drive system also includes a temperature sensor disposed proximate an air inlet of the fan and configured to sense an ambient temperature of air entering the air inlet. In addition, the electric motor drive system includes a processor communicatively coupled to the temperature sensor and configured to determine at least one of a drive prognostic and a derating requirement based on the sensed ambient temperature.
Abstract:
For motor stator resistance calculation, a method estimates an output voltage using a Direct Current (DC) bus voltage and a duty ratio for a motor drive at a first switching frequency and at least one second switching frequency. The method measures an output current at the first switching frequency and the at least one second switching frequency. The method calculates a first stator resistance for the first switching frequency and at least one second stator resistance for the at least one second switching frequency. The method estimates a stator resistance at a DC condition based on the first stator resistance and the at least one second stator resistance. The method sets a dynamic compensation based on a stator resistance error between the first switching frequency and the at least one second switching frequency.