公开(公告)号：US07297564B1

公开(公告)日：2007-11-20

申请号：US11416985

申请日：2006-05-02

申请人： Douglas J. Tweet ,  Jong-Jan Lee ,  Jer-Shen Maa ,  Sheng Teng Hsu

发明人： Douglas J. Tweet ,  Jong-Jan Lee ,  Jer-Shen Maa ,  Sheng Teng Hsu

IPC分类号： H01L21/00

CPC分类号： H01L31/1812 ,  Y02E10/50

摘要： A method of fabricating vertical sidewalls on silicon (110) substrates for use in Si/SiGe photodetectors includes preparing a silicon (110) layer wherein the silicon (110) plane is parallel to an underlying silicon wafer surface. Masking the silicon (110) layer with mask sidewalls parallel to a silicon (111) layer plane and etching the silicon (110) layer to remove an un-masked portion thereof, leaving a patterned silicon (110) layer having vertical silicon (111) sidewalls. Removing the mask; growing SiGe-containing layers on the patterned silicon (110) layer; and fabricating a photodetector.

摘要翻译： 在Si / SiGe光电探测器中使用的在硅（110）衬底上制造垂直侧壁的方法包括制备硅（110）层，其中硅（110）平面平行于下面的硅晶片表面。 屏蔽具有平行于硅（111）层平面的掩模侧壁的硅（110）层并蚀刻硅（110）层以去除其未掩蔽部分，留下具有垂直硅（111）的图案化硅（110）层， 侧壁 取下面罩; 在图案化的硅（110）层上生长含SiGe的层; 并制造光电检测器。

公开(公告)号：US07157300B2

公开(公告)日：2007-01-02

申请号：US10993533

申请日：2004-11-19

申请人： Jong-Jan Lee ,  Jer-Shen Maa ,  Sheng Teng Hsu ,  Douglas J. Tweet

发明人： Jong-Jan Lee ,  Jer-Shen Maa ,  Sheng Teng Hsu ,  Douglas J. Tweet

IPC分类号： H01L21/00

CPC分类号： H01L31/1804 ,  H01L21/187 ,  H01L21/76254 ,  H01L27/1443 ,  H01L31/02327 ,  H01L31/105 ,  Y02E10/547 ,  Y02P70/521

摘要： A method of fabricating a thin film germanium photodetector includes preparing a silicon substrate; fabricating a CMOS device on the silicon substrate; preparing a germanium substrate; preparing surfaces of each substrate for bonding; bonding the germanium substrate to the CMOS-bearing silicon substrate to form a bonded structure; removing a portion of the germanium substrate from the bonded structure; forming a PIN diode in the germanium substrate; removing a portion of the germanium layer by etching; and completing the germanium photo detector.

摘要翻译： 制造薄膜锗光电探测器的方法包括制备硅衬底; 在硅衬底上制造CMOS器件; 制备锗衬底; 准备每个基板的表面以进行接合; 将锗衬底结合到具有CMOS的硅衬底以形成结合结构; 从结合结构去除锗衬底的一部分; 在锗衬底中形成PIN二极管; 通过蚀刻去除锗层的一部分; 并完成锗光电检测器。

公开(公告)号：US07115945B2

公开(公告)日：2006-10-03

申请号：US11327092

申请日：2006-01-06

申请人： Jong-Jan Lee ,  Sheng Teng Hsu ,  Douglas J. Tweet ,  Jer-Shen Maa

发明人： Jong-Jan Lee ,  Sheng Teng Hsu ,  Douglas J. Tweet ,  Jer-Shen Maa

IPC分类号： H01L29/786

CPC分类号： H01L29/785 ,  H01L29/1054 ,  H01L29/66795 ,  H01L29/78687

摘要： Disclosing is a strained silicon finFET device having a strained silicon fin channel in a double gate finFET structure. The disclosed finFET device is a double gate MOSFET consisting of a silicon fin channel controlled by a self-aligned double gate for suppressing short channel effect and enhancing drive current. The silicon fin channel of the disclosed finFET device is a strained silicon fin channel, comprising a strained silicon layer deposited on a seed fin having different lattice constant, for example, a silicon layer deposited on a silicon germanium seed fin, or a carbon doped silicon layer deposited on a silicon seed fin. The lattice mismatch between the silicon layer and the seed fin generates the strained silicon fin channel in the disclosed finFET device to improve hole and electron mobility enhancement, in addition to short channel effect reduction characteristic inherently in a finFET device.

公开(公告)号：US07067430B2

公开(公告)日：2006-06-27

申请号：US10677005

申请日：2003-09-30

申请人： Jer-Shen Maa ,  Jong-Jan Lee ,  Douglas J. Tweet ,  Sheng Teng Hsu

发明人： Jer-Shen Maa ,  Jong-Jan Lee ,  Douglas J. Tweet ,  Sheng Teng Hsu

IPC分类号： H01L21/302

CPC分类号： H01L21/76254

摘要： A method of forming a silicon-germanium layer on an insulator includes depositing a layer of silicon-germanium on a silicon substrate to form a silicon/silicon-germanium portion; implanting hydrogen ions into the silicon substrate between about 500 Å to 1 μm below a silicon-germanium/silicon interface; bonding the silicon/silicon-germanium portion to an insulator substrate to form a couplet; thermally annealing the couplet in a first thermal annealing step to split the couplet; patterning and etching the silicon-germanium-on-insulator portion to remove portions of the silicon and SiGe layers; etching the silicon-germanium-on-insulator portion to remove the remaining silicon layer; thermally annealing the silicon-germanium-on-insulator portion in a second annealing step to relaxed the SiGe layer; and depositing a layer of strained silicon about the SiGe layer.

摘要翻译： 在绝缘体上形成硅 - 锗层的方法包括在硅衬底上沉积硅 - 锗层以形成硅/硅 - 锗部分; 在硅 - 锗/硅界面之下的约500埃至1微米处将氢离子注入到硅衬底中; 将硅/硅锗部分接合到绝缘体基板上以形成对联体; 在第一热退火步骤中对联接件进行热退火以分离联接件; 图案化和蚀刻绝缘体上硅部分以去除部分硅和SiGe层; 蚀刻绝缘体上硅部分以除去剩余的硅层; 在第二退火步骤中对绝缘体上硅部分进行热退火以松弛SiGe层; 以及在SiGe层周围沉积一层应变硅。

公开(公告)号：US07045832B2

公开(公告)日：2006-05-16

申请号：US10755567

申请日：2004-01-12

申请人： Douglas J. Tweet ,  Jong-Jan Lee ,  Jer-Shen Maa ,  Sheng Teng Hsu

发明人： Douglas J. Tweet ,  Jong-Jan Lee ,  Jer-Shen Maa ,  Sheng Teng Hsu

IPC分类号： H01L29/732 ,  G01J5/20

CPC分类号： H01L31/105 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02639 ,  H01L27/14627 ,  H01L27/14643 ,  H01L31/02327 ,  H01L31/028 ,  H01L31/035281 ,  H01L31/108 ,  H01L31/109 ,  H01L31/1812 ,  Y02E10/547

摘要： Provided are a SiGe vertical optical path and a method for selectively forming a SiGe optical path normal structure for IR photodetection. The method comprises: forming a Si substrate surface; forming a Si feature, normal with respect to the Si substrate surface, such as a trench, via, or pillar; and, selectively forming a SiGe optical path overlying the Si normal feature. In some aspects, the Si substrate surface is formed a first plane and the Si normal feature has walls (sidewalls), normal with respect to the Si substrate surface, and a surface in a second plane, parallel to the first plane. Then, selectively forming a SiGe optical path overlying the Si normal feature includes forming a SiGe vertical optical path overlying the normal feature walls.

摘要翻译： 提供了SiGe垂直光路和用于选择性地形成用于IR光电检测的SiGe光路法线结构的方法。 该方法包括：形成Si衬底表面; 形成Si特征，相对于诸如沟槽，通孔或支柱的Si衬底表面是正常的; 并且选择性地形成覆盖Si正常特征的SiGe光路。 在一些方面，Si衬底表面形成第一平面，并且Si正常特征具有相对于Si衬底表面法线的壁（侧壁）和平行于第一平面的第二平面中的表面。 然后，选择性地形成覆盖Si正常特征的SiGe光路包括形成覆盖正常特征壁的SiGe垂直光路。

公开(公告)号：US07045401B2

公开(公告)日：2006-05-16

申请号：US10602436

申请日：2003-06-23

申请人： Jong-Jan Lee ,  Sheng Teng Hsu ,  Douglas J. Tweet ,  Jer-Shen Maa

发明人： Jong-Jan Lee ,  Sheng Teng Hsu ,  Douglas J. Tweet ,  Jer-Shen Maa

IPC分类号： H01L21/00 ,  H01L21/338

CPC分类号： H01L29/785 ,  H01L29/1054 ,  H01L29/66795 ,  H01L29/78687

摘要： Disclosing is a strained silicon finFET device having a strained silicon fin channel in a double gate finFET structure. The disclosed finFET device is a double gate MOSFET consisting of a silicon fin channel controlled by a self-aligned double gate for suppressing short channel effect and enhancing drive current. The silicon fin channel of the disclosed finFET device is a strained silicon fin channel, comprising a strained silicon layer deposited on a seed fin having different lattice constant, for example, a silicon layer deposited on a silicon germanium seed fin, or a carbon doped silicon layer deposited on a silicon seed fin. The lattice mismatch between the silicon layer and the seed fin generates the strained silicon fin channel in the disclosed finFET device to improve hole and electron mobility enhancement, in addition to short channel effect reduction characteristic inherently in a finFET device.

摘要翻译： 公开了一种应变硅finFET器件，其具有双栅极finFET结构中的应变硅鳍通道。 所公开的finFET器件是由用于抑制短沟道效应和增强驱动电流的自对准双栅极控制的硅鳍通道组成的双栅极MOSFET。 所公开的finFET器件的硅鳍通道是应变硅鳍通道，包括沉积在具有不同晶格常数的种子鳍上的应变硅层，例如沉积在硅锗晶种鳍上的硅层或碳掺杂硅 层沉积在硅种子翅片上。 除了在finFET器件中固有的短沟道效应降低特性之外，硅层和种子鳍之间的晶格失配在所公开的finFET器件中产生应变硅鳍通道，以改善空穴和电子迁移率增强。

公开(公告)号：US06793731B2

公开(公告)日：2004-09-21

申请号：US10098757

申请日：2002-03-13

申请人： Sheng Teng Hsu ,  Jong-Jan Lee ,  Jer-shen Maa ,  Douglas J. Tweet

发明人： Sheng Teng Hsu ,  Jong-Jan Lee ,  Jer-shen Maa ,  Douglas J. Tweet

IPC分类号： C30B3302

CPC分类号： H01L21/26506 ,  C30B1/023 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/0251 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/02694

摘要： A method is provided for forming a relaxed single-crystal silicon germanium film on a silicon substrate. Also provided is a film structure with a relaxed layer of graded silicon germanium on a silicon substrate. The method comprises: providing a silicon (Si) substrate with a top surface; growing a graded layer of strained single-crystal Si1−xGex having a bottom surface overlying the Si substrate top surface and a top surface, where x increases with the Si1−xGex layer thickness in the range between 0.03 and 0.5, wherein the Si1−xGex layer has a thickness in the range of 2500 Å to 5000 Å; implanting hydrogen ions; penetrating the Si substrate with the hydrogen ions a depth in the range of 300 Å to 1000 Å; implanting heavy ions, such as Si or Ge, into the Si1−xGex; in response to the heavy ion implantation, amorphizing a first region of the Si1−xGex layer adjacent the Si substrate; annealing; in response to the annealing, forming a hydrogen platelets layer between the Si substrate and the Si1−xGex layer; forming a silicon layer with a high density of hydrogen underlying the hydrogen platelets layer; and, forming a relaxed single-crystal Si1−xGex region, free of defects.

摘要翻译： 提供了一种在硅衬底上形成松弛的单晶硅锗膜的方法。 还提供了在硅衬底上具有缓和的渐变硅锗层的膜结构。 该方法包括：提供具有顶表面的硅（Si）衬底; 生长具有覆盖Si衬底顶表面的底表面和顶表面的应变单晶Si1-xGex的分级层，其中x随着Si1-xGex层厚度在0.03和0.5之间的范围增加，其中Si1-xGex 层的厚度在2500埃至5000埃的范围内; 植入氢离子; 用氢离子穿透Si衬底，深度在300埃至1000埃的范围内; 将诸如Si或Ge的重离子注入到Si1-xGex中; 响应于重离子注入，使与Si衬底相邻的Si1-xGex层的第一区域非晶化; 退火; 响应于退火，在Si衬底和Si1-xGex层之间形成氢血小板层; 在氢薄膜层下形成具有高密度氢的硅层; 并形成松弛的单晶Si1-xGex区域，没有缺陷。

公开(公告)号：US07442599B2

公开(公告)日：2008-10-28

申请号：US11522003

申请日：2006-09-15

申请人： Jer-Shen Maa ,  Jinke Tang ,  Jong-Jan Lee ,  Douglas J. Tweet ,  Sheng Teng Hsu

发明人： Jer-Shen Maa ,  Jinke Tang ,  Jong-Jan Lee ,  Douglas J. Tweet ,  Sheng Teng Hsu

IPC分类号： H01L21/00

CPC分类号： H01L31/035254 ,  B82Y20/00 ,  H01L27/14649 ,  H01L31/028 ,  H01L31/101 ,  H01L31/1804 ,  Y02P70/521

摘要： A silicon/germanium (SiGe) superlattice thermal sensor is provided with a corresponding fabrication method. The method forms an active CMOS device in a first Si substrate, and a SiGe superlattice structure on a second Si-on-insulator (SOI) substrate. The first substrate is bonded to the second substrate, forming a bonded substrate. An electrical connection is formed between the SiGe superlattice structure and the CMOS device, and a cavity is formed between the SiGe superlattice structure and the bonded substrate.

摘要翻译： 硅/锗（SiGe）超晶格热传感器具有相应的制造方法。 该方法在第一Si衬底中形成有源CMOS器件，并在第二绝缘体上（SOI）衬底上形成SiGe超晶格结构。 第一基板与第二基板接合，形成接合基板。 在SiGe超晶格结构和CMOS器件之间形成电连接，并且在SiGe超晶格结构和键合衬底之间形成空穴。

公开(公告)号：US07419844B2

公开(公告)日：2008-09-02

申请号：US11384110

申请日：2006-03-17

申请人： Jong-Jan Lee ,  Sheng Teng Hsu ,  Douglas J. Tweet ,  Jer-Shen Maa

发明人： Jong-Jan Lee ,  Sheng Teng Hsu ,  Douglas J. Tweet ,  Jer-Shen Maa

IPC分类号： H01L21/00

CPC分类号： H01L27/14647

摘要： A CMOS active pixel sensor includes a silicon-on-insulator substrate having a silicon substrate with an insulator layer formed thereon and a top silicon layer formed on the insulator layer. A stacked pixel sensor cell includes a bottom photodiode fabricated on the silicon substrate, for sensing light of a longest wavelength; a middle photodiode fabricated on the silicon substrate, for sensing light of a medium wavelength, which is stacked above the bottom photodiode; and a top photodiode fabricated on the top silicon layer, for sensing light of a shorter wavelength, which is stacked above the middle and bottom photodiodes. Pixel transistor sets are fabricated on the top silicon layer and are associated with each pixel sensor cell by electrical connections which extend between each of the photodiodes and respective pixel transistor(s). CMOS control circuitry is fabricated adjacent to an array of active pixel sensor cells and electrically connected thereto.

摘要翻译： CMOS有源像素传感器包括具有在其上形成有绝缘体层的硅衬底和形成在绝缘体层上的顶部硅层的绝缘体上硅衬底。 层叠像素传感器单元包括：制造在硅衬底上的底部光电二极管，用于感测最长波长的光; 制造在硅衬底上的中间光电二极管，用于感测中等波长的光; 和制造在顶部硅层上的顶部光电二极管，用于感测较短波长的光，该光被层叠在中间和底部光电二极管的上方。 像素晶体管组被制造在顶部硅层上，并且通过在每个光电二极管和相应的像素晶体管之间延伸的电连接与每个像素传感器单元相关联。 CMOS控制电路与有源像素传感器单元的阵列相邻并且与其电连接。

公开(公告)号：US07361574B1

公开(公告)日：2008-04-22

申请号：US11601173

申请日：2006-11-17

申请人： Jer-Shen Maa ,  David R. Evans ,  Jong-Jan Lee ,  Douglas J. Tweet ,  Sheng Teng Hsu

发明人： Jer-Shen Maa ,  David R. Evans ,  Jong-Jan Lee ,  Douglas J. Tweet ,  Sheng Teng Hsu

IPC分类号： H01L21/30 ,  H01L21/461

CPC分类号： H01L21/76251 ,  H01L21/84 ,  Y10S438/926 ,  Y10S438/933

摘要： A method is provided for transferring a single-crystal silicon (Si) film to a glass substrate. The method deposits a germanium (Ge)-containing material overlying a Si wafer, forming a sacrificial Ge-containing film. A single-crystal Si film is formed overlying the sacrificial Ge-containing film. The Si film surface is bonded to a transparent substrate, forming a bonded substrate. The bonded substrate is immersed in a Ge etching solution to remove the sacrificial Ge-containing film, which separates the transparent substrate from the Si wafer. The result is a transparent substrate with an overlying single crystal Si film. Optionally, channels can be formed to distribute the Ge etching solution, and promote the removal of the Ge-containing film.

摘要翻译： 提供了将单晶硅（Si）膜转印到玻璃基板上的方法。 该方法沉积覆盖Si晶片的含锗（Ge）的材料，形成牺牲含Ge膜。 形成覆盖牺牲的含Ge膜的单晶Si膜。 将Si膜表面粘合到透明基板上，形成键合衬底。 将键合衬底浸入Ge蚀刻溶液中以除去将透明衬底与Si晶片分离的牺牲Ge含量膜。 结果是具有上覆单晶Si膜的透明衬底。 可选地，可以形成通道以分布Ge蚀刻溶液，并促进除去含Ge膜。