公开(公告)号：US20210373431A1

公开(公告)日：2021-12-02

申请号：US17109833

申请日：2020-12-02

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Pei-Cheng Hsu ,  Ta-Cheng Lien ,  Hsin-Chang Lee

IPC: G03F1/24

Abstract: A reflective mask includes a substrate, a reflective multilayer disposed over the substrate, a capping layer disposed over the reflective multilayer, an intermediate layer disposed over the capping layer, an absorber layer disposed over the intermediate layer, and a cover layer disposed over the absorber layer. The intermediate layer includes a material having a lower hydrogen diffusivity than a material of the capping layer.

公开(公告)号：US20190324364A1

公开(公告)日：2019-10-24

申请号：US15956189

申请日：2018-04-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Cheng Hsu ,  Yih-Chen Su ,  Chi-Kuang Tsai ,  Ta-Cheng Lien ,  Tzu Yi Wang ,  Jong-Yuh Chang ,  Hsin-Chang Lee

IPC: G03F1/24 ,  G03F1/26 ,  G03F7/20 ,  G03F1/80 ,  G03F1/84 ,  H01L21/263

Abstract: A method comprises receiving a workpiece that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further comprises patterning the absorber layer to provide first trenches corresponding to circuit patterns on a wafer, and patterning the absorber layer, the capping layer, and the reflective multilayer to provide second trenches corresponding to a die boundary area on the wafer, thereby providing an extreme ultraviolet lithography (EUVL) mask. The method further comprises treating the EUVL mask with a treatment chemical that prevents exposed surfaces of the absorber layer from oxidation.

公开(公告)号：US09341940B2

公开(公告)日：2016-05-17

申请号：US14278678

申请日：2014-05-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wen-Chang Hsueh ,  Chia-Jen Chen ,  Ta-Cheng Lien ,  Hsin-Chang Lee

IPC: G03F1/32

CPC classification number: G03F1/32 ,  G03F1/28

Abstract: A reticle and a method of fabricating the reticle are provided. In various embodiments, the reticle includes a substrate, a patterned first attenuating layer, a patterned second attenuating layer, and a patterned third attenuating layer. The patterned first attenuating layer is disposed on the substrate. The patterned second attenuating layer is disposed on the patterned first attenuating layer. The patterned third attenuating layer is disposed on the patterned second attenuating layer. A first part of the patterned first attenuating layer, a first part of patterned second attenuating layer, and the patterned third attenuating layer are stacked on the substrate as a binary intensity mask portion.

Abstract translation: 提供了掩模版和制作掩模版的方法。 在各种实施例中，掩模版包括衬底，图案化的第一衰减层，图案化的第二衰减层和图案化的第三衰减层。 图案化的第一衰减层设置在基板上。 图案化的第二衰减层设置在图案化的第一衰减层上。 图案化的第三衰减层设置在图案化的第二衰减层上。 图案化第一衰减层的第一部分，图案化第二衰减层的第一部分和图案化的第三衰减层作为二值强度掩模部分堆叠在基板上。

公开(公告)号：US12092952B2

公开(公告)日：2024-09-17

申请号：US17347322

申请日：2021-06-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kevin Tanady ,  Pei-Cheng Hsu ,  Ta-Cheng Lien ,  Tzu-Yi Wang ,  Hsin-Chang Lee

IPC: G03F1/24 ,  G03F1/54 ,  H01L21/033

CPC classification number: G03F1/24 ,  G03F1/54 ,  H01L21/0332 ,  H01L21/0337

Abstract: An extreme ultraviolet mask includes a substrate, a reflective multilayer stack over the substrate, a capping layer over the reflective multilayer stack, a patterned absorber layer over a first portion of the capping layer, and a magnetic layer over a second portion of the capping layer around the first portion.

公开(公告)号：US20240264520A1

公开(公告)日：2024-08-08

申请号：US18635209

申请日：2024-04-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Cheng Hsu ,  Chun-Fu Yang ,  Ta-Cheng Lien ,  Hsin-Chang Lee

IPC: G03F1/24 ,  G03F1/70 ,  G03F7/20

CPC classification number: G03F1/24 ,  G03F1/70 ,  G03F7/2004

Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.

公开(公告)号：US12001132B2

公开(公告)日：2024-06-04

申请号：US16534968

申请日：2019-08-07

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Pei-Cheng Hsu ,  Ta-Cheng Lien ,  Ping-Hsun Lin ,  Shih-Che Wang ,  Hsin-Chang Lee

IPC: G03F1/22 ,  G03F1/48 ,  G03F1/52 ,  G03F1/54 ,  H01L21/027

CPC classification number: G03F1/22 ,  G03F1/48 ,  G03F1/52 ,  G03F1/54 ,  H01L21/0274

Abstract: Fabricating a photomask includes forming a protection layer over a substrate. A plurality of multilayers of reflecting films are formed over the protection layer. A capping layer is formed over the plurality of multilayers. An absorption layer is formed over capping layer. A first photoresist layer is formed over portions of absorption layer. Portions of the first photoresist layer and absorption layer are patterned, forming first openings in absorption layer. The first openings expose portions of the capping layer. Remaining portions of first photoresist layer are removed and a second photoresist layer is formed over portions of absorption layer. The second photoresist layer covers at least the first openings. Portions of the absorption layer and capping layer and plurality of multilayer of reflecting films not covered by the second photoresist layer are patterned, forming second openings. The second openings expose portions of protection layer and second photoresist layer is removed.

公开(公告)号：US11988953B2

公开(公告)日：2024-05-21

申请号：US18151416

申请日：2023-01-06

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Pei-Cheng Hsu ,  Ta-Cheng Lien ,  Hsin-Chang Lee

IPC: G03F1/24 ,  G03F1/22

CPC classification number: G03F1/24 ,  G03F1/22

Abstract: A method includes forming a multi-layered reflective layer over a substrate; depositing a metal capping layer over the multi-layered reflective layer; depositing a first metal oxide layer over the metal capping layer; depositing a metal nitride layer over the first metal oxide layer; depositing a second metal oxide layer over the metal nitride layer; forming a plurality of features on the second metal oxide layer and the metal nitride layer.

公开(公告)号：US11906897B2

公开(公告)日：2024-02-20

申请号：US17350685

申请日：2021-06-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Cheng Hsu ,  Yih-Chen Su ,  Chi-Kuang Tsai ,  Ta-Cheng Lien ,  Tzu Yi Wang ,  Jong-Yuh Chang ,  Hsin-Chang Lee

IPC: G03F1/24 ,  G03F1/26 ,  G03F7/00 ,  H01L21/263 ,  G03F1/80 ,  G03F1/84

CPC classification number: G03F1/24 ,  G03F1/26 ,  G03F1/80 ,  G03F1/84 ,  G03F7/70433 ,  G03F7/70466 ,  H01L21/2633

Abstract: A reflective mask includes a reflective multilayer over a substrate, a capping layer over the reflective multilayer, an absorber layer over the capping layer and including a top surface, and a protection layer directly on the top surface of the absorber layer. The absorber layer is formed of a first material and the protection layer is formed of a second material that is less easily to be oxidized than the first material.

公开(公告)号：US20230408906A1

公开(公告)日：2023-12-21

申请号：US18365760

申请日：2023-08-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Cheng Hsu ,  Ping-Hsun Lin ,  Ta-Cheng Lien ,  Hsin-Chang Lee

IPC: G03F1/62 ,  G03F7/00 ,  C23C16/455

CPC classification number: G03F1/62 ,  G03F7/70033 ,  C23C16/45525 ,  G03F7/70983

Abstract: Coated nanotubes and bundles of nanotubes are formed into membranes useful in optical assemblies in EUV photolithography systems. These optical assemblies are useful in methods for patterning materials on a semiconductor substrate. Such methods involve generating, in a UV lithography system, UV radiation. The UV radiation is passed through a coating layer of the optical assembly, e.g., a pellicle assembly. The UV radiation that has passed through the coating layer is passed through a matrix of individual nanotubes or matrix of nanotube bundles. UV radiation that passes through the matrix of individual nanotubes or matrix of nanotube bundles is reflected from a mask and received at a semiconductor substrate.

公开(公告)号：US11815805B2

公开(公告)日：2023-11-14

申请号：US17707712

申请日：2022-03-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wen-Chang Hsueh ,  Hsin-Chang Lee ,  Ta-Cheng Lien

IPC: G03F1/24

CPC classification number: G03F1/24

Abstract: A method for forming an extreme ultraviolet photolithography mask includes forming a reflective multilayer, forming a buffer layer on the reflective multilayer, and forming an absorption layer on the reflective multilayer. Prior to patterning the absorption layer, an outer portion of the absorption layer is removed. Photoresist is then deposited on the top surface of the absorption layer and on sidewalls of the absorption layer. The photoresist is then patterned, and the absorption layer is etched with a plasma etching process in the presence of the patterned photoresist. The presence of the photoresist on the sidewalls of the absorption layer during the plasma etching process helps to improve uniformity in the etching of the absorption layer during the plasma etching process.