公开(公告)号：US08558285B2

公开(公告)日：2013-10-15

申请号：US13069725

申请日：2011-03-23

Applicant: Umesh K. Mishra ,  Lee S. McCarthy

Inventor： Umesh K. Mishra ,  Lee S. McCarthy

IPC: H01L29/72

CPC classification number: H01L29/7802 ,  H01L21/187 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/267 ,  H01L29/7371 ,  H01L29/7786

Abstract: A method for fabricating an electronic device, comprising wafer bonding a first semiconductor material to a III-nitride semiconductor, at a temperature below 550° C., to form a device quality heterojunction between the first semiconductor material and the III-nitride semiconductor, wherein the first semiconductor material is different from the III-nitride semiconductor and is selected for superior properties, or preferred integration or fabrication characteristics in the injector region as compared to the III-nitride semiconductor.

Abstract translation: 一种制造电子器件的方法，包括在低于550℃的温度下将第一半导体材料晶体结合到III族氮化物半导体，以在第一半导体材料和III族氮化物半导体之间形成器件质量异质结，其中 第一半导体材料与III族氮化物半导体不同，并且与III族氮化物半导体相比被选择用于喷射器区域中的优异性能或优选的集成或制造特性。

公开(公告)号：US20120319127A1

公开(公告)日：2012-12-20

申请号：US13527885

申请日：2012-06-20

Applicant: Srabanti Chowdhury ,  Ramya Yeluri ,  Christophe Hurni ,  Umesh K. Mishra ,  Ilan Ben-Yaacov

Inventor： Srabanti Chowdhury ,  Ramya Yeluri ,  Christophe Hurni ,  Umesh K. Mishra ,  Ilan Ben-Yaacov

IPC: H01L29/20 ,  H01L21/20

CPC classification number: H01L29/7787 ,  H01L29/0646 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/205 ,  H01L29/41766 ,  H01L29/66204 ,  H01L29/66462 ,  H01L29/7788 ,  H01L29/861

Abstract: A current aperture vertical electron transistor (CAVET) with ammonia (NH3) based molecular beam epitaxy (MBE) grown p-type Gallium Nitride (p-GaN) as a current blocking layer (CBL). Specifically, the CAVET features an active buried Magnesium (Mg) doped GaN layer for current blocking purposes. This structure is very advantageous for high power switching applications and for any device that requires a buried active p-GaN layer for its functionality.

Abstract translation: 具有基于氨（NH3）的分子束外延（MBE）的电流孔径垂直电子晶体管（CAVET）生长的p型氮化镓（p-GaN）作为电流阻挡层（CBL）。 具体来说，CAVET具有用于电流阻塞目的的有源掩埋的镁（Mg）掺杂的GaN层。 这种结构对于大功率开关应用以及需要掩埋有源p-GaN层用于其功能的任何器件是非常有利的。

公开(公告)号：US20120193638A1

公开(公告)日：2012-08-02

申请号：US13444011

申请日：2012-04-11

Applicant: Stacia Keller ,  Umesh K. Mishra ,  Nicholas A. Fichtenbaum

Inventor： Stacia Keller ,  Umesh K. Mishra ,  Nicholas A. Fichtenbaum

IPC: H01L29/04 ,  H01L21/20

CPC classification number: C30B25/02 ,  C30B29/403 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02538 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/0262

Abstract: Methods for the heteroepitaxial growth of smooth, high quality films of N-face GaN film grown by MOCVD are disclosed. Use of a misoriented substrate and possibly nitridizing the substrate allow for the growth of smooth N-face GaN and other Group III nitride films as disclosed herein. The present invention also avoids the typical large (μm sized) hexagonal features which make N-face GaN material unacceptable for device applications. The present invention allows for the growth of smooth, high quality films which makes the development of N-face devices possible.

Abstract translation: 公开了通过MOCVD生长的N面GaN薄膜的平滑，高质量薄膜异质外延生长的方法。 使用错误取向的衬底并且可能使衬底氮化使得能够生长平滑的N面GaN和其他III族氮化物膜，如本文所公开的。 本发明还避免了典型的大（μm尺寸）六边形特征，这使得N面GaN材料不适合于器件应用。 本发明允许平滑，高质量的膜的生长，这使得N面装置的发展成为可能。

公开(公告)号：US20120091467A1

公开(公告)日：2012-04-19

申请号：US13331973

申请日：2011-12-20

Applicant: Arpan Chakraborty ,  Kwang-Choong Kim ,  James S. Speck ,  Steven P. DenBaars ,  Umesh K. Mishra

Inventor： Arpan Chakraborty ,  Kwang-Choong Kim ,  James S. Speck ,  Steven P. DenBaars ,  Umesh K. Mishra

IPC: H01L29/20 ,  H01L21/20

CPC classification number: H01L21/02639 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02516 ,  H01L21/0254 ,  H01L33/007

Abstract: A method for growing reduced defect density planar gallium nitride (GaN) films is disclosed. The method includes the steps of (a) growing at least one silicon nitride (SiNx) nanomask layer over a GaN template, and (b) growing a thickness of a GaN film on top of the SiNx nanomask layer.

Abstract translation: 公开了一种用于生长减少缺陷密度的平面氮化镓（GaN）膜的方法。 该方法包括以下步骤：（a）在GaN模板上生长至少一个氮化硅（SiNx）纳米掩模层，以及（b）在SiNx纳米掩模层的顶部生长GaN膜的厚度。

公开(公告)号：US08124957B2

公开(公告)日：2012-02-28

申请号：US11360166

申请日：2006-02-22

Applicant: James P. Ibbetson ,  Bernd P. Keller ,  Umesh K. Mishra

Inventor： James P. Ibbetson ,  Bernd P. Keller ,  Umesh K. Mishra

IPC: H01L29/06

CPC classification number: H01L29/205 ,  H01L29/2003 ,  H01L29/88

Abstract: A low resistance tunnel junction that uses a natural polarization dipole associated with dissimilar materials to align a conduction band to a valence band is disclosed. Aligning the conduction band to the valence band of the junction encourages tunneling across the junction. The tunneling is encouraged, because the dipole space charge bends the energy bands, and shortens a tunnel junction width charge carriers must traverse to tunnel across the junction. Placing impurities within or near the tunnel junction that may form deep states in the junction may also encourage tunneling in a tunnel junction. These states shorten the distance charge carriers must traverse across the tunnel junction.

Abstract translation: 公开了一种低电阻隧道结，其使用与不同材料相关联的自然极化偶极子将导带与价带对准。 将导带与结点的价带对准，促进穿越结的隧穿。 鼓励隧道，因为偶极空间电荷弯曲能带，并缩短隧道结宽度，电荷载流子必须穿过穿越交界处的隧道。 将杂质置于隧道结内或其附近可能形成深交界处的深部状态也可能鼓励在隧道结中隧道。 这些状态缩短了电荷载体必须穿过隧道结的距离。

公开(公告)号：US07948011B2

公开(公告)日：2011-05-24

申请号：US11523286

申请日：2006-09-18

Applicant: Siddharth Rajan ,  Chang Soo Suh ,  James S. Speck ,  Umesh K. Mishra

Inventor： Siddharth Rajan ,  Chang Soo Suh ,  James S. Speck ,  Umesh K. Mishra

IPC: H01L29/66

CPC classification number: H01L29/045 ,  H01L29/2003 ,  H01L29/432 ,  H01L29/7781 ,  H01L29/7783 ,  H01L29/7784

Abstract: A novel enhancement mode field effect transistor (FET), such as a High Electron Mobility Transistors (HEMT), has an N-polar surface uses polarization fields to reduce the electron population under the gate in the N-polar orientation, has improved dispersion suppression, and low gate leakage.

Abstract translation: 一种新型的增强型场效应晶体管（FET），例如高电子迁移率晶体管（HEMT），具有N-极性表面，利用极化场来减小N极方向栅极下的电子群，改善色散抑制 ，低栅极泄漏。

公开(公告)号：US20110044364A1

公开(公告)日：2011-02-24

申请号：US12859661

申请日：2010-08-19

Applicant: Robert M. Farrell ,  Daniel A. Haeger ,  Po Shan Hsu ,  Umesh K. Mishra ,  Steven P. DenBaars ,  James S. Speck ,  Shuji Nakamura

Inventor： Robert M. Farrell ,  Daniel A. Haeger ,  Po Shan Hsu ,  Umesh K. Mishra ,  Steven P. DenBaars ,  James S. Speck ,  Shuji Nakamura

IPC: H01S5/028 ,  H01L21/306

CPC classification number: H01S5/34333 ,  B82Y20/00 ,  H01S5/0014 ,  H01S5/0202 ,  H01S5/2009 ,  H01S5/209 ,  H01S5/22 ,  H01S5/3063 ,  H01S5/3213

Abstract: A structure and method that can be used to achieve selective etching in (Ga, Al, In, B) N laser diodes, comprising fabricating (Ga, Al, In, B) N laser diodes with one or more Al-containing etch stop layers.

Abstract translation: 可用于实现（Ga，Al，In，B）N激光二极管中的选择性蚀刻的结构和方法，包括用一个或多个含Al蚀刻停止层制造（Ga，Al，In，B）N激光二极管 。

公开(公告)号：US20100193911A1

公开(公告)日：2010-08-05

申请号：US12759903

申请日：2010-04-14

Applicant: Arpan Chakraborty ,  Kwang-Choong Kim ,  James S. Speck ,  Steven P. DenBaars ,  Umesh K. Mishra

Inventor： Arpan Chakraborty ,  Kwang-Choong Kim ,  James S. Speck ,  Steven P. DenBaars ,  Umesh K. Mishra

IPC: H01L29/20 ,  H01L21/20

CPC classification number: H01L21/02639 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02516 ,  H01L21/0254 ,  H01L33/007

Abstract: A method for growing reduced defect density planar gallium nitride (GaN) films is disclosed. The method includes the steps of (a) growing at least one silicon nitride (SiNx) nanomask layer over a GaN template, and (b) growing a thickness of a GaN film on top of the SiNx nanomask layer.

Abstract translation: 公开了一种用于生长减少缺陷密度的平面氮化镓（GaN）膜的方法。 该方法包括以下步骤：（a）在GaN模板上生长至少一个氮化硅（SiNx）纳米掩模层，以及（b）在SiNx纳米掩模层的顶部生长GaN膜的厚度。

公开(公告)号：US07723216B2

公开(公告)日：2010-05-25

申请号：US11801283

申请日：2007-05-09

Applicant: Arpan Chakraborty ,  Kwang-Choong Kim ,  James S. Speck ,  Steven P. DenBaars ,  Umesh K. Mishra

Inventor： Arpan Chakraborty ,  Kwang-Choong Kim ,  James S. Speck ,  Steven P. DenBaars ,  Umesh K. Mishra

IPC: H01L21/20

CPC classification number: H01L21/02639 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02516 ,  H01L21/0254 ,  H01L33/007

Abstract: A method for growing reduced defect density planar gallium nitride (GaN) films is disclosed. The method includes the steps of (a) growing at least one silicon nitride (SiNx) nanomask layer over a GaN template, and (b) growing a thickness of a GaN film on top of the SiNx nanomask layer.

Abstract translation: 公开了一种用于生长减少缺陷密度的平面氮化镓（GaN）膜的方法。 该方法包括以下步骤：（a）在GaN模板上生长至少一个氮化硅（SiNx）纳米掩模层，以及（b）在SiNx纳米掩模层的顶部生长GaN膜的厚度。

公开(公告)号：US20100109018A1

公开(公告)日：2010-05-06

申请号：US12610938

申请日：2009-11-02

Applicant: Zhen Chen ,  Umesh K. Mishra ,  Steven P. DenBaars ,  Shuji Nakamura

Inventor： Zhen Chen ,  Umesh K. Mishra ,  Steven P. DenBaars ,  Shuji Nakamura

IPC: H01L29/20 ,  H01L29/205 ,  H01L21/20

CPC classification number: C30B29/406 ,  C30B25/183 ,  C30B29/36 ,  C30B29/403

Abstract: A method for fabricating a single crystal, high quality, semi-insulating (SI) gallium nitride (GaN) layer using an AlxGa1-xN blocking layer. A buffer layer is grown on a substrate, the AlxGa1-xN blocking layer is grown on the buffer layer, and a single crystal, high quality, SI-GaN layer is grown on the AlxGa1-xN blocking layer. The AlxGa1-xN blocking layer acts as a diffusion blocking layer that prevents the diffusion of donors from the substrate from reaching the SI-GaN layer. The resulting SI-GaN layer reduces parasitic current flow and parasitic capacitive effects in electronic devices.

Abstract translation: 使用Al x Ga 1-x N阻挡层制造单晶，高质量，半绝缘（SI）氮化镓（GaN）层的方法。 在衬底上生长缓冲层，在缓冲层上生长Al x Ga 1-x N阻挡层，并且在Al x Ga 1-x N阻挡层上生长单晶，高质量的SI-GaN层。 Al x Ga 1-x N阻挡层充当扩散阻挡层，防止供体从衬底扩散到达SI-GaN层。 所产生的SI-GaN层减少了电子器件中的寄生电流和寄生电容效应。