公开(公告)号：US20110027951A1

公开(公告)日：2011-02-03

申请号：US12902944

申请日：2010-10-12

申请人： Toshiharu Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III ,  Mark E. Masters

发明人： Toshiharu Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III ,  Mark E. Masters

IPC分类号： H01L21/8234

CPC分类号： H01L21/823412 ,  B01J23/74 ,  B01J37/0238 ,  B82Y10/00 ,  H01L21/7624 ,  H01L21/823437 ,  H01L27/286 ,  H01L51/0048 ,  H01L51/0545 ,  H01L51/055 ,  Y10S977/742 ,  Y10S977/762 ,  Y10S977/763

摘要： A semiconductor structure in which a planar semiconductor device and a horizontal carbon nanotube transistor have a shared gate and a method of fabricating the same are provided in the present application. The hybrid semiconductor structure includes at least one horizontal carbon nanotube transistor and at least one planar semiconductor device, in which the at least one horizontal carbon nanotube transistor and the at least one planar semiconductor device have a shared gate and the at least one horizontal carbon nanotube transistor is located above a gate of the at least one planar semiconductor device.

摘要翻译： 在本申请中提供了其中平面半导体器件和水平碳纳米管晶体管具有共享栅极的半导体结构及其制造方法。 所述混合半导体结构包括至少一个水平碳纳米管晶体管和至少一个平面半导体器件，其中所述至少一个水平碳纳米管晶体管和所述至少一个平面半导体器件具有共享栅极，并且所述至少一个水平碳纳米管 晶体管位于至少一个平面半导体器件的栅极之上。

公开(公告)号：US20100119422A1

公开(公告)日：2010-05-13

申请号：US12652908

申请日：2010-01-06

申请人： Steven J. Holmes ,  Mark C. Hakey ,  David V. Horak ,  James G. Ryan

发明人： Steven J. Holmes ,  Mark C. Hakey ,  David V. Horak ,  James G. Ryan

IPC分类号： B01J15/00 ,  B01J19/00

CPC分类号： B01D53/02 ,  B01D2253/102 ,  B01D2253/304 ,  B01J20/20 ,  B01J20/205 ,  B01J20/3242 ,  B82Y30/00 ,  Y10S55/05 ,  Y10S977/742 ,  Y10S977/745 ,  Y10S977/748 ,  Y10S977/75 ,  Y10S977/752

摘要： A carbon nanotube filter. The filter including a filter housing; and chemically active carbon nanotubes within the filter housing, the chemically active carbon nanotubes comprising a chemically active layer formed on carbon nanotubes or comprising chemically reactive groups on sidewalls of the carbon nanotubes; and media containing the chemically active carbon nanotubes.

摘要翻译： 碳纳米管过滤器。 过滤器包括过滤器壳体; 和化学活性碳纳米管，所述化学活性碳纳米管包括在碳纳米管上形成的化学活性层或在碳纳米管的侧壁上包含化学反应性基团; 和含有化学活性碳纳米管的介质。

公开(公告)号：US07708816B2

公开(公告)日：2010-05-04

申请号：US12168171

申请日：2008-07-07

申请人： Steven J. Holmes ,  Mark C. Hakey ,  David V. Horak ,  James G. Ryan

发明人： Steven J. Holmes ,  Mark C. Hakey ,  David V. Horak ,  James G. Ryan

IPC分类号： B01D59/26

CPC分类号： B01D53/02 ,  B01D2253/102 ,  B01D2253/304 ,  B01J20/20 ,  B01J20/205 ,  B01J20/3242 ,  B82Y30/00 ,  Y10S55/05 ,  Y10S977/742 ,  Y10S977/745 ,  Y10S977/748 ,  Y10S977/75 ,  Y10S977/752

摘要： A carbon nanotube filter. The filter including a filter housing; and chemically active carbon nanotubes within the filter housing, the chemically active carbon nanotubes comprising a chemically active layer formed on carbon nanotubes or comprising chemically reactive groups on sidewalls of the carbon nanotubes; and media containing the chemically active carbon nanotubes.

摘要翻译： 碳纳米管过滤器。 过滤器包括过滤器壳体; 和化学活性碳纳米管，所述化学活性碳纳米管包括在碳纳米管上形成的化学活性层或在碳纳米管的侧壁上包含化学反应性基团; 和含有化学活性碳纳米管的介质。

公开(公告)号：US07652334B2

公开(公告)日：2010-01-26

申请号：US11866471

申请日：2007-10-03

申请人： Toshiharu Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III

发明人： Toshiharu Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III

IPC分类号： H01L29/72

CPC分类号： H01L21/02164 ,  H01L21/0214 ,  H01L21/02282 ,  H01L21/3143 ,  H01L21/3147 ,  H01L21/316 ,  H01L21/76224 ,  H01L21/823878

摘要： A method and structure for forming a semiconductor structure. A semiconductor substrate is provided. A trench is formed within the semiconductor substrate. A first layer of electrically insulative material is formed within the trench. A first portion and a second portion of the first layer of electrically insulative material is removed. A second layer of electrically insulative material is selectively grown on the first layer comprising the removed first portion and the removed second portion.

摘要翻译： 一种用于形成半导体结构的方法和结构。 提供半导体衬底。 在半导体衬底内形成沟槽。 第一层电绝缘材料形成在沟槽内。 去除第一层电绝缘材料的第一部分和第二部分。 选择性地在第一层上生长第二层电绝缘材料，该第一层包括去除的第一部分和被去除的第二部分。

公开(公告)号：US07541608B2

公开(公告)日：2009-06-02

申请号：US12030927

申请日：2008-02-14

申请人： Toshijaru Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger ,  Chung H. Lam ,  Gerhard I. Meijer

发明人： Toshijaru Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger ,  Chung H. Lam ,  Gerhard I. Meijer

IPC分类号： H01L47/00

CPC分类号： H01L27/101 ,  H01L27/115 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/147 ,  Y10S438/90

摘要： Disclosed are non-volatile memory devices that incorporate a series of single or double memory cells. The single memory cells are essentially “U” shaped. The double memory cells comprise two essentially “U” shaped memory cells. Each memory cell comprises a memory element having a bi-stable layer sandwiched between two conductive layers. A temporary conductor may be applied to a series of cells and used to bulk condition the bi-stable layers of the cells. Also, due to the “U” shape of the cells, a cross point wire array may be used to connect a series of cells. The cross point wire array allows the memory elements of each cell to be individually identified and addressed for storing information and also allows for the information stored in the memory elements in all of the cells in the series to be simultaneously erased using a block erase process.

摘要翻译： 公开了包含一系列单个或双重存储器单元的非易失性存储器件。 单个存储器单元基本上是“U”形的。 双重存储单元包括两个基本上“U”形的存储单元。 每个存储单元包括具有夹在两个导电层之间的双稳态层的存储元件。 临时导体可以应用于一系列的电池并且用于批量地调节电池的双稳态层。 此外，由于电池的“U”形状，可以使用交叉点线阵列来连接一系列电池。 交叉点线阵列允许每个单元的存储元件被单独识别和寻址用于存储信息，并且还允许使用块擦除处理同时擦除存储在串联中的所有单元中的存储器元件中的信息。

公开(公告)号：US07521808B2

公开(公告)日：2009-04-21

申请号：US11745610

申请日：2007-05-08

申请人： Toshiharu Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III

发明人： Toshiharu Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III

IPC分类号： H01L28/528

CPC分类号： H01L21/76885 ,  H01L21/76816 ,  H01L21/7682 ,  H01L21/76837 ,  H01L21/76852 ,  H01L21/76862 ,  H01L21/76871 ,  H01L21/76874 ,  H01L23/5283 ,  H01L23/53209 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： Conductive sidewall spacer structures are formed using a method that patterns structures (mandrels) and activates the sidewalls of the structures. Metal ions are attached to the sidewalls of the structures and these metal ions are reduced to form seed material. The structures are then trimmed and the seed material is plated to form wiring on the sidewalls of the structures.

摘要翻译： 使用图案结构（心轴）并激活结构的侧壁的方法形成导电侧壁间隔结构。 金属离子附着在结构的侧壁上，这些金属离子被还原成晶种。 然后对结构进行修整，并且种子材料被电镀以在结构的侧壁上形成布线。

公开(公告)号：US07439144B2

公开(公告)日：2008-10-21

申请号：US11307671

申请日：2006-02-16

申请人： Bruce B. Doris ,  Toshiharu Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III

发明人： Bruce B. Doris ,  Toshiharu Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III

IPC分类号： H01L21/8222 ,  H01L21/4763

CPC分类号： H01L21/32139 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/823828 ,  H01L21/823864

摘要： A sidewall image transfer process for forming sub-lithographic structures employs a layer of sacrificial polymer containing silicon that is deposited over a gate conductor layer and covered by a cover layer. The sacrificial polymer layer is patterned with conventional resist and etched to form a sacrificial mandrel. The edges of the mandrel are oxidized or nitrided in a plasma at low temperature, after which the polymer and the cover layer are stripped, leaving sublithographic sidewalls. The sidewalls are used as hardmasks to etch sublithographic gate structures in the gate conductor layer.

摘要翻译： 用于形成亚光刻结构的侧壁图像转印工艺使用沉积在栅极导体层上并被覆盖层覆盖的含有硅的牺牲聚合物层。 牺牲聚合物层用常规抗蚀剂图案化并蚀刻以形成牺牲心轴。 心轴的边缘在低温下在等离子体中被氧化或氮化，之后剥离聚合物和覆盖层，留下亚光刻的侧壁。 侧壁用作硬掩模来蚀刻栅极导体层中的亚光刻栅极结构。

公开(公告)号：US20080165335A1

公开(公告)日：2008-07-10

申请号：US12051572

申请日：2008-03-19

申请人： Toshiharu Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Peter H. Mitchell

发明人： Toshiharu Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Peter H. Mitchell

IPC分类号： G03B27/42

CPC分类号： G03F7/70341

摘要： An immersion lithography apparatus and method, and a lithographic optical column structure are disclosed for conducting immersion lithography with at least the projection optics of the optical system and the wafer in different fluids at the same pressure. In particular, an immersion lithography apparatus is provided in which a supercritical fluid is introduced about the wafer, and another fluid, e.g., an inert gas, is introduced to at least the projection optics of the optical system at the same pressure to alleviate the need for a special lens. In addition, the invention includes an immersion lithography apparatus including a chamber filled with a supercritical immersion fluid and enclosing a wafer to be exposed and at least a projection optic component of the optical system.

摘要翻译： 公开了一种浸没式光刻设备和方法以及平版印刷光学柱结构，用于在相同压力下用不同流体中的光学系统和晶片的至少投影光学器件进行浸没光刻。 特别地，提供了一种浸没式光刻设备，其中超临界流体被引入晶片周围，并且另一种流体（例如惰性气体）在相同的压力下被引入光学系统的至少投影光学器件以减轻需要 用于特殊镜头。 此外，本发明包括浸没式光刻设备，其包括填充有超临界浸没流体的腔室并且封装要暴露的晶片和至少光学系统的投影光学部件。

公开(公告)号：US20080131995A1

公开(公告)日：2008-06-05

申请号：US12030927

申请日：2008-02-14

申请人： Toshijaru Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger ,  Chung H. Lam ,  Gerhard I. Meijer

发明人： Toshijaru Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger ,  Chung H. Lam ,  Gerhard I. Meijer

IPC分类号： H01L21/00

CPC分类号： H01L27/101 ,  H01L27/115 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/147 ,  Y10S438/90

摘要： Disclosed are non-volatile memory devices that incorporate a series of single or double memory cells. The single memory cells are essentially “U” shaped. The double memory cells comprise two essentially “U” shaped memory cells. Each memory cell comprises a memory element having a bi-stable layer sandwiched between two conductive layers. A temporary conductor may be applied to a series of cells and used to bulk condition the bi-stable layers of the cells. Also, due to the “U” shape of the cells, a cross point wire array may be used to connect a series of cells. The cross point wire array allows the memory elements of each cell to be individually identified and addressed for storing information and also allows for the information stored in the memory elements in all of the cells in the series to be simultaneously erased using a block erase process.

摘要翻译： 公开了包含一系列单个或双重存储器单元的非易失性存储器件。 单个存储器单元基本上是“U”形的。 双重存储单元包括两个基本上“U”形的存储单元。 每个存储单元包括具有夹在两个导电层之间的双稳态层的存储元件。 临时导体可以应用于一系列的电池并且用于批量地调节电池的双稳态层。 此外，由于电池的“U”形状，可以使用交叉点线阵列来连接一系列电池。 交叉点线阵列允许每个单元的存储元件被单独识别和寻址用于存储信息，并且还允许使用块擦除处理同时擦除存储在串联中的所有单元中的存储器元件中的信息。

公开(公告)号：US07352030B2

公开(公告)日：2008-04-01

申请号：US11374939

申请日：2006-03-14

申请人： Toshiharu Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III

发明人： Toshiharu Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III

IPC分类号： H01L27/01

CPC分类号： H01L29/0653 ,  B82Y10/00 ,  H01L21/28114 ,  H01L21/3086 ,  H01L21/31144 ,  H01L21/76224 ,  H01L21/76243 ,  H01L21/76267 ,  H01L21/76283 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/1083 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66575 ,  H01L29/6659 ,  H01L29/66772 ,  H01L29/7833 ,  H01L29/78654 ,  H01L29/78684

摘要： Semiconductor structures and method of forming semiconductor structures. The semiconductor structures including nano-structures or fabricated using nano-structures. The method of forming semiconductor structures including generating nano-structures using a nano-mask and performing additional semiconductor processing steps using the nano-structures generated.

摘要翻译： 半导体结构和形成半导体结构的方法。 包括纳米结构或使用纳米结构制造的半导体结构。 形成半导体结构的方法包括使用纳米掩模生成纳米结构，并使用所生成的纳米结构进行附加的半导体加工步骤。