公开(公告)号：US08467632B2

公开(公告)日：2013-06-18

申请号：US12986062

申请日：2011-01-06

申请人： Xuezhe Zheng ,  John E. Cunningham ,  Ashok V. Krishnamoorthy

发明人： Xuezhe Zheng ,  John E. Cunningham ,  Ashok V. Krishnamoorthy

IPC分类号： G02F1/01

CPC分类号： G02F1/025 ,  G02F2001/0157

摘要： During operation of an electro-absorption modulator, an optical signal is conveyed, using an optical waveguide in the electro-absorption modulator, to a semiconductor layer that substantially fills a gap between two portions of the optical waveguide. Then, the optical signal is electro-absorption modulated by selectively applying a voltage to electrodes that produces an electric field, approximately perpendicular to the midline of the optical waveguide, in the semiconductor layer. These electrodes are coupled to the edges of the semiconductor layer at the periphery along the width of the semiconductor layer by intervening layers. Furthermore, the intervening layers include a material that has a lower index of refraction than the semiconductor layer, and a lower optical absorption than the electrodes.

摘要翻译： 在电吸收调制器的操作期间，使用电吸收调制器中的光波导将光信号传送到基本上填充光波导的两个部分之间的间隙的半导体层。 然后，通过选择性地向在半导体层中产生大致垂直于光波导的中线的电场的电极施加电压来对光信号进行电吸收调制。 这些电极通过中间层沿半导体层的宽度在周边连接到半导体层的边缘。 此外，中间层包括具有比半导体层低的折射率的材料，并且具有比电极更低的光学吸收。

公开(公告)号：US08267583B2

公开(公告)日：2012-09-18

申请号：US12581709

申请日：2009-10-19

申请人： Jin Yao ,  Xuezhe Zheng ,  Ashok V. Krishnamoorthy ,  John E. Cunningham

发明人： Jin Yao ,  Xuezhe Zheng ,  Ashok V. Krishnamoorthy ,  John E. Cunningham

IPC分类号： G02B6/26 ,  G02B6/34 ,  G02B6/12

CPC分类号： G02B6/13 ,  G02B6/12002

摘要： A multi-chip module (MCM), which includes a three-dimensional (3D) stack of chips that are coupled using optical interconnects, is described. In this MCM, disposed on a first surface of a middle chip in the 3D stack, there are: a first optical coupler, an optical waveguide, which is coupled to the first optical coupler, and a second optical coupler, which is coupled to the optical waveguide. The first optical coupler redirects an optical signal from the optical waveguide to a first direction (which is not in the plane of the first surface), or from the first direction to the optical waveguide. Moreover, the second optical coupler redirects the optical signal from the optical waveguide to a second direction (which is not in the plane of the first surface), or from the second direction to the optical waveguide. Note that an optical path associated with the second direction passes through an opening in a substrate in the middle chip.

摘要翻译： 描述了包括使用光学互连耦合的三维（3D）芯片堆叠的多芯片模块（MCM）。 在该MCM中，设置在3D堆叠中的中间芯片的第一表面上，存在：耦合到第一光耦合器的第一光耦合器，光波导和耦合到第三光耦合器的第二光耦合器， 光波导。 第一光学耦合器将来自光波导的光信号重定向到第一方向（其不在第一表面的平面中）或从第一方向到光波导。 此外，第二光学耦合器将来自光波导的光信号重定向到第二方向（其不在第一表面的平面）或从第二方向到光波导。 注意，与第二方向相关联的光路通过中间芯片中的衬底中的开口。

公开(公告)号：US08207752B2

公开(公告)日：2012-06-26

申请号：US12685159

申请日：2010-01-11

申请人： Kannan Raj ,  Xuezhe Zheng ,  Ashok V. Krishnamoorthy ,  Ronald Ho ,  Michael O. McCracken ,  David K. McElfresh ,  John E. Cunningham

发明人： Kannan Raj ,  Xuezhe Zheng ,  Ashok V. Krishnamoorthy ,  Ronald Ho ,  Michael O. McCracken ,  David K. McElfresh ,  John E. Cunningham

IPC分类号： H03K19/003

CPC分类号： H03K19/177

摘要： A multi-chip module (MCM) is described. This MCM includes multiple sites, where a given site in the multiple sites includes multiple chips with proximity connectors that communicate information through proximity communication within the MCM via multiple components associated with the given site. Note that the MCM includes global redundancy and local redundancy at the given site. In particular, the global redundancy involves providing one or more redundant sites in the multiple sites. Furthermore, the local redundancy involves providing one or more redundant chips in the multiple chips and one or more redundant components in the multiple components.

摘要翻译： 描述了多芯片模块（MCM）。 该MCM包括多个站点，其中多个站点中的给定站点包括具有邻近连接器的多个芯片，其通过与给定站点相关联的多个组件在MCM内通过邻近通信传递信息。 请注意，MCM包括给定站点的全局冗余和本地冗余。 特别地，全局冗余涉及在多个站点中提供一个或多个冗余站点。 此外，本地冗余包括在多个芯片中提供一个或多个冗余芯片以及在多个组件中提供一个或多个冗余组件。

公开(公告)号：US08089995B2

公开(公告)日：2012-01-03

申请号：US11485594

申请日：2006-07-12

申请人： Ashok V. Krishnamoorthy ,  John E. Cunningham ,  Bruce M. Guenin ,  Howard L. Davidson

发明人： Ashok V. Krishnamoorthy ,  John E. Cunningham ,  Bruce M. Guenin ,  Howard L. Davidson

IPC分类号： H01S3/04

CPC分类号： H01S5/423 ,  H01S5/005 ,  H01S5/02453 ,  H01S5/02461 ,  H01S5/0261 ,  H01S5/0422 ,  H01S5/0612 ,  H01S5/18305 ,  H01S5/18327 ,  H01S5/4087

摘要： One embodiment of the present invention provides a system that facilitates adjusting the wavelengths of lasers via temperature control. This system includes a chip with an active face upon which active circuitry and signal pads reside. A thermal-control mechanism provides localized thermal control of two lasers mounted upon the active face of the chip. By individually controlling the temperature of the lasers, the thermal-control mechanism controls the wavelengths emitted by each respective laser. By creating a temperature gradient that causes a temperature difference between two or more lasers, the system can cause the lasers to emit different wavelengths.

摘要翻译： 本发明的一个实施例提供一种通过温度控制有助于调节激光器的波长的系统。 该系统包括具有有源电路和信号焊盘所在的有源面的芯片。 热控制机构提供安装在芯片的主动面上的两个激光器的局部热控制。 通过单独控制激光器的温度，热控制机构控制由各个激光器发射的波长。 通过产生导致两个或更多个激光器之间的温度差的温度梯度，该系统可以使激光器发射不同的波长。

公开(公告)号：US08076178B2

公开(公告)日：2011-12-13

申请号：US11864369

申请日：2007-09-28

申请人： Ashok V. Krishnamoorthy ,  John E. Cunningham ,  James G. Mitchell

发明人： Ashok V. Krishnamoorthy ,  John E. Cunningham ,  James G. Mitchell

IPC分类号： H01L21/00 ,  H01L21/20

CPC分类号： H01L23/48 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06531 ,  H01L2225/06534 ,  H01L2225/06593 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/00

摘要： Embodiments of a method for assembling a multi-chip module (MCM) are described. During this method, a fluid that includes coupling elements is applied to a surface of a base plate in the MCM. Then, at least some of the coupling elements are positioned into negative features on the surface of the base plate using fluidic assembly. Note that a given coupling element selects a given negative feature using chemical-based selection and/or geometry-based selection. Next, the fluid and excess coupling elements (which reside in regions outside of the negative features on the surface) are removed.

摘要翻译： 描述了用于组装多芯片模块（MCM）的方法的实施例。 在该方法中，包括耦合元件的流体被施加到MCM中的基板的表面。 然后，使用流体组件将至少一些联接元件定位在基板的表面上的负特征中。 注意，给定的耦合元件使用基于化学的选择和/或基于几何的选择来选择给定的负特征。 接下来，去除流体和过量的耦合元件（其位于表面上的负特征之外的区域中）。

公开(公告)号：US20110233789A1

公开(公告)日：2011-09-29

申请号：US12730823

申请日：2010-03-24

申请人： Robert J. Drost ,  Ashok V. Krishnamoorthy ,  John E. Cunningham

发明人： Robert J. Drost ,  Ashok V. Krishnamoorthy ,  John E. Cunningham

IPC分类号： H01L23/538

CPC分类号： H01L25/0657 ,  H01L23/48 ,  H01L23/5389 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2225/06531 ,  H01L2225/06555 ,  H01L2924/15153

摘要： A multi-chip module (MCM) is described in which at least two substrates are mechanically coupled by an adhesive layer that maintains alignment and a zero (or near zero) spacing between proximity connectors on surfaces of the substrates, thereby facilitating high signal quality during proximity communication between the substrates. In order to provide sufficient shear strength, the adhesive layer has a thickness that is larger than the spacing. This may be accomplished using one or more positive and/or negative features on the substrates. For example, the adhesive may be bonded to: one of the surfaces and an inner surface of a channel that is recessed below the other surface; inner surfaces of channels that are recessed below both of the surfaces; or both of the surfaces. In this last case, the zero (or near zero) spacing may be achieved by disposing proximity connectors on a mesa that protrudes above at least one of the substrate surfaces.

摘要翻译： 描述了一种多芯片模块（MCM），其中至少两个基板通过粘合剂层机械耦合，所述粘合剂层在基板的表面上的接近连接器之间保持对准和零（或接近零）的间隔，从而有利于高信号质量 基板之间的接近连接。 为了提供足够的剪切强度，粘合剂层的厚度大于间隔。 这可以使用衬底上的一个或多个正和/或负特征来实现。 例如，粘合剂可以结合到：一个表面和在另一个表面下方凹进的通道的内表面; 在两个表面下凹陷的通道的内表面; 或两个表面。 在最后一种情况下，零（或接近零）的间距可以通过将接近连接器设置在突出在至少一个衬底表面上的台面上来实现。

公开(公告)号：US20110111559A1

公开(公告)日：2011-05-12

申请号：US13006227

申请日：2011-01-13

申请人： James G. Mitchell ,  John E. Cunningham ,  Ashok V. Krishnamoorthy

发明人： James G. Mitchell ,  John E. Cunningham ,  Ashok V. Krishnamoorthy

IPC分类号： H01L21/50

CPC分类号： H01L25/0652 ,  H01L23/10 ,  H01L23/48 ,  H01L24/02 ,  H01L24/16 ,  H01L24/72 ,  H01L24/81 ,  H01L24/95 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/73251 ,  H01L2224/81136 ,  H01L2224/81801 ,  H01L2224/95136 ,  H01L2225/06513 ,  H01L2225/06531 ,  H01L2225/06534 ,  H01L2225/06593 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01058 ,  H01L2924/01067 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/16 ,  H01L2224/72

摘要： Embodiments of a multi-chip module (MCM) are described. This MCM includes a first semiconductor die and a second semiconductor die, where a given semiconductor die, which can be the first semiconductor die or the second semiconductor die, includes proximity connectors proximate to a surface of the given semiconductor die. Moreover, the given semiconductor die is configured to communicate signals with the other semiconductor die via proximity communication through one or more of the proximity connectors. Furthermore, the MCM includes an alignment plate and a top plate coupled to the alignment plate. This alignment plate includes a first negative feature configured to accommodate the first semiconductor die and a second negative feature configured to accommodate the second semiconductor die, and the top plate includes a positive feature. Note that the positive feature is coupled to the first semiconductor die, and the positive feature facilitates mechanical positioning of the first semiconductor die.

摘要翻译： 描述了多芯片模块（MCM）的实施例。 该MCM包括第一半导体管芯和第二半导体管芯，其中可以是第一半导体管芯或第二半导体管芯的给定半导体管芯包括靠近给定半导体管芯的表面的接近连接器。 此外，给定的半导体管芯被配置为通过一个或多个接近连接器的接近通信与另一个半导体管芯通信信号。 此外，MCM包括对准板和联接到对准板的顶板。 该对准板包括被配置为容纳第一半导体管芯的第一负特征构件和被配置为容纳第二半导体管芯的第二负特征，并且顶板包括正特征。 注意，正特征耦合到第一半导体管芯，并且正特征有利于第一半导体管芯的机械定位。

公开(公告)号：US07893531B2

公开(公告)日：2011-02-22

申请号：US11864408

申请日：2007-09-28

申请人： James G. Mitchell ,  John E. Cunningham ,  Ashok V. Krishnamoorthy

发明人： James G. Mitchell ,  John E. Cunningham ,  Ashok V. Krishnamoorthy

IPC分类号： H01L23/34

CPC分类号： H01L25/0652 ,  H01L23/10 ,  H01L23/48 ,  H01L24/02 ,  H01L24/16 ,  H01L24/72 ,  H01L24/81 ,  H01L24/95 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/73251 ,  H01L2224/81136 ,  H01L2224/81801 ,  H01L2224/95136 ,  H01L2225/06513 ,  H01L2225/06531 ,  H01L2225/06534 ,  H01L2225/06593 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01058 ,  H01L2924/01067 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/16 ,  H01L2224/72

摘要： Embodiments of a multi-chip module (MCM) are described. This MCM includes a first semiconductor die and a second semiconductor die, where a given semiconductor die, which can be the first semiconductor die or the second semiconductor die, includes proximity connectors proximate to a surface of the given semiconductor die. Moreover, the given semiconductor die is configured to communicate signals with the other semiconductor die via proximity communication through one or more of the proximity connectors. Furthermore, the MCM includes an alignment plate and a top plate coupled to the alignment plate. This alignment plate includes a first negative feature configured to accommodate the first semiconductor die and a second negative feature configured to accommodate the second semiconductor die, and the top plate includes a positive feature. Note that the positive feature is coupled to the first semiconductor die, and the positive feature facilitates mechanical positioning of the first semiconductor die.

公开(公告)号：US07888175B2

公开(公告)日：2011-02-15

申请号：US12502156

申请日：2009-07-13

申请人： Ashok V. Krishnamoorthy ,  John E. Cunningham

发明人： Ashok V. Krishnamoorthy ,  John E. Cunningham

IPC分类号： H01L21/60 ,  H01L29/40

CPC分类号： H01L23/48 ,  G02B6/12007 ,  G02B6/29341 ,  G02B6/43 ,  H01L24/10 ,  H01L24/13 ,  H01L24/72 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L25/0657 ,  H01L2224/05556 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/10135 ,  H01L2224/10165 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/1319 ,  H01L2224/2919 ,  H01L2224/81138 ,  H01L2224/81141 ,  H01L2224/81801 ,  H01L2224/83141 ,  H01L2224/83194 ,  H01L2224/838 ,  H01L2224/83851 ,  H01L2225/06527 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10157 ,  H01L2924/14 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00014

摘要： The described embodiments provide a system that facilitates inter-chip alignment for proximity communication and power delivery. The system includes a first integrated circuit chip and a second integrated circuit chip, both of which whose surfaces have corresponding etch pit wells configured to align with each other. A shaped structure is placed in an etch pit well of the first integrated circuit chip such that when the corresponding etch pit well of the second integrated circuit chip is substantially aligned with the etch pit well of the first integrated circuit chip, the shaped structure mates with both the etch pit well of the first integrated circuit chip and with the corresponding etch pit well of the second integrated circuit chip, thereby aligning the first integrated circuit chip with the second integrated circuit chip. In some embodiments the etch pit wells include conductive structures for routing power through a conductive shaped structure.

摘要翻译： 所描述的实施例提供了一种促进接近通信和功率传递的芯片间对准的系统。 该系统包括第一集成电路芯片和第二集成电路芯片，它们的两个表面具有被配置为彼此对准的相应蚀刻凹坑。 成形结构放置在第一集成电路芯片的蚀刻凹坑中，使得当第二集成电路芯片的相应蚀刻凹坑与第一集成电路芯片的蚀刻凹坑基本对准时，成形结构与 第一集成电路芯片的蚀刻凹坑以及第二集成电路芯片的相应蚀刻凹坑两者，从而使第一集成电路芯片与第二集成电路芯片对准。 在一些实施例中，蚀刻坑井包括用于通过导电成形结构路由功率的导电结构。

公开(公告)号：US20100247029A1

公开(公告)日：2010-09-30

申请号：US12415882

申请日：2009-03-31

申请人： Guoliang Li ,  Ashok V. Krishnamoorthy ,  John E. Cunningham ,  Ivan Shubin ,  Xuezhe Zheng

发明人： Guoliang Li ,  Ashok V. Krishnamoorthy ,  John E. Cunningham ,  Ivan Shubin ,  Xuezhe Zheng

IPC分类号： G02B6/12

CPC分类号： G02B6/12007 ,  G02B2006/12061 ,  G02F1/011 ,  G02F1/0147 ,  G02F2202/10

摘要： Embodiments of an optical device, an array of optical devices, and a technique for fabricating the optical device or the array are described. This optical device is implemented on a substrate (such as silicon), and includes a thermally tunable optical waveguide with a high thermal resistance to the surrounding external environment and a low thermal resistance to a localized heater. In particular, the thermal resistances associated with thermal dissipation paths from a heater in the optical device to an external environment via electrodes and via the substrate are increased, while the thermal resistance between the optical waveguide and the heater is decreased.

摘要翻译： 描述了光学器件，光学器件阵列以及用于制造光学器件或阵列的技术的实施例。 该光学器件实现在基板（例如硅）上，并且包括具有对周围外部环境的高耐热性和对局部加热器的低热阻的热可调谐光波导。 特别地，与通过电极和经由基板的从光学装置中的加热器到外部环境的热耗散路径相关联的热阻增加，同时光波导和加热器之间的热阻降低。