公开(公告)号：US20030108332A1

公开(公告)日：2003-06-12

申请号：US10291207

申请日：2002-11-08

申请人： STMICROELECTRONICS S.A.

发明人： Diego Coste ,  Herve Maffini

IPC分类号： H04N005/95 ,  H04N005/08

CPC分类号： H04N5/05 ,  H04N5/126

摘要： A system and method for detecting the nature of a video signal using a video synchronization circuit including a phase locked loop having a time constant is disclosed. The method includes calculating a horizontal phase difference between a predetermined first line of the video signal and a predetermined second line of the video signal, the predetermined first line and the predetermined second line bracketing a change of frame. If the horizontal phase difference is greater than a threshold, the video signal is deemed to be a video recorder signal. The method further includes adjusting the time constant of the phase locked loop of the video synchronization circuit according to the nature of the video signal, as determined in the calculating step.

摘要翻译： 公开了一种使用包括具有时间常数的锁相环的视频同步电路来检测视频信号的性质的系统和方法。 该方法包括计算视频信号的预定第一行和视频信号的预定第二行之间的水平相位差，预定第一行和预定第二行包围帧的改变。 如果水平相位差大于阈值，则视频信号被认为是录像机信号。 该方法还包括根据在计算步骤中确定的视频信号的性质来调整视频同步电路的锁相环的时间常数。

公开(公告)号：US20030094999A1

公开(公告)日：2003-05-22

申请号：US10299159

申请日：2002-11-18

申请人： STMICROELECTRONICS S.A.

发明人： Francois Van Zanten ,  Marc Sabut ,  Raymond Ribas

IPC分类号： G05F001/10

CPC分类号： G05F3/262

摘要： A mirroring circuit operating at high frequencies is provided. The mirroring circuit includes a first branch having a first transistor in series with a first resistor, a second branch having a second transistor in series with a second resistor, and a servo circuit for controlling current flowing in the first branch and the second branch. The servo circuit includes a third transistor configured as a diode, a source of the third transistor coupled to a source of the first transistor, a fourth transistor configured as a shift lever, a source of the fourth transistor coupled to ground via a third resistor, a fifth transistor configured as a diode, a source of the fifth transistor coupled to a source of the second transistor, and a sixth transistor configured as a shift lever, a source of the sixth transistor coupled to ground via the third resistor.

摘要翻译： 提供以高频操作的镜像电路。 镜像电路包括具有与第一电阻器串联的第一晶体管的第一分支，具有与第二电阻器串联的第二晶体管的第二分支和用于控制在第一分支和第二分支中流动的电流的伺服电路。 伺服电路包括被配置为二极管的第三晶体管，耦合到第一晶体管的源极的第三晶体管的源极，配置为变换杆的第四晶体管，经由第三电阻器耦合到地的第四晶体管的源极， 配置为二极管的第五晶体管，耦合到第二晶体管的源极的第五晶体管的源极和被配置为变换杆的第六晶体管，第六晶体管的源极经由第三电阻器耦合到地。

公开(公告)号：US20030088749A1

公开(公告)日：2003-05-08

申请号：US10273417

申请日：2002-10-17

申请人： STMicroelectronics S.A.

发明人： Franck Roche ,  Andre Colomb

IPC分类号： G06F012/00

CPC分类号： G06F9/30032 ,  G06F9/30181

摘要： A microprocessor includes internal registers, an arithmetic and logic unit, and reads a program memory and executes an instruction set stored therein. The instruction set includes at least one instruction for exchanging the contents of both memory locations. The microprocessor includes an additional internal register connected to an output of the arithmetic and logic unit, and transfers the contents of a first one of the memory locations to be exchanged into the additional register when executing the instruction set. The microprocessor further transfers the contents of a second one of the memory locations to be exchanged into the first memory location, and transfers the contents of the additional register into the first memory location.

摘要翻译： 微处理器包括内部寄存器，算术和逻辑单元，并读取程序存储器并执行存储在其中的指令集。 指令集包括用于交换两个存储器位置的内容的至少一个指令。 微处理器包括连接到算术和逻辑单元的输出的附加内部寄存器，并且在执行指令集时将要交换的存储单元的第一个存储单元的内容传送到附加寄存器中。 微处理器进一步将待交换的存储器位置的第二个的内容传送到第一存储器位置，并将附加寄存器的内容传送到第一存储器位置。

公开(公告)号：US20030081148A1

公开(公告)日：2003-05-01

申请号：US10283029

申请日：2002-10-29

申请人： STMicroelectronics S.A.

发明人： Diego Coste ,  Ilija Materic ,  Francois Besson ,  Herve Maffini

IPC分类号： H04N005/08

CPC分类号： H04N5/10

摘要： Successive values of a horizontal phase of a video signal are determined a predetermined integer number of video lines after the successive occurrences of vertical synchronization pulses. The successive values of a parity bit are updated according to the successive values of the horizontal phase. Indications on the parity of the fields are provided from the successive values of the parity bit.

摘要翻译： 在连续出现的垂直同步脉冲之后，视频信号的水平相位的连续值被确定为预定的整数个视频行。 根据水平相位的连续值更新奇偶校验位的连续值。 字段奇偶校验的指示是从奇偶校验位的连续值提供的。

公开(公告)号：US20030062964A1

公开(公告)日：2003-04-03

申请号：US10232954

申请日：2002-08-29

申请人： STMicroelectronics S.A.

发明人： Yannick Guedon ,  Philippe Maige

IPC分类号： H03K007/08

CPC分类号： H03K7/08 ,  H03K5/26 ,  H03L7/099 ,  H03L2207/06

摘要： A circuit for generating a pulse-width-modulated signal comprises a phase-locked loop (PLL) having a duty-cycle-insensitive phase comparator and a Sigma-Delta pulse width modulation circuit suitable for providing the voltage-controlled oscillator function of the PLL. Thereby, frequency of the signal generated is synchronized by the PLL to the specified frequency of a synchronization signal, and is thus independent of the duty cycle.

摘要翻译： 用于产生脉宽调制信号的电路包括具有占空比不敏感相位比较器和适用于提供PLL的压控振荡器功能的Σ-Δ脉宽调制电路的锁相环（PLL） 。 因此，所生成的信号的频率由PLL同步到同步信号的指定频率，因此与占空比无关。

公开(公告)号：US20030042574A1

公开(公告)日：2003-03-06

申请号：US10236082

申请日：2002-09-06

申请人： STMicroelectronics S.A.

发明人： Thierry Schwartzmann

IPC分类号： H01L027/082

CPC分类号： H01L29/0821

摘要： The forming of a contact with a deep region of a first conductivity type formed in a silicon substrate. The contact includes a doped silicon well region of the first conductivity type and an intermediary region connected between the deep layer and the well. This intermediary connection region is located under a trench. The manufacturing method enables forming of vertical devices, in particular fast bipolar transistors.

摘要翻译： 与在硅衬底中形成的第一导电类型的深区形成接触。 该接触包括第一导电类型的掺杂硅阱区域和连接在深层和阱之间的中间区域。 该中间连接区位于沟槽下方。 该制造方法能够形成垂直装置，特别是快速双极晶体管。

公开(公告)号：US20030006836A1

公开(公告)日：2003-01-09

申请号：US10124670

申请日：2002-04-17

申请人： STMicroelectronics S.A.

发明人： Bruno Pellat ,  Jean-Charles Grasset

IPC分类号： G06G007/12

CPC分类号： H03F1/32 ,  H03F1/3211 ,  H03F2200/372

摘要： A transconductance stage includes at least one principal bipolar transistor having a base linked to an input terminal, a collector linked to an output terminal, and an emitter linked to a supply terminal through a resistor. At least one bipolar compensation transistor is connected in parallel to the principal transistor and linked without going through the resistor to the supply terminal. The value RE of the resistance is chosen so that RE*I0>VT/2, where VT is the thermal voltage and I0 is the quiescent current of the principal transistor.

摘要翻译： 跨导级包括至少一个主要双极晶体管，其具有连接到输入端子的基极，连接到输出端子的集电极和通过电阻器连接到电源端子的发射极。 至少一个双极性补偿晶体管与主晶体管并联连接，而不通过电阻器连接到电源端子。 选择电阻的值RE，使得RE * I0> VT / 2，其中VT是热电压，I0是主晶体管的静态电流。

公开(公告)号：US20020186599A1

公开(公告)日：2002-12-12

申请号：US10139621

申请日：2002-05-06

申请人： STMicroelectronics S.A.

发明人： Richard Fournel ,  Sigrid Thomas ,  Cyrille Dray

IPC分类号： G11C007/00

CPC分类号： G11C16/0416

摘要： A non-volatile memory architecture with a word-based organization includes one selection transistor per word. This selection transistor is used for the selection of the word by the source of the memory cells. In this way, the selection may be done directly by the output signals from the address decoders using low voltage. The switching of a high voltage to the gates and the drains of the memory cells is done independently of this selection. This enables the required number of high voltage switches to be reduced.

摘要翻译： 具有基于单词的组织的非易失性存储器架构包括每个字的一个选择晶体管。 该选择晶体管用于由存储器单元的源选择单词。 以这种方式，可以通过使用低电压的地址解码器的输出信号直接进行选择。 独立于该选择，高电压切换到存储器单元的栅极和漏极。 这使得能够减少所需数量的高压开关。

公开(公告)号：US20020185589A1

公开(公告)日：2002-12-12

申请号：US10142262

申请日：2002-05-08

申请人： STMicroelectronics S.A.

发明人： Yvon Cazaux

IPC分类号： H01L031/00

CPC分类号： B82Y20/00 ,  H01L27/1443 ,  H01L27/14609 ,  H01L27/14632 ,  H01L31/035245 ,  H01L31/03762 ,  H04N5/361 ,  Y02E10/548

摘要： A photodetector including an amorphous silicon photodiode having its anode connected to a reference voltage, an initialization MOS transistor connected between the cathode of the photodiode and a first supply voltage to set the cathode to the first supply voltage during an initialization phase, and means for measuring the voltage of the photodiode cathode, including saturation means for bringing the photodiode cathode to a saturation voltage close to the reference voltage immediately before the initialization phase.

摘要翻译： 一种光电检测器，包括其阳极连接到参考电压的非晶硅光电二极管，连接在光电二极管的阴极之间的初始化MOS晶体管和在初始化阶段期间将阴极设置为第一电源电压的第一电源电压，以及用于测量 包括光电二极管阴极的电压，包括用于在初始化阶段之前使光电二极管阴极达到接近参考电压的饱和电压的饱和装置。

公开(公告)号：US20020176298A1

公开(公告)日：2002-11-28

申请号：US10117448

申请日：2002-04-05

申请人： STMicroelectronics S.A.

发明人： Sigrid Thomas ,  Leila Aitouarab

IPC分类号： G11C007/00

CPC分类号： G11C7/062 ,  G11C7/067 ,  G11C16/26

摘要： In a device for reading memory cells, a precharging circuit is connected to a memory cell to be read and to a reference cell associated with the memory cell to be read. The precharging circuit precharges the output of the differential amplifier to a predetermined voltage level. The reading device further includes an inverter having a high threshold and a low threshold connected to the output of the differential amplifier. The predetermined voltage level corresponds to an intermediate level between the high and low thresholds.

摘要翻译： 在用于读取存储器单元的装置中，预充电电路连接到要读取的存储器单元和与要读取的存储器单元相关联的参考单元。 预充电电路将差分放大器的输出预充电到预定的电压电平。 读取装置还包括连接到差分放大器的输出的具有高阈值和低阈值的反相器。 预定的电压电平对应于高和低阈值之间的中间电平。