公开(公告)号：US07550816B2

公开(公告)日：2009-06-23

申请号：US10866290

申请日：2004-06-11

Applicant: Li Li ,  Weimin Li ,  Gurtej S. Sandhu

Inventor： Li Li ,  Weimin Li ,  Gurtej S. Sandhu

IPC: H01L29/00

CPC classification number: C23C16/4408 ,  C23C16/045 ,  C23C16/402 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/31612 ,  H01L21/76224

Abstract: A method for depositing a dielectric in a trench on a semiconductor substrate is provided. The dielectric is deposited by using an HDP-CVD system and performing a deposition of first and second layers of dielectric material. A first inert gas is utilized during the deposition of the first layer, and a second inert gas is utilized during the deposition of the second layer. Generally, a purge step is performed between the deposition of the first and second layers. The resulting dielectric layers are substantially free of voids and have low particle counts. Structures utilizing the filled trenches are also disclosed.

Abstract translation: 提供了一种在半导体衬底上的沟槽中沉积电介质的方法。 通过使用HDP-CVD系统沉积电介质并执行介电材料的第一和第二层的沉积。 在第一层的沉积期间使用第一惰性气体，并且在沉积第二层期间使用第二惰性气体。 通常，在第一和第二层的沉积之间进行清洗步骤。 所得到的电介质层基本上没有空隙并且具有低的颗粒计数。 还公开了利用填充沟槽的结构。

公开(公告)号：US07494894B2

公开(公告)日：2009-02-24

申请号：US10231388

申请日：2002-08-29

Applicant: Neal R. Rueger ,  William Budge ,  Weimin Li

Inventor： Neal R. Rueger ,  William Budge ,  Weimin Li

IPC: H01L21/762

CPC classification number: H01L21/76235

Abstract: A method including, prior to a plasma heat-up operation, forming a liner on a structure coated with an insulator. And a method including forming a trench on a substrate, forming an insulator on the trench, and after forming a liner having a thickness of between about 50 angstroms and about 400 angstroms on the insulator, applying a plasma heat-up operation to the substrate.

Abstract translation: 一种方法，包括在等离子体加热操作之前，在涂覆有绝缘体的结构上形成衬垫。 以及一种方法，包括在衬底上形成沟槽，在沟槽上形成绝缘体，并且在形成绝缘体上具有介于约50埃至约400埃之间的厚度的衬垫之后，对衬底施加等离子体加热操作。

公开(公告)号：US07273793B2

公开(公告)日：2007-09-25

申请号：US11115854

申请日：2005-04-25

Applicant: Neal R. Rueger ,  William Budge ,  Weimin Li ,  Gurtej S. Sandhu

Inventor： Neal R. Rueger ,  William Budge ,  Weimin Li ,  Gurtej S. Sandhu

IPC: H01L21/76

CPC classification number: H01L21/02274 ,  C23C16/045 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/76224 ,  H01L21/76837

Abstract: The invention includes a method of filling gaps in a semiconductor substrate. A substrate and a gas mixture containing at least one heavy-hydrogen compound are provided within a reaction chamber. The gas mixture is reacted to form a layer of material over the substrate by simultaneous deposition and etch of the layer. The layer of material fills the gap such that the material within the gap is essentially void-free. The invention includes a method of providing improved deposition rate uniformity. A material is deposited over a surface in the presence of at least one gas selected from the group consisting of D2, HD, DT, T2 and TH. The net deposition rate during the deposition has a degree of variance across the surface which is measurably improved relative to a corresponding degree of variance that occurs during deposition utilizing H2 under otherwise substantially identical conditions.

Abstract translation: 本发明包括填充半导体衬底中的间隙的方法。 在反应室内设置底物和含有至少一种重氢化合物的气体混合物。 通过同时沉积和蚀刻该层，使气体混合物反应以在衬底上形成一层材料。 材料层填充间隙，使得间隙内的材料基本上无空隙。 本发明包括提供改进的沉积速率均匀性的方法。 在选自由D 2，HD，DT，T 2和TH组成的组中的至少一种气体存在下，材料沉积在表面上。 沉积期间的净沉积速率在整个表面上具有相对于在其它实质上相同的条件下利用H 2 N沉积期间发生的相应的变化程度可以显着改善的表面上的变化程度。

公开(公告)号：US07205248B2

公开(公告)日：2007-04-17

申请号：US10357812

申请日：2003-02-04

Applicant: Li Li ,  Weimin Li

Inventor： Li Li ,  Weimin Li

IPC: H01L21/76 ,  H01L21/31

CPC classification number: H01L21/02126 ,  C23C16/045 ,  C23C16/401 ,  C23C16/56 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02271 ,  H01L21/02282 ,  H01L21/0234 ,  H01L21/31612 ,  H01L21/31633 ,  H01L21/76224

Abstract: Methods of forming an oxide layer such as high aspect ratio trench isolations, and treating the oxide substrate to remove carbon, structures formed by the method, and devices and systems incorporating the oxide material are provided.

Abstract translation: 提供形成氧化物层的方法，例如高纵横比沟槽隔离，以及处理氧化物衬底以除去碳，通过该方法形成的结构，以及结合氧化物材料的器件和系统。

公开(公告)号：US07202183B2

公开(公告)日：2007-04-10

申请号：US11341199

申请日：2006-01-27

Applicant: Neal R. Rueger ,  William Budge ,  Weimin Li ,  Gurtej S. Sandhu

Inventor： Neal R. Rueger ,  William Budge ,  Weimin Li ,  Gurtej S. Sandhu

IPC: H01L21/31

CPC classification number: H01L21/02274 ,  C23C16/045 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/76224 ,  H01L21/76837

Abstract: The invention includes a method of filling gaps in a semiconductor substrate. A substrate and a gas mixture containing at least one heavy-hydrogen compound are provided within a reaction chamber. The gas mixture is reacted to form a layer of material over the substrate by simultaneous deposition and etch of the layer. The layer of material fills the gap such that the material within the gap is essentially void-free. The invention includes a method of providing improved deposition rate uniformity. A material is deposited over a surface in the presence of at least one gas selected from the group consisting of D2, HD, DT, T2 and TH. The net deposition rate during the deposition has a degree of variance across the surface which is measurably improved relative to a corresponding degree of variance that occurs during deposition utilizing H2 under otherwise substantially identical conditions.

Abstract translation: 本发明包括填充半导体衬底中的间隙的方法。 在反应室内设置底物和含有至少一种重氢化合物的气体混合物。 通过同时沉积和蚀刻该层，使气体混合物反应以在衬底上形成一层材料。 材料层填充间隙，使得间隙内的材料基本上无空隙。 本发明包括提供改进的沉积速率均匀性的方法。 在选自由D 2，HD，DT，T 2和TH组成的组中的至少一种气体存在下，材料沉积在表面上。 沉积期间的净沉积速率在整个表面上具有相对于在其它实质上相同的条件下利用H 2 N沉积期间发生的相应的变化程度可以显着改善的表面上的变化程度。

公开(公告)号：US07129180B2

公开(公告)日：2006-10-31

申请号：US10661100

申请日：2003-09-12

Applicant: Gurtej S. Sandhu ,  Zhiping Yin ,  Weimin Li

Inventor： Gurtej S. Sandhu ,  Zhiping Yin ,  Weimin Li

IPC: H01L21/302 ,  H01L21/461

CPC classification number: H01L21/3081 ,  H01L21/0332 ,  H01L21/31144 ,  H01L21/32139 ,  H01L27/10852

Abstract: A masking structure having multiple layers is formed. The masking structure includes an amorphous carbon layer and a cap layer formed over the amorphous carbon layer. The amorphous carbon layer includes transparent amorphous carbon. The cap layer includes non-oxide materials. The masking structure may be used as a mask in an etching process during fabrication of semiconductor devices.

公开(公告)号：US20060172079A1

公开(公告)日：2006-08-03

申请号：US11391774

申请日：2006-03-29

Applicant: Weimin Li ,  Gurtej Sandhu

Inventor： Weimin Li ,  Gurtej Sandhu

IPC: C08J7/04 ,  H01L21/31

CPC classification number: G03F7/095 ,  G03F7/0757 ,  H01L21/02134 ,  H01L21/02137 ,  H01L21/02216 ,  H01L21/02222 ,  H01L21/02282 ,  H01L21/02348 ,  H01L21/311 ,  Y10T428/31663

Abstract: A cap layer that enables a photopatternable, spin-on material to be used in the formation of semiconductor device structures at wavelengths that were previously unusable. The photopatternable, spin-on material is applied as a layer to a semiconductor substrate. The cap layer and a photoresist layer are each formed over the photopatternable layer. The cap layer absorbs or reflects radiation and protects the photopatternable layer from a first wavelength of radiation used in patterning the photoresist layer. The photopatternable, spin-on material is convertible to a silicon dioxide-based material upon exposure to a second wavelength of radiation.

公开(公告)号：US20060160375A1

公开(公告)日：2006-07-20

申请号：US11378825

申请日：2006-03-17

Applicant: Weimin Li ,  Gurtej Sandhu

Inventor： Weimin Li ,  Gurtej Sandhu

IPC: H01L21/31 ,  H01L21/469

CPC classification number: H01L21/02145 ,  H01L21/02164 ,  H01L21/02214 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/3121 ,  H01L21/31612 ,  H01L21/76224 ,  H01L21/823462

Abstract: This invention includes methods of depositing silicon dioxide comprising layers in the fabrication of integrated circuitry, methods of forming trench isolation, and methods of forming bit line over capacitor arrays of memory cells. In one implementation, a semiconductor substrate having an exposed outer first surface comprising silicon-nitrogen bonds and an exposed outer second surface comprising at least one of silicon and silicon dioxide is provided. A layer comprising a metal is deposited over at least the outer second surface. A silanol is flowed to the metal of the outer second surface and to the outer first surface effective to selectively deposit a silicon dioxide comprising layer over the outer second surface as compared to the outer first surface. Other aspects and implementations are contemplated.

Abstract translation: 本发明包括在集成电路的制造中沉积包含层的二氧化硅的方法，形成沟槽隔离的方法以及在存储器单元的电容器阵列上形成位线的方法。 在一个实施方案中，提供了具有包含硅 - 氮键的暴露的外部第一表面和包含硅和二氧化硅中的至少一种的暴露的外部第二表面的半导体衬底。 包含金属的层至少沉积在外部第二表面上。 与外部第一表面相比，硅烷醇流动到外部第二表面的金属和外部第一表面，有效地选择性地将二氧化硅包含层沉积在外部第二表面上。 考虑了其他方面和实现。

公开(公告)号：US07067414B1

公开(公告)日：2006-06-27

申请号：US09536037

申请日：2000-03-27

Applicant: Weimin Li ,  Zhiping Yin ,  William Budge

Inventor： Weimin Li ,  Zhiping Yin ,  William Budge

IPC: H01L21/31 ,  H01L21/469 ,  H01L21/4763

CPC classification number: H01L21/02126 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02323 ,  H01L21/0234 ,  H01L21/31633 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828

Abstract: A low k inter-level dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. An oxide-comprising inter-level dielectric layer including carbon and having a dielectric constant no greater than 3.5 is formed over the substrate. After forming the dielectric layer, it is exposed to a plasma including oxygen effective to reduce the dielectric constant to below what it was prior to the exposing. A low k inter-level dielectric layer fabrication method includes providing a substrate having integrated circuitry at least patially formed thereon. In a chamber, an inter-level dielectric layer including carbon and having a dielectric constant no greater than 3.5 is plasma-enhanced chemical vapor deposited over the substrate at subatmospheric pressure. After forming the dielectric layer, it is exposed to a plasma including oxygen at subatmospheric pressure effective to reduce the dielectric constant by at least 10% below what it was prior to the exposing. The exposing occurs without removing the substrate from the chamber between the depositing and the exposing, and pressure within the chamber is maintained at subatmospheric pressure between the depositing and the exposing.

Abstract translation: 低k层间电介质层制造方法包括提供具有至少部分地形成在其上的集成电路的衬底。 包含碳并具有不大于3.5的介电常数的含氧化物的介电层形成在衬底上。 在形成电介质层之后，将其暴露于包含氧的等离子体中，以有效地将介电常数降低到暴露前的介电常数。 低k级间介电层制造方法包括提供具有至少在其上形成的集成电路的衬底。 在室中，包含碳并具有不大于3.5的介电常数的层间电介质层是在低于大气压的压力下沉积在衬底上的等离子体增强的化学气相。 在形成电介质层之后，将其暴露于含有低于大气压的氧气的等离子体，以有效地将介电常数降低至比曝光之前低至少10％。 在沉积和暴露之间不会从基板移除基板而露出曝光，并且室内的压力保持在沉积和曝光之间的低于大气压的压力。

公开(公告)号：US20060134924A1

公开(公告)日：2006-06-22

申请号：US11341199

申请日：2006-01-27

Applicant: Neal Rueger ,  William Budge ,  Weimin Li ,  Gurtej Sandhu

Inventor： Neal Rueger ,  William Budge ,  Weimin Li ,  Gurtej Sandhu

IPC: H01L21/31

CPC classification number: H01L21/02274 ,  C23C16/045 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/76224 ,  H01L21/76837

Abstract: The invention includes a method of filling gaps in a semiconductor substrate. A substrate and a gas mixture containing at least one heavy-hydrogen compound are provided within a reaction chamber. The gas mixture is reacted to form a layer of material over the substrate by simultaneous deposition and etch of the layer. The layer of material fills the gap such that the material within the gap is essentially void-free. The invention includes a method of providing improved deposition rate uniformity. A material is deposited over a surface in the presence of at least one gas selected from the group consisting of D2, HD, DT, T2 and TH. The net deposition rate during the deposition has a degree of variance across the surface which is measurably improved relative to a corresponding degree of variance that occurs during deposition utilizing H2 under otherwise substantially identical conditions.

Abstract translation: 本发明包括填充半导体衬底中的间隙的方法。 在反应室内设置底物和含有至少一种重氢化合物的气体混合物。 通过同时沉积和蚀刻该层，使气体混合物反应以在衬底上形成一层材料。 材料层填充间隙，使得间隙内的材料基本上无空隙。 本发明包括提供改进的沉积速率均匀性的方法。 在选自由D 2，HD，DT，T 2和TH组成的组中的至少一种气体存在下，材料沉积在表面上。 沉积期间的净沉积速率在整个表面上具有相对于在其它实质上相同的条件下利用H 2 N沉积期间发生的相应的变化程度可以显着改善的表面上的变化程度。