Methods of filling gaps and methods of depositing materials using high density plasma chemical vapor deposition
    1.
    发明授权
    Methods of filling gaps and methods of depositing materials using high density plasma chemical vapor deposition 失效
    填充间隙的方法和使用高密度等离子体化学气相沉积沉积材料的方法

    公开(公告)号:US07056833B2

    公开(公告)日:2006-06-06

    申请号:US10669671

    申请日:2003-09-23

    IPC分类号: H01L21/31

    摘要: The invention includes a method of filling gaps in a semiconductor substrate. A substrate and a gas mixture containing at least one heavy-hydrogen compound are provided within a reaction chamber. The gas mixture is reacted to form a layer of material over the substrate by simultaneous deposition and etch of the layer. The layer of material fills the gap such that the material within the gap is essentially void-free. The invention includes a method of providing improved deposition rate uniformity. A material is deposited over a surface in the presence of at least one gas selected from the group consisting of D2, HD, DT, T2 and TH. The net deposition rate during the deposition has a degree of variance across the surface which is measurably improved relative to a corresponding degree of variance that occurs during deposition utilizing H2 under otherwise substantially identical conditions.

    摘要翻译: 本发明包括填充半导体衬底中的间隙的方法。 在反应室内设置底物和含有至少一种重氢化合物的气体混合物。 通过同时沉积和蚀刻该层,使气体混合物反应以在衬底上形成一层材料。 材料层填充间隙,使得间隙内的材料基本上无空隙。 本发明包括提供改进的沉积速率均匀性的方法。 在选自由D 2,HD,DT,T 2和TH组成的组中的至少一种气体存在下,材料沉积在表面上。 沉积期间的净沉积速率在整个表面上具有相对于在其它实质上相同的条件下利用H 2 N沉积期间发生的相应的方差程度可以显着改善的表面上的变化程度。

    Protection in integrated circuits

    公开(公告)号:US07632737B2

    公开(公告)日:2009-12-15

    申请号:US11458064

    申请日:2006-07-17

    IPC分类号: H01L21/762

    CPC分类号: H01L21/76235

    摘要: A method including, prior to a plasma heat-up operation, forming a liner on structure coated with an insulator. And a method including forming a trench on a substrate, forming an insulator on the trench, and after forming a liner having a thickness of between about 50 angstroms and about 400 angstroms on the insulator, applying a plasma heat-up operation to the substrate.

    Protection in integrated circuits
    3.
    发明授权
    Protection in integrated circuits 失效
    集成电路保护

    公开(公告)号:US07494894B2

    公开(公告)日:2009-02-24

    申请号:US10231388

    申请日:2002-08-29

    IPC分类号: H01L21/762

    CPC分类号: H01L21/76235

    摘要: A method including, prior to a plasma heat-up operation, forming a liner on a structure coated with an insulator. And a method including forming a trench on a substrate, forming an insulator on the trench, and after forming a liner having a thickness of between about 50 angstroms and about 400 angstroms on the insulator, applying a plasma heat-up operation to the substrate.

    摘要翻译: 一种方法,包括在等离子体加热操作之前,在涂覆有绝缘体的结构上形成衬垫。 以及一种方法,包括在衬底上形成沟槽,在沟槽上形成绝缘体,并且在形成绝缘体上具有介于约50埃至约400埃之间的厚度的衬垫之后,对衬底施加等离子体加热操作。

    Methods of filling gaps using high density plasma chemical vapor deposition
    4.
    发明授权
    Methods of filling gaps using high density plasma chemical vapor deposition 有权
    使用高密度等离子体化学气相沉积填充间隙的方法

    公开(公告)号:US07273793B2

    公开(公告)日:2007-09-25

    申请号:US11115854

    申请日:2005-04-25

    IPC分类号: H01L21/76

    摘要: The invention includes a method of filling gaps in a semiconductor substrate. A substrate and a gas mixture containing at least one heavy-hydrogen compound are provided within a reaction chamber. The gas mixture is reacted to form a layer of material over the substrate by simultaneous deposition and etch of the layer. The layer of material fills the gap such that the material within the gap is essentially void-free. The invention includes a method of providing improved deposition rate uniformity. A material is deposited over a surface in the presence of at least one gas selected from the group consisting of D2, HD, DT, T2 and TH. The net deposition rate during the deposition has a degree of variance across the surface which is measurably improved relative to a corresponding degree of variance that occurs during deposition utilizing H2 under otherwise substantially identical conditions.

    摘要翻译: 本发明包括填充半导体衬底中的间隙的方法。 在反应室内设置底物和含有至少一种重氢化合物的气体混合物。 通过同时沉积和蚀刻该层,使气体混合物反应以在衬底上形成一层材料。 材料层填充间隙,使得间隙内的材料基本上无空隙。 本发明包括提供改进的沉积速率均匀性的方法。 在选自由D 2,HD,DT,T 2和TH组成的组中的至少一种气体存在下,材料沉积在表面上。 沉积期间的净沉积速率在整个表面上具有相对于在其它实质上相同的条件下利用H 2 N沉积期间发生的相应的变化程度可以显着改善的表面上的变化程度。

    Method of filling gaps and methods of depositing materials using high density plasma chemical vapor deposition
    5.
    发明授权
    Method of filling gaps and methods of depositing materials using high density plasma chemical vapor deposition 有权
    填充间隙的方法和使用高密度等离子体化学气相沉积沉积材料的方法

    公开(公告)号:US07202183B2

    公开(公告)日:2007-04-10

    申请号:US11341199

    申请日:2006-01-27

    IPC分类号: H01L21/31

    摘要: The invention includes a method of filling gaps in a semiconductor substrate. A substrate and a gas mixture containing at least one heavy-hydrogen compound are provided within a reaction chamber. The gas mixture is reacted to form a layer of material over the substrate by simultaneous deposition and etch of the layer. The layer of material fills the gap such that the material within the gap is essentially void-free. The invention includes a method of providing improved deposition rate uniformity. A material is deposited over a surface in the presence of at least one gas selected from the group consisting of D2, HD, DT, T2 and TH. The net deposition rate during the deposition has a degree of variance across the surface which is measurably improved relative to a corresponding degree of variance that occurs during deposition utilizing H2 under otherwise substantially identical conditions.

    摘要翻译: 本发明包括填充半导体衬底中的间隙的方法。 在反应室内设置底物和含有至少一种重氢化合物的气体混合物。 通过同时沉积和蚀刻该层,使气体混合物反应以在衬底上形成一层材料。 材料层填充间隙,使得间隙内的材料基本上无空隙。 本发明包括提供改进的沉积速率均匀性的方法。 在选自由D 2,HD,DT,T 2和TH组成的组中的至少一种气体存在下,材料沉积在表面上。 沉积期间的净沉积速率在整个表面上具有相对于在其它实质上相同的条件下利用H 2 N沉积期间发生的相应的变化程度可以显着改善的表面上的变化程度。

    Deposition and chamber treatment methods
    6.
    发明授权
    Deposition and chamber treatment methods 有权
    沉积和室处理方法

    公开(公告)号:US06589611B1

    公开(公告)日:2003-07-08

    申请号:US10226849

    申请日:2002-08-22

    IPC分类号: H05H124

    摘要: The invention encompasses a method for sequentially processing separate sets of wafers within a chamber. Each set is subjected to plasma-enhanced deposition of material within the chamber utilizing a plasma that is primarily inductively coupled. After the plasma-enhanced deposition, and while the set remains within the chamber, the plasma is changed to a primarily capacitively coupled plasma. The cycling of the plasma from primarily inductively coupled to primarily capacitively coupled can increase the ratio of processed wafers to plasma reaction chamber internal sidewall cleanings that can be obtained while maintaining low particle counts on the processed wafers.

    摘要翻译: 本发明包括用于在腔室内顺序处理单独的晶片组的方法。 使用主要感应耦合的等离子体,使每组在室内进行等离子体增强的材料沉积。 在等离子体增强沉积之后,并且当集合保持在室内时,等离子体被改变为主要的电容耦合等离子体。 等离子体从主要电感耦合到主要电容耦合的循环可以增加处理的晶片与等离子体反应室内部侧壁清洁的比例,其可以在保持处理的晶片上的低颗粒计数的同时获得。

    Deposition and chamber treatment methods
    7.
    发明授权
    Deposition and chamber treatment methods 失效
    沉积和室处理方法

    公开(公告)号:US06866900B2

    公开(公告)日:2005-03-15

    申请号:US10460624

    申请日:2003-06-11

    摘要: The invention encompasses a method for sequentially processing separate sets of wafers within a chamber. Each set is subjected to plasma-enhanced deposition of material within the chamber utilizing a plasma that is primarily inductively coupled. After the plasma-enhanced deposition, and while the set remains within the chamber, the plasma is changed to a primarily capacitively coupled plasma. The cycling of the plasma from primarily inductively coupled to primarily capacitively coupled can increase the ratio of processed wafers to plasma reaction chamber internal sidewall cleanings that can be obtained while maintaining low particle counts on the processed wafers.

    摘要翻译: 本发明包括用于在腔室内顺序处理单独的晶片组的方法。 使用主要感应耦合的等离子体,使每组在室内进行等离子体增强的材料沉积。 在等离子体增强沉积之后,并且当集合保持在室内时,等离子体被改变为主要的电容耦合等离子体。 等离子体从主要电感耦合到主要电容耦合的循环可以增加处理的晶片与等离子体反应室内部侧壁清洁的比例,其可以在保持处理的晶片上的低颗粒计数的同时获得。

    Gas delivery system for deposition processes, and methods of using same

    公开(公告)号:US06936547B2

    公开(公告)日:2005-08-30

    申请号:US10284681

    申请日:2002-10-31

    摘要: The present invention is generally directed to a novel gas delivery system for various deposition processes, and various methods of using same. In one illustrative embodiment, a deposition tool comprises a process chamber, a wafer stage adapted for holding a wafer positioned therein, and a gas delivery system positioned in the chamber above a position where a plasma will be generated in the chamber, wherein substantially all of a reactant gas is delivered into the chamber via the gas delivery system. In another illustrative embodiment, the reactant gas exiting the gas delivery system is directed so as to cover substantially all of an area defined by an upper surface of the wafer. In one illustrative embodiment, the method comprises positioning a wafer in a process chamber of a deposition tool, generating a plasma within the process chamber above the wafer, and forming a layer of material above the wafer by introducing substantially all of a reactant gas used to form the layer of material into the process chamber above the plasma via a gas delivery system positioned above the plasma. In another illustrative embodiment, the reactant gas exiting the gas delivery system is directed to cover substantially all of an area defined by an upper surface of the wafer.

    Field emission devices and methods for making the same
    9.
    发明授权
    Field emission devices and methods for making the same 有权
    场发射装置及其制作方法

    公开(公告)号:US08729787B2

    公开(公告)日:2014-05-20

    申请号:US11640701

    申请日:2006-12-18

    申请人: Neal R. Rueger

    发明人: Neal R. Rueger

    IPC分类号: H01J21/00

    摘要: The present disclosure includes field emission device embodiments. The present disclosure also includes method embodiments for forming field emitting devices. One device embodiment includes a housing defining an interior space including a lower portion and an upper portion, a cathode positioned in the lower portion of the housing, a elongate nanostructure coupled to the cathode, an anode positioned in the upper portion of the housing, and a control grid positioned between the elongate nanostructure and the anode to control electron flow between the anode and the elongate nanostructure.

    摘要翻译: 本公开包括场发射装置实施例。 本公开还包括用于形成场发射器件的方法实施例。 一个装置实施例包括限定内部空间的壳体,该内部空间包括下部分和上部部分,位于壳体下部的阴极,耦合到阴极的细长纳米结构,位于壳体上部的阳极,以及 位于细长纳米结构和阳极之间的控制网格,以控制阳极和细长纳米结构之间的电子流。

    Method for positioning spacers for pitch multiplication
    10.
    发明授权
    Method for positioning spacers for pitch multiplication 有权
    定位用于间距乘法的间隔物的方法

    公开(公告)号:US08173550B2

    公开(公告)日:2012-05-08

    申请号:US13179851

    申请日:2011-07-11

    IPC分类号: H01L21/302

    摘要: Multiple pitch-multiplied spacers are used to form mask patterns having features with exceptionally small critical dimensions. One of each pair of spacers formed around a plurality of mandrels is removed and alternating layers, formed of two mutually selectively etchable materials, are deposited around the remaining spacers. Layers formed of one of the materials are then etched, leaving behind vertically-extending layers formed of the other of the materials, which form a mask pattern. Alternatively, instead of depositing alternating layers, amorphous carbon is deposited around the remaining spacers followed by a plurality of cycles of forming pairs of spacers on the amorphous carbon, removing one of the pairs of spacers and depositing an amorphous carbon layer. The cycles can be repeated to form the desired pattern. Because the critical dimensions of some features in the pattern can be set by controlling the width of the spaces between spacers, exceptionally small mask features can be formed.

    摘要翻译: 使用多个间距倍数的间隔物来形成具有特别小的临界尺寸的特征的掩模图案。 去除围绕多个心轴形成的每对间隔件中的一个,并且由两个相互选择性可蚀刻的材料形成的交替层围绕剩余的间隔物沉积。 然后蚀刻由一种材料形成的层,留下由形成掩模图案的另一种材料形成的垂直延伸层。 或者,代替沉积交替的层,非晶碳沉积在剩余的间隔物周围,随后在无定形碳上形成成对隔离物的多个循环,去除一对隔离物之一并沉积无定形碳层。 可以重复循环以形成所需的图案。 由于图案中的某些特征的临界尺寸可以通过控制间隔物之间​​的间隔的宽度来设定,所以可以形成特别小的掩模特征。