Abstract:
A semiconductor device includes a channel region; a gate dielectric over the channel region; a gate electrode over the gate dielectric; and a first source/drain region adjacent the gate dielectric. The first source/drain region is of a first conductivity type. At least one of the channel region and the first source/drain region includes a superlattice structure. The semiconductor device further includes a second source/drain region on an opposite side of the channel region than the first source/drain region. The second source/drain region is of a second conductivity type opposite the first conductivity type. At most, one of the first source/drain region and the second source/drain region comprises an additional superlattice structure.
Abstract:
A method and system is disclosed for forming an improved isolation structure for strained channel transistors. In one example, an isolation structure is formed comprising a trench filled with a nitrogen-containing liner and a gap filler. The nitrogen-containing liner enables the isolation structure to reduce compressive strain contribution to the channel region.
Abstract:
A method for manufacturing a CIGS thin film photovoltaic device includes forming a back contact layer on a substrate, forming an Se-rich layer on the back contact layer, forming a precursor layer on the Se-rich layer by depositing copper, gallium and indium resulting in a first interim structure, annealing or selenizing the first interim structure, thereby forming Cu/Se, Ga/Se or CIGS compounds along the interface between the back contact layer and the precursor layer and resulting in a second interim structure, and selenizing the second interim structure, thereby converting the precursor layer into a CIGS absorber layer on the back contact layer.
Abstract:
A method of fabricating a solar cell includes forming a front contact layer over a substrate, and the front contact layer is optically transparent at specified wavelengths and electrically conductive. A first scribed area is scribed through the front contact layer to expose a portion of the substrate. A buffer layer doped with an n-type dopant is formed over the front contact layer and the first scribed area. An absorber layer doped with a p-type dopant is formed over the buffer layer. A back contact layer that is electrically conductive is formed over the absorber layer.
Abstract:
A thin film solar cell and process for forming the same. The solar cell includes a bottom electrode layer, a light absorbing semiconductor layer, and top electrode layer. The absorber layer includes a p-type interior region and an n-type exterior region formed around the perimeter of the layer from a modified native portion of the p-type interior region, thereby forming an active n-p junction that is an intrinsic part of the absorber layer. The top electrode layer is electrically connected to the bottom electrode layer via a scribe line formed in the absorber layer that defines sidewalls. The n-type exterior region of the absorber layer extends along both the horizontal top of the absorber layer, and onto the vertical sidewalls of the scribe line to increase the area of available n-p junction in the solar cell thereby improving solar conversion efficiency.
Abstract:
A pre-plating solution for making a printed circuit board includes carbon nanotubes of 0.01-3 wt %, a surfactant of 0.01-4 wt %, an alkaline substance of 0.01-1 wt % and a solvent. A method for preparing a pre-plating solution comprising the steps of: providing a plurality of carbon nanotubes; purifying the carbon nanotubes; treating the purified carbon nanotubes with an acid; mixing the treated carbon nanotubes, an alkaline substance and a solvent to form suspension; and adding surfactant into suspension.
Abstract:
A method and system for forming a chalcogenide or chalcopyrite-based semiconductor material provide for the simultaneous deposition of metal precursor materials from a target and Se radials from a Se radical generation system. The Se radical generation system includes an evaporator that produces an Se vapor and a plasma chamber that uses a plasma to generate a flux of Se radicals. Multiple such deposition operations may take place in sequence, each having the deposition temperature accurately controlled. The deposited material may include a compositional concentration gradient or may be a composite material, and may be used as an absorber layer in a solar cell.
Abstract:
A gate-last method for forming a metal gate transistor is provided. The method includes forming an opening within a dielectric material over a substrate. A gate dielectric structure is formed within the opening and over the substrate. A work function metallic layer is formed within the opening and over the gate dielectric structure. A silicide structure is formed over the work function metallic layer.
Abstract:
An electromagnetic shielding composite includes a polymer and a plurality of carbon nanotubes disposed in the polymer in a form of carbon nanotube film structure. A method for making an electromagnetic shielding composite includes the steps of: (a) providing an array of carbon nanotubes; (b) drawing a carbon nanotube film from the array of carbon nanotubes; (c) providing a substrate, covering at least one carbon nanotube film on the substrate to form a carbon nanotube film structure; and (d) providing a polymer and combining the carbon nanotube film structure with the polymer to form an electromagnetic shielding composite.
Abstract:
A printed circuit board substrate includes an insulation matrix and a waterproof layer. The insulation matrix includes a first surface and a second surface at an opposite side thereof to the first surface. The waterproof layer is formed in the insulation matrix and is arranged between the first surface and the second surface for blocking water from passing therethrough in a thicknesswise direction of the insulation matrix.