公开(公告)号：US11088002B2

公开(公告)日：2021-08-10

申请号：US15940759

申请日：2018-03-29

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Werner Knaepen ,  Bert Jongbloed ,  Cornelis Thaddeus Herbschleb ,  Hessel Sprey

IPC: H01L21/673 ,  H01L21/306 ,  H01L21/67 ,  C23C16/48 ,  H01L21/02

Abstract: The invention relates to a substrate rack and a substrate processing system for processing substrates in a reaction chamber. The substrate rack may be used for introducing a plurality of substrates in the reaction chamber. The substrate rack may have a plurality of spaced apart substrate holding provisions configured to hold the substrates in a spaced apart relationship. The rack may have an illumination system to irradiate radiation with a range from 100 to 500 nanometers onto a top surface of the substrates.

公开(公告)号：US11056353B2

公开(公告)日：2021-07-06

申请号：US15994236

申请日：2018-05-31

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Werner Knaepen ,  Bert Jongbloed

IPC: H01L21/3213 ,  C23F1/16 ,  H01L21/306 ,  H01L21/02 ,  H01L21/311 ,  H01L21/308

Abstract: The disclosure relates generally to the field of processing substrates, for example comprising materials such as quartz, glass or silicon. The disclosure more particular relates to providing wet etch protection layers comprising boron and carbon and etching the substrate in a hydrogen fluoride aqueous solution. One or more of the boron and carbon containing films can have a thickness of at least 5, preferably 10 and, more preferably 30 nm. The method comprises wet etching the substrate in a hydrofluoric acid solution with a hydrogen fluoride concentration of at least 10 wt. % for at least 5 minutes.

公开(公告)号：US10741394B2

公开(公告)日：2020-08-11

申请号：US16254841

申请日：2019-01-23

Applicant: ASM IP Holding B.V. ,  IMEC VZW ,  Katholieke Universiteit Leuven

Inventor： Jan Willem Maes ,  Werner Knaepen ,  Roel Gronheid ,  Arjun Singh

IPC: H01L21/00 ,  H01L21/033 ,  G03F7/00 ,  H01L21/02 ,  H01L21/027 ,  H01L21/32

Abstract: A method for forming a film with an annealing step and a deposition step is disclosed. The method comprises an annealing step for inducing self-assembly or alignment within a polymer. The method also comprises a selective deposition step in order to enable selective deposition on a polymer.

公开(公告)号：US10551741B2

公开(公告)日：2020-02-04

申请号：US16094119

申请日：2017-04-07

Applicant: ASM IP HOLDING B.V. ,  IMEC VZW

Inventor： Werner Knaepen ,  Jan Willem Maes ,  Maarten Stokhof ,  Roel Gronheid ,  Hari Pathangi Sriraman

IPC: G03F7/16 ,  H01L21/027 ,  H01L21/67 ,  H01L21/768 ,  H01L51/00 ,  H01L21/469 ,  H01L21/31 ,  B05D3/04 ,  B05D3/02

Abstract: A method of forming a directed self-assembled (DSA) layer on a substrate by: providing a substrate; applying a layer comprising a self-assembly material on the substrate; and annealing of the self-assembly material of the layer to form a directed self-assembled layer by providing a controlled temperature and gas environment around the substrate. The controlled gas environment comprises molecules comprising an oxygen element with a partial pressure between 10-2000 Pa.

公开(公告)号：US20190295837A1

公开(公告)日：2019-09-26

申请号：US16317774

申请日：2017-07-14

Applicant: ASM IP Holding B.V.

Inventor： Viljami Pore ,  Werner Knaepen ,  Bert Jongbloed ,  Dieter Pierreux ,  Gido Van Der Star ,  Toshiya Suzuki

IPC: H01L21/02 ,  C23C16/455 ,  C23C16/04 ,  H01L21/762 ,  C23C16/50

Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.

公开(公告)号：US10199223B2

公开(公告)日：2019-02-05

申请号：US15413848

申请日：2017-01-24

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Werner Knaepen ,  Bert Jongbloed

IPC: H01L21/033

Abstract: An etch stop layer comprises a metal oxide comprising a metal selected from the group consisting of metals of Group 4 of the periodic table, metals of Group 5 of the periodic table, metals of Group 6 of the periodic table, and yttrium. The metal oxide forms exceptionally thin layers that are resistant to ashing and HF exposure. Subjecting the etch stop layer to both ashing and HF etch processes removes less than 0.3 nm of the thickness of the etch stop layer, and more preferably less than 0.25 nm. The etch stop layer may be thin and may have a thickness of about 0.5-2 nm. In some embodiments, the etch stop layer comprises tantalum oxide (TaO).

公开(公告)号：US20180033606A1

公开(公告)日：2018-02-01

申请号：US15222715

申请日：2016-07-28

Applicant: ASM IP Holding B.V.

Inventor： Viljami Pore ,  Werner Knaepen ,  Bert Jongbloed ,  Dieter Pierreux ,  Gido Van Der Star ,  Toshiya Suzuki

IPC: H01L21/02 ,  C23C16/50 ,  H01L21/762 ,  C23C16/455

CPC classification number: H01L21/0228 ,  C23C16/45525 ,  C23C16/50 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02211 ,  H01L21/02219 ,  H01L21/02274 ,  H01L21/76224

Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.

公开(公告)号：US09812320B1

公开(公告)日：2017-11-07

申请号：US15222738

申请日：2016-07-28

Applicant: ASM IP Holding B.V.

Inventor： Viljami Pore ,  Werner Knaepen ,  Bert Jongbloed ,  Dieter Pierreux ,  Steven R. A. Van Aerde ,  Suvi Haukka ,  Atsuki Fukuzawa ,  Hideaki Fukuda

IPC: H01L21/02 ,  C23C16/455 ,  C23C16/50 ,  H01J37/32 ,  H01L21/762

CPC classification number: H01L21/0228 ,  C23C16/045 ,  C23C16/402 ,  C23C16/45525 ,  C23C16/45534 ,  C23C16/45542 ,  C23C16/50 ,  H01J37/32009 ,  H01J2237/3321 ,  H01J2237/334 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02183 ,  H01L21/02211 ,  H01L21/02219 ,  H01L21/02274 ,  H01L21/02299 ,  H01L21/76224

Abstract: According to the invention there is provided a method of filling one or more gaps created during manufacturing of a feature on a substrate by providing a deposition method comprising; introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant; introducing a second reactant to the substrate with a second dose. The first reactant is introduced with a subsaturating first dose reaching only a top area of the surface of the one or more gaps and the second reactant is introduced with a saturating second dose reaching a bottom area of the surface of the one or more gaps. A third reactant may be provided to the substrate in the reaction chamber with a third dose, the third reactant reacting with at least one of the first and second reactant.

公开(公告)号：US09799509B2

公开(公告)日：2017-10-24

申请号：US14555429

申请日：2014-11-26

Applicant: ASM IP Holding B.V.

Inventor： Bert Jongbloed ,  Dieter Pierreux ,  Werner Knaepen

IPC: H01L21/02 ,  H01L21/308

CPC classification number: H01L21/02178 ,  H01L21/0228

Abstract: A process for depositing aluminum oxynitride (AlON) is disclosed. The process comprises subjecting a substrate to temporally separated exposures to an aluminum precursor and a nitrogen precursor to form an aluminum and nitrogen-containing compound on the substrate. The aluminum and nitrogen-containing compound is subsequently exposed to an oxygen precursor to form AlON. The temporally separated exposures to an aluminum precursor and a nitrogen precursor, and the subsequent exposure to an oxygen precursor together constitute an AlON deposition cycle. A plurality of AlON deposition cycles may be performed to deposit an AlON film of a desired thickness. The deposition may be performed in a batch process chamber, which may accommodate batches of 25 or more substrates. The deposition may be performed without exposure to plasma.

公开(公告)号：US20150287591A1

公开(公告)日：2015-10-08

申请号：US14686595

申请日：2015-04-14

Applicant: ASM IP HOLDING B.V.

Inventor： Viljami J. Pore ,  Yosuke Kimura ,  Kunitoshi Namba ,  Wataru Adachi ,  Hideaki Fukuda ,  Werner Knaepen ,  Dieter Pierreux ,  Bert Jongbloed

IPC: H01L21/02

CPC classification number: H01L21/02112 ,  C23C16/045 ,  C23C16/30 ,  C23C16/32 ,  C23C16/45523 ,  C23C16/45525 ,  C23C16/45531 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/0234 ,  H01L21/2254 ,  H01L21/31111

Abstract: Methods of depositing boron and carbon containing films are provided. In some embodiments, methods of depositing B, C films with desirable properties, such as conformality and etch rate, are provided. One or more boron and/or carbon containing precursors can be decomposed on a substrate at a temperature of less than about 400° C. One or more of the boron and carbon containing films can have a thickness of less than about 30 angstroms. Methods of doping a semiconductor substrate are provided. Doping a semiconductor substrate can include depositing a boron and carbon film over the semiconductor substrate by exposing the substrate to a vapor phase boron precursor at a process temperature of about 300° C. to about 450° C., where the boron precursor includes boron, carbon and hydrogen, and annealing the boron and carbon film at a temperature of about 800° C. to about 1200° C.

Abstract translation: 提供了沉积硼和碳的膜的方法。 在一些实施例中，提供了沉积具有所需性质（诸如保形性和蚀刻速率）的B，C膜的方法。 一种或多种含硼和/或碳的前体可以在低于约400℃的温度下在基材上分解。含硼和碳的一种或多种膜可以具有小于约30埃的厚度。 提供掺杂半导体衬底的方法。 掺杂半导体衬底可以包括通过在大约300℃至大约450℃的工艺温度下将衬底暴露于气相硼前体而在半导体衬底上沉积硼和碳膜，其中硼前体包括硼， 碳和氢，并在约800℃至约1200℃的温度下退火硼和碳膜。