公开(公告)号：US20120208703A1

公开(公告)日：2012-08-16

申请号：US13383957

申请日：2010-07-08

申请人： Hironao Okayama ,  Teppei Kurokawa ,  Kouji Nanbu ,  Yoshihiko Isobe ,  Takashi Koshiro ,  Akira Kaneko ,  Hajime Ota ,  Kotaro Ohki ,  Takashi Yamaguchi ,  Kazuya Ohmastu

发明人： Hironao Okayama ,  Teppei Kurokawa ,  Kouji Nanbu ,  Yoshihiko Isobe ,  Takashi Koshiro ,  Akira Kaneko ,  Hajime Ota ,  Kotaro Ohki ,  Takashi Yamaguchi ,  Kazuya Ohmastu

IPC分类号： H01L39/02 ,  H01L39/24

CPC分类号： H01L39/2454 ,  B32B15/01 ,  B32B15/015 ,  B32B15/04 ,  B32B15/20 ,  C22C9/00 ,  C22F1/08

摘要： A metal laminated substrate for an oxide superconducting wire is produced by removing, in a state where a copper foil to which rolling is applied at a draft of 90% or more is held at a temperature below a recrystallization temperature, an absorbed material on a surface of the copper foil by applying sputter etching to the surface of the copper foil; removing an absorbed material on a surface of a nonmagnetic metal sheet by applying sputter etching to the surface of the nonmagnetic metal sheet; bonding the copper foil and the metal sheet to each other by reduction rolls at an applied pressure of 300 MPa to 1500 MPa; orienting crystals of the copper by heating a laminated body obtained by bonding at a crystal orientation temperature of copper or above; and forming a protective layer on a copper-side surface of the laminated body by coating.

摘要翻译： 在将氧化物超导线材的金属层压基板在以90％以上的牵伸下施加轧制的铜箔保持在低于再结晶温度的温度的状态下，除去表面上的吸收材料， 通过对铜箔的表面进行溅射蚀刻; 通过对非磁性金属片的表面进行溅射蚀刻，去除非磁性金属片表面上的吸收材料; 在300MPa〜1500MPa的施加压力下通过还原辊将铜箔和金属板彼此接合; 通过加热通过在铜或更高的晶体取向温度下接合获得的层压体来取向铜的晶体; 并通过涂布在层叠体的铜侧表面上形成保护层。

公开(公告)号：US07886574B2

公开(公告)日：2011-02-15

申请号：US12247396

申请日：2008-10-08

申请人： Akira Kaneko

发明人： Akira Kaneko

IPC分类号： G01N3/307 ,  G01M7/04

CPC分类号： G01N3/30

摘要： A projection device is configured by connecting a projectile supporting part to a spring supporting frame with multiple coil springs. The projectile supporting part is pulled while deforming the coil springs; a projectile is projected by accelerating the projectile supporting part, supporting the projectile, with restoring forces of the coil springs; and the projectile is collided with a test piece supported by the test piece supporting base. Thereby, it is possible to check a state of collision of the projectile with the test piece or how the test piece is damaged thereby. Since the projectile is projected with the restoring forces of the deformed coil springs, the collision test apparatus is simple and compact in structure, low-cost, and easy-to-handle in comparison with projection of a projectile with compressed air.

摘要翻译： 投影装置通过将弹丸支撑部件连接到具有多个螺旋弹簧的弹簧支撑框架来构造。 在使弹簧变形的同时拉动弹丸支撑部分; 通过加速弹丸支撑部分，支撑弹丸，弹簧恢复力预计投射弹; 并且弹丸与由试件支撑底座支撑的试件碰撞。 由此，能够检查弹丸与试验片的碰撞状态，或检查试验片的损坏状况。 由于弹丸与变形的螺旋弹簧的恢复力一起投射，与使用压缩空气的弹丸投射相比，碰撞试验装置结构简单，结构紧凑，成本低，易于操作。

公开(公告)号：US07459551B2

公开(公告)日：2008-12-02

申请号：US10508659

申请日：2003-03-26

申请人： Akira Kaneko

发明人： Akira Kaneko

IPC分类号： C07D499/00 ,  C07D487/00 ,  C07D487/08 ,  C07D501/00 ,  C07D221/00 ,  C07D237/00 ,  C07D239/00 ,  C07D241/00 ,  C07D251/00 ,  C07D253/00 ,  C07D255/00 ,  C07D257/00 ,  C07D259/00 ,  C07D205/00

CPC分类号： C07D403/12 ,  C07D499/00 ,  C07D501/00

摘要： The present invention provides a method for preparing a β-lactam compound of the following Formula (3), which comprises the step of reacting a compound of the following Formula (1) with a trialkyl phosphite represented by the formula (R5O)3P (wherein R5 represents an ethyl group, etc.) in an amount of 2 to 5 moles per mole of the compound and the step of heating the resulting reaction mixture in a diluent, wherein said method is characterized by having the step of completely removing unreacted trialkyl phosphite from the reaction mixture prior to the step of heating. (wherein X represents S, etc., Y represents N, etc., n represents 0 or 1, R1 represents an optionally substituted alkyl group containing 1 to 10 carbon atoms, etc., R2 and R3 each represent an optionally substituted alkyl or heterocyclic group, etc., and R4 represents an alkenyloxy group containing 1 to 6 carbon atoms, etc., provided that R1 and R2 may together form a β-lactam ring, etc.)

摘要翻译： 本发明提供了制备下式（3）的β-内酰胺化合物的方法，该方法包括使下式（1）的化合物与式（R5O）3P表示的亚磷酸三烷基酯反应的步骤（其中 R5代表乙基等），每摩尔化合物的量为2至5摩尔，和将所得反应混合物加热到稀释剂中的步骤，其特征在于具有完全除去未反应的亚磷酸三烷基酯的步骤 在加热步骤之前的反应混合物中。 （其中X表示S等，Y表示N等，n表示0或1，R1表示可以具有取代基的碳原子数为1〜10的烷基等，R2和R3各自表示任意取代的烷基或杂环 基团等，R 4表示含有1至6个碳原子的烯氧基等，条件是R 1和R 2可以一起形成β-内酰胺环等）

公开(公告)号：US5820975A

公开(公告)日：1998-10-13

申请号：US725680

申请日：1996-10-02

申请人： Katsutoshi Oda ,  Toshiyuki Suzuki ,  Masao Imanishi ,  Akira Kaneko ,  Kenji Ito ,  Yasutaka Nakamura

发明人： Katsutoshi Oda ,  Toshiyuki Suzuki ,  Masao Imanishi ,  Akira Kaneko ,  Kenji Ito ,  Yasutaka Nakamura

IPC分类号： E04B1/86 ,  B32B5/18 ,  B32B5/22 ,  E04B1/74 ,  E04B1/82 ,  E04B1/84 ,  G10K11/16 ,  G10K11/162 ,  B32B7/02

CPC分类号： B32B5/22 ,  E04B1/82 ,  E04B2001/742 ,  E04B2001/8461 ,  Y10T428/249953 ,  Y10T428/249955 ,  Y10T428/249956 ,  Y10T428/249981 ,  Y10T428/249982 ,  Y10T428/249985 ,  Y10T428/249987 ,  Y10T428/25 ,  Y10T428/26

摘要： A sound absorbing material which comprises a base layer 1 having a porosity of 5 to 50% by volume and a decorative layer 3 having a porosity of 5 to 50% by volume integrally, and which is obtained by sprinkling inorganic particles 4 containing colored particles in an amount of at least 1% by volume which are coated with a weather-resistant transparent resin so as to form a first particle layer which is to form the decorative layer 3 in the sound absorbing material, sprinkling uncolored inorganic lightweight particles 2 which are coated with a thermosetting resin on the first particle layer so as to form a second particle layer which is to form the base layer 1 in the sound absorbing material, and carrying out thermal compression integral molding of the first particle layer and the second particle layer simultaneously, is lightweight and inexpensive, and is provided with an attractive external stone-grain-like appearance, without impairing the sound absorbing ability of the material. In addition, by placing a reinforcing layer material on the top surface, bottom surface, or both surfaces of the second particle layer, and carrying out thermal compression integral molding of the first particle layer, the second particle layer, and the reinforcing layer material(s) simultaneously, it is possible to provide a sound absorbing material which is provided with rigidity to enable the material to be free-standing, without impairing the above advantages and the sound absorbing ability of the material.

摘要翻译： 一种吸音材料，其特征在于，其具有孔体积为5〜50体积％的基材1和整体为5〜50体积％的孔隙率的装饰层3，通过将含有着色颗粒的无机粒子4喷洒而得到 涂覆有耐候性透明树脂的至少1体积％的量，以形成在吸音材料中形成装饰层3的第一颗粒层，喷涂涂覆的未着色的无机轻质颗粒2 在第一颗粒层上具有热固性树脂，以形成在吸音材料中形成基底层1的第二颗粒层，同时进行第一颗粒层和第二颗粒层的热压缩一体成型， 重量轻，价格便宜，并且具有吸引力的外部石纹状外观，而不损害材料的吸音能力。 此外，通过在第二颗粒层的顶表面，底面或两个表面上放置增强层材料，并且进行第一颗粒层，第二颗粒层和增强层材料的热压整体成型 同时，可以提供具有刚性的吸声材料，以使材料能够自立，而不会损害材料的上述优点和吸声能力。

公开(公告)号：US5427889A

公开(公告)日：1995-06-27

申请号：US289374

申请日：1994-08-12

申请人： Masahiko Saikawa ,  Akira Kaneko ,  Keisuke Iguchi ,  Akio Yoshida ,  Yutaka Araki ,  Takenobu Yoshiki

发明人： Masahiko Saikawa ,  Akira Kaneko ,  Keisuke Iguchi ,  Akio Yoshida ,  Yutaka Araki ,  Takenobu Yoshiki

IPC分类号： B41N1/08 ,  G03F7/07 ,  G03C8/28 ,  G03C8/42

CPC分类号： G03F7/07 ,  B41N1/083

摘要： The present invention provides a lithographic printing plate material which comprises a grained and anodized aluminum support and a silver halide emulsion layer between which physical development nuclei are provided wherein said aluminum support have 500 or more pits having a diameter of 0.03-0.30 .mu.m and an average diameter of 0.05-0.20 .mu.m per 100 .mu.m.sup.2.

摘要翻译： 本发明提供了一种平版印刷版材料，其包括粒状和阳极氧化的铝载体和卤化银乳剂层，在其间提供物理显影核，其中所述铝载体具有500个或更多个直径为0.03-0.30μm的凹坑， 平均直径为0.05-0.20亩/ 100亩。

公开(公告)号：US5281891A

公开(公告)日：1994-01-25

申请号：US836894

申请日：1992-02-19

申请人： Akira Kaneko ,  Toru Kanno ,  Keiko Morishita

发明人： Akira Kaneko ,  Toru Kanno ,  Keiko Morishita

IPC分类号： H01J1/304 ,  H01J3/02 ,  H01J1/02

CPC分类号： H01J1/3042 ,  H01J3/022

摘要： An electron emission element includes an insulating substrate. A base electrode is formed on the insulating substrate. A plurality of emitters are formed on the base electrode and are arranged radially with respect to a given point. The emitters have wedge shapes with their respective tips facing inward. An insulating layer is formed on the substrate and the base electrode, and is spaced from the wedges of the emitters by given gaps. A control electrode is formed on the insulating layer for enabling electrons to be emitted from the tips of the wedge-shaped emitters.

摘要翻译： 电子发射元件包括绝缘衬底。 在绝缘基板上形成基极。 多个发射体形成在基极上并且相对于给定点径向设置。 发射器具有楔形，其各自的尖端面向内。 在基板和基极上形成绝缘层，并且通过给定的间隙与发射体的楔形物间隔开。 在绝缘层上形成控制电极，使电子能够从楔形发射体的尖端发射。

公开(公告)号：US5243252A

公开(公告)日：1993-09-07

申请号：US629954

申请日：1990-12-19

申请人： Akira Kaneko ,  Toru Kanno ,  Kaoru Tomii

发明人： Akira Kaneko ,  Toru Kanno ,  Kaoru Tomii

IPC分类号： H01J3/02 ,  H01J9/02

CPC分类号： H01J3/022 ,  H01J9/025

摘要： An electron emission device is employed as an electron emission source in various applications using an electron beam. The electron emission device has a cathode layer having an edge, and a control electrode spaced and electrically insulated from the cathode layer, for drawing electrons from said edge of the cathode layer. When a voltage is applied between the cathode layer and the control electrode, a developed electric field is concentrated on the edge of the cathode layer to cause the edge to emit electrons. The electron emission device can easily be manufactured with a high yield since it does not have a needle tip for emitting electrons. A method of manufacturing the electron emission device is also disclosed.

公开(公告)号：US5038035A

公开(公告)日：1991-08-06

申请号：US376664

申请日：1989-07-06

申请人： Nobuhiko Nishimura ,  Fujimitsu Masuyama ,  Akira Kaneko

发明人： Nobuhiko Nishimura ,  Fujimitsu Masuyama ,  Akira Kaneko

IPC分类号： G01N21/88 ,  G01N15/14 ,  G01N21/17 ,  G02B21/00 ,  G06T1/00

CPC分类号： G02B21/002 ,  G01N15/1475 ,  G01N2021/8887 ,  G01N2201/103

摘要： An automatic structure analyzing/processing apparatus for surface structure of material includes a structure observing device for observing structure of a surface of material to produce an electrical image signal thereof, a sample stage disposed opposite to the observing means an image processing device for converting the image signal from the structure observing device to digital signal and expanding or contracting a desired image reproduced from a memory means or combining a plurality of images reproduced from the memory means to produce an image signal, the memory device storing the digital signal processed by the image processing device, and a display device for displaying the image signal produced from the image processing device as an image, whereby the structure of the surface of material is stored in the memory as the image and examination of the structure can be made readily in a short time.

公开(公告)号：USD317163S

公开(公告)日：1991-05-28

申请号：US268991

申请日：1988-11-08

申请人： Akira Kaneko

设计人： Akira Kaneko

公开(公告)号：US4823278A

公开(公告)日：1989-04-18

申请号：US154452

申请日：1988-02-08

申请人： Hideo Kikuchi ,  Sadao Tsutsumi ,  Akira Kaneko

发明人： Hideo Kikuchi ,  Sadao Tsutsumi ,  Akira Kaneko

IPC分类号： H01L21/3205 ,  G06F17/50 ,  H01L21/82 ,  H01L23/52 ,  H01L27/02 ,  H01L27/118 ,  G06F15/60

CPC分类号： H01L27/0207 ,  G06F17/505 ,  G06F17/5068

摘要： A method for logic design of an integrated circuit IC in which at least one parameter concerning wiring line capacitances is used. The parameter can be precisely estimated even at a logic design stage preceding a layout design stage. The estimation is carried out by, first, classifying the logic units or the logic gates of the IC into hierarchal functional blocks. Second, specifying, for each closed network defined by delay paths, a higher level functional block in which the closed network is contained. Third, specifying lower level functional blocks enclosed by the higher functional block. Fourth, calculating the estimated wiring line capacitances of the closed network in accordance with predetermined data concerning both fan-out and actual wiring line capacitances. The data, used for the estimation, are varied in accordance with the degrees of the hierarchal level.

摘要翻译： 一种用于集成电路IC的逻辑设计的方法，其中使用至少一个关于布线线路电容的参数。 即使在布局设计阶段之前的逻辑设计阶段，也可以精确地估计该参数。 首先，将IC的逻辑单元或逻辑门分类为层级功能块来进行估计。 其次，对于由延迟路径定义的每个封闭网络，指定包含封闭网络的较高级功能块。 第三，指定由较高功能块包围的较低级功能块。 第四，根据关于扇出和实际布线线路电容的预定数据，计算封闭网络的估计布线线路电容。 用于估计的数据根据​​层级的程度而变化。