公开(公告)号：US20200091263A1

公开(公告)日：2020-03-19

申请号：US16556342

申请日：2019-08-30

Applicant: BOE Technology Group Co., Ltd.

Inventor： Ke Wang ,  Xinhong Lu ,  Hehe Hu ,  Wei Yang ,  Ce Ning

IPC: H01L27/32 ,  H01L27/12 ,  H01L29/417 ,  H01L29/423 ,  H01L29/40

Abstract: The present discloses an array substrate and a manufacturing method thereof, and a display device. The array substrate includes a first transistor and a second transistor. The first transistor includes a first active layer, a first gate, a first source and a first drain. The second transistor includes a second active layer, a second gate, a second source and a second drain. An orthographic projection of the second source on the base substrate and an orthographic projection of the second drain on the base substrate at least partially overlap. One of the second source and the second drain is in the same layer as and made from the same material as the first gate. The first source and the first drain are in the same layer as and made from the same material as the other of the second source and the second drain.

公开(公告)号：US10510857B2

公开(公告)日：2019-12-17

申请号：US15865793

申请日：2018-01-09

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xinhong Lu ,  Ke Wang ,  Wei Yang

IPC: H01L29/49 ,  H01L29/417 ,  H01L21/02 ,  H01L21/311 ,  H01L29/423 ,  H01L29/786

Abstract: A method for manufacturing a thin film transistor includes: forming a source electrode and a first insulation pattern, where an orthographic projection of the first insulation pattern at a substrate is within an orthographic projection of the source electrode at the substrate; forming an active layer, a second insulation pattern and a gate electrode on the substrate, an exposed portion of the source electrode not covered by the first insulation pattern and the first insulation pattern; exposing a first portion of the action layer on the first insulation pattern by removing parts of the gate electrode and the second insulation pattern; and performing a plasma treatment to the exposed first portion, thereby forming a drain electrode.

公开(公告)号：US10475824B2

公开(公告)日：2019-11-12

申请号：US15972096

申请日：2018-05-04

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Qingrong Ren ,  Woobong Lee ,  Fengchao Wang ,  Jianming Sun ,  Yingwei Liu ,  Wei Yang ,  Dongsheng Li

IPC: H01L27/12 ,  H01L27/146 ,  H01L31/0224 ,  H01L29/786

Abstract: The present disclosure provides a display panel, its manufacturing method and a display device. The manufacturing method of the display panel comprises: forming, on a substrate, a thin film transistor comprising a gate electrode, an active layer, a source electrode and a drain electrode; forming a hydrogen diffusion barrier layer that covers the entire substrate, wherein the hydrogen diffusion barrier layer is electrically conductive and is electrically connected to the drain electrode; and forming a photosensitive structure layer on the hydrogen diffusion barrier layer.

公开(公告)号：US10403761B2

公开(公告)日：2019-09-03

申请号：US15086857

申请日：2016-03-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ce Ning ,  Wei Yang ,  Xiaohu Li

IPC: H01L21/84 ,  H01L29/786 ,  H01L29/66 ,  H01L29/423 ,  H01L29/49 ,  H01L29/24 ,  H01L21/027 ,  H01L29/45 ,  H01L27/12 ,  H01L29/22

Abstract: An array substrate and a manufacturing method thereof, and a display device are provided. The manufacturing method comprises: forming a first gate metal pattern on a base substrate; forming a gate insulating layer, a first active layer pattern and a source-drain metal pattern on the base substrate on which the first gate metal pattern is formed; forming a first protective layer pattern and a through hole pattern on the base substrate on which the source-drain metal pattern is formed; and forming a second active layer pattern and a pixel electrode pattern on the base substrate on which the first protective layer pattern is formed. Embodiments of the present disclosure solve problems of poor display performance and high cost of the array substrate and achieve effects of improving the display performance and reducing the cost.

公开(公告)号：US20190096920A1

公开(公告)日：2019-03-28

申请号：US16134201

申请日：2018-09-18

Applicant: BOE Technology Group Co., Ltd.

Inventor： Tianmin Zhou ,  Wei Yang ,  Lizhong Wang ,  Jipeng Song

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L21/3003 ,  H01L27/1222 ,  H01L27/1248 ,  H01L27/1251 ,  H01L27/1262 ,  H01L27/127 ,  H01L27/1296 ,  H01L29/78609 ,  H01L29/78675 ,  H01L29/7869

Abstract: an array substrate, a method of manufacturing the array substrate, and a display device are provided. The array substrate includes: a base substrate; a first thin film transistor and a second thin film transistor on the base substrate, wherein the first thin film transistor comprises a first active layer, the second thin film transistor comprises a second active layer, and the second active layer is on a side of the first active layer away from the base substrate; and an interlayer dielectric layer and a first buffer layer between the first active layer and the second active layer, wherein the interlayer dielectric layer is capable of supplying hydrogen and the first buffer layer is capable of blocking hydrogen.

公开(公告)号：US20190051756A1

公开(公告)日：2019-02-14

申请号：US16165316

申请日：2018-10-19

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ce Ning ,  Wei Yang

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/45 ,  H01L29/24 ,  H01L27/12 ,  G02F1/1362 ,  H01L21/4763 ,  H01L21/425 ,  H01L21/027 ,  H01L21/02 ,  G02F1/1368

CPC classification number: H01L29/7869 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/02565 ,  H01L21/0273 ,  H01L21/425 ,  H01L21/47635 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/24 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/786

Abstract: The present application discloses a thin film transistor including a base substrate; an active layer on the base substrate having a channel region, a source electrode contact region, and a drain electrode contact region; an etch stop layer on a side of the channel region distal to the base substrate covering the channel region; a source electrode on a side of the source electrode contact region distal to the base substrate; and a drain electrode on a side of the drain electrode contact region distal to the base substrate. A thickness of the active layer in the source electrode contact region and the drain electrode contact region is substantially the same as a combined thickness of the active layer in the channel region and the etch stop layer.

公开(公告)号：US20190019813A1

公开(公告)日：2019-01-17

申请号：US15972096

申请日：2018-05-04

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Qingrong Ren ,  Woobong Lee ,  Fengchao Wang ,  Jianming Sun ,  Yingwei Liu ,  Wei Yang ,  Dongsheng Li

IPC: H01L27/12 ,  H01L27/146 ,  H01L31/0224

Abstract: The present disclosure provides a display panel, its manufacturing method and a display device. The manufacturing method of the display panel comprises: forming, on a substrate, a thin film transistor comprising a gate electrode, an active layer, a source electrode and a drain electrode; forming a hydrogen diffusion barrier layer that covers the entire substrate, wherein the hydrogen diffusion barrier layer is electrically conductive and is electrically connected to the drain electrode; and forming a photosensitive structure layer on the hydrogen diffusion barrier layer.

公开(公告)号：US20180166562A1

公开(公告)日：2018-06-14

申请号：US15554446

申请日：2017-01-20

Applicant: BOE Technology Group Co., Ltd.

Inventor： Ce Ning ,  Wei Yang ,  Hehe Hu

IPC: H01L29/66 ,  H01L29/786 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/426 ,  H01L21/4757

CPC classification number: H01L29/66969 ,  H01L21/425 ,  H01L21/426 ,  H01L21/44 ,  H01L21/465 ,  H01L21/4757 ,  H01L21/47635 ,  H01L21/77 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/7869

Abstract: A thin film transistor, a manufacturing method for an array substrate, the array substrate, and a display device are provided. The manufacturing method for a thin film transistor includes: forming a semiconductor layer; performing a modification treatment on a surface layer of a region of the semiconductor layer, so that the region of the semiconductor layer has a portion in a first direction perpendicular to the semiconductor layer formed as an etching blocking layer, portions of the semiconductor layer on both sides of the etching blocking layer in a second direction parallel to a surface of the semiconductor layer remaining unmodified; and forming a source electrode and a drain electrode on the semiconductor layer, the source electrode and the drain electrode being formed on both sides of a center line of the region perpendicular to the second direction, and spaced from each other in the second direction.

公开(公告)号：US09705007B2

公开(公告)日：2017-07-11

申请号：US15097508

申请日：2016-04-13

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wei Yang ,  Woo Bong Lee ,  Ce Ning ,  Wenlin Zhang

IPC: H01L29/786 ,  H01L29/24 ,  H01L21/02 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02587 ,  H01L21/02631 ,  H01L21/02664 ,  H01L29/24 ,  H01L29/66969

Abstract: A thin film transistor and a fabrication method thereof, and a display device are provided. The thin film transistor comprises an active layer, wherein, a target oxide is formed at a portion of the active layer where an oxygen content is higher than oxygen contents of other portions of the active layer, and a carrier mobility of the target oxide is greater than that of other portions of the active layer.

公开(公告)号：US20170186784A1

公开(公告)日：2017-06-29

申请号：US15300362

申请日：2015-10-19

Applicant: BOE Technology Group Co., Ltd.

Inventor： Wei Yang ,  Xiang Liu

IPC: H01L27/12 ,  H01L29/66 ,  H01L21/425 ,  H01L29/423 ,  H01L29/786

Abstract: A thin-film transistor (TFT) and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display device are disclosed. The manufacturing method of a TFT includes: forming an active layer, a gate electrode, a source electrode and a drain electrode respectively electrically connected with the active layer, and a gate insulating layer disposed between the gate electrode and the active layer, so that the gate electrode, the source electrode and the drain electrode are formed in the same patterning process. The method can reduce the number of masks used in the manufacturing process of the TFT or an array substrate, reduce the technology process, improve the productivity, and reduce the production cost.