Abstract:
A method of lithography patterning includes forming a first resist pattern on a substrate, the first resist pattern including a plurality of openings therein on the substrate; forming a second resist pattern on the substrate and within the plurality of openings of the first resist pattern, the second resist pattern including at least one opening therein on the substrate; and removing the first resist pattern to uncover the substrate underlying the first resist pattern.
Abstract:
The present disclosure provides a method for fabricating a semiconductor device using a track pipeline system. The method includes storing a plurality of chemicals in a plurality of storage units of the system, wherein each storage unit is operable to store one of the chemicals, mixing the chemicals into a mixture, and dispensing the mixture onto a wafer using a nozzle of the system.
Abstract:
The present invention includes a lithography method comprising forming a first patterned insist layer including at least one opening therein over a substrate. A water-soluble polymer layer is formed over the first patterned resist layer and the substrate, whereby a reaction occurs at the interface of the first patterned resist layer and the water-soluble polymer layer. The non-reacted water-soluble polymer layer is removed. Thereafter, a second patterned resist layer is formed over the substrate, wherein at least one portion of the second patterned resist layer is disposed within the at least one opening of the first patterned resist layer or abuts at least one portion of the first patterned resist layer. The substrate is thereafter etched using the first and second patterned resist layers as a mask.
Abstract:
A method for forming a dual damascene structure in a semiconductor device manufacturing process where via plugs which may include a thickness portion of a plug filling material overlying the process surface is formed by diffusing an acid into a plug filling material layer followed by reacting the acid with the plug filling material layer to form a soluble portion which is then removed using a solvent. A remaining portion of the plug filling material is cured and a BARC layer may be formed over the process surface prior to patterning trenches in an overlying resist layer and forming a dual damascene structure.
Abstract:
A method for photolithography processing includes forming a photoresist layer on a surface of a substrate, baking the substrate to remove solvents from the photoresist layer, cleaning an edge of the substrate with a tape, and exposing the photoresist layer with radiation energy. The tape includes a cleaning material. The tape is positioned proximate to or in contact with the edge of the substrate while the substrate is rotating.
Abstract:
An apparatus for fault detection and classification (FDC) specification management including a storage device and a process module. The storage device stores a specification management record and a chart profile record. The specification management record stores statistical algorithm settings of a parameter and the chart profile record stores chart frame and alarm condition information. The process module, which resides in a memory, receives a manipulation message corresponding to the specification management record, and accordingly manipulates the chart profile record.
Abstract:
A system and method for automatic SPC chart generation including a storage device and a data acquisition module. The storage device stores a chamber management tree, a recipe window management tree, a parameter configuration table and multiple chart profile records. The data acquisition module, which resides in a memory, acquires multiple process events and parameter values corresponding to the process events and a process parameter, selects a relevant statistical algorithm, calculates a statistical value by applying the statistical algorithm to the parameter values, creates a new chart profile record and a parameter statistics record therein if the chart profile record is absent, and stores the statistical values and measured time in the parameter statistics record.
Abstract:
The present invention relates to a chip antenna which comprises a substrate, a feeding pad, a feeding conductor, a matching unit, and a meandering conductor. The substrate formed with a dielectric material. By varying the length of the meandering conductor, the central frequency of the chip antenna can be properly obtained and controlled. The matching unit, which is formed by joining a matching conductor with a ground plate, uses the short-circuit function of the matching conductor to obtain the desired bandwidth. In this way, the chip antenna is well suited for applications in wireless communication systems, including personal mobile communication networks and equipment.
Abstract:
A thermal probe includes a support element, a conductive pattern and a tip. The support element has a slit or a through hole and has a first surface and a second surface which is opposite to the first surface. The conductive pattern is disposed at the first surface. The tip has a base and a pinpoint. The pinpoint is disposed at the base and passes through the slit or the through hole and highlights from the first surface. The base is connected with the second surface. The tip of the thermal probe of the invention can be replaced, and user can choose the best combination of the tip, conductive pattern and support element according to their needs.
Abstract:
A photosensitive material for use in semiconductor manufacture comprises a copolymer that includes a plurality of photoresist chains and a plurality of hydrophobic chains, each hydrophobic chain attached to the end of one of the photoresist chains. The copolymer in response to externally applied energy will self-assemble to a photoresist layer and a hydrophobic layer.