摘要:
A stacked microelectronic assembly is provided which includes first and second stacked microelectronic elements. Each of the first and second microelectronic elements can include a conductive layer extending along a face of such microelectronic element. At least one of the first and second microelectronic elements can include a recess extending from the rear surface towards the front surface, and a conductive via extending from the recess through the bond pad and electrically connected to the bond pad, with a conductive layer connected to the via and extending along a rear face of the microelectronic element towards an edge of the microelectronic element. A plurality of leads can extend from the conductive layers of the first and second microelectronic elements and a plurality of terminals of the assembly can be electrically connected with the leads.
摘要:
A method of making microelectronic packages includes making a subassembly by providing a plate having a top surface, a bottom surface and openings extending between the top and bottom surfaces, attaching a compliant layer to the top surface of the plate, the compliant layer having openings that are aligned with the openings extending through the plate, and providing electrically conductive features on the compliant layer. After making the subassembly, the bottom surface of the plate is attached with the top surface of a semiconductor wafer so that the openings extending through the plate are aligned with contacts on the wafer. At least some of the electrically conductive features on the compliant layer are electrically interconnected with the contacts on the semiconductor wafer.
摘要:
A microelectronic unit 400 can include a semiconductor element 401 having a front surface, a microelectronic semiconductor device adjacent to the front surface, contacts 403 at the front surface and a rear surface remote from the front surface. The semiconductor element 401 can have through holes 410 extending from the rear surface through the semiconductor element 401 and through the contacts 403. A dielectric layer 411 can line the through holes 410. A conductive layer 412 may overlie the dielectric layer 411 within the through holes 410. The conductive layer 412 can conductively interconnect the contacts 403 with unit contacts.
摘要:
A stacked microelectronic assembly is provided which includes first and second stacked microelectronic elements. Each of the first and second microelectronic elements can include a conductive layer extending along a face of such microelectronic element. At least one of the first and second microelectronic elements can include a recess extending from the rear surface towards the front surface, and a conductive via extending from the recess through the bond pad and electrically connected to the bond pad, with a conductive layer connected to the via and extending along a rear face of the microelectronic element towards an edge of the microelectronic element. A plurality of leads can extend from the conductive layers of the first and second microelectronic elements and a plurality of terminals of the assembly can be electrically connected with the leads.
摘要:
The present invention relates to a camera module. The camera module includes a circuit panel having a top side, a bottom side and transparent region, the circuit panel having conductors. The module further includes sensor unit disposed on the bottom side of the circuit panel, and the sensor unit includes a semiconductor chip having a front surface including an imaging area facing in a forward direction in alignment with the transparent region and an imaging circuit adapted to generate signals representative of an optical image impinging on the imaging area. The module further includes posts protruding from the bottom side of the circuit panel, wherein at least some of the posts being engagement posts having bottom surfaces, and at least some of the bottom surfaces abutting an engagement surface of the sensor unit.
摘要:
A method of making chip assemblies includes providing an in-process assembly including a semiconductor wafer, a wafer compliant structure overlying a front surface of the wafer and cavities, and terminals carried on the compliant structure adjacent the cavities and electrically connected to the wafer, the cavities being substantially sealed. The method includes subdividing the in-process assembly to form individual chip assemblies, each including one or more chip regions of the wafer, a portion of the compliant structure and the terminals carried on the portion, and opening vents communicating with said cavities after said providing step.
摘要:
A method of making microelectronic packages includes making a subassembly by providing a plate having a top surface, a bottom surface and openings extending between the top and bottom surfaces, attaching a compliant layer to the top surface of the plate, the compliant layer having openings that are aligned with the openings extending through the plate, and providing electrically conductive features on the compliant layer. After making the subassembly, the bottom surface of the plate is attached with the top surface of a semiconductor wafer so that the openings extending through the plate are aligned with contacts on the wafer. At least some of the electrically conductive features on the compliant layer are electrically interconnected with the contacts on the semiconductor wafer.
摘要:
A wafer having a front surface and contacts exposed at the front surface is treated by forming electrically conductive risers projecting upwardly from the contacts as, for example, by electroless plating, and then applying a flowable material over the front surface of the device, around the risers, to form a dielectric layer with the risers exposed at a top surface of the dielectric layer facing away from the device. Traces extending over the top surface of the dielectric layer may be formed, and may be connected to at least some of the risers.
摘要:
A method of making microelectronic packages includes making a subassembly by providing a plate having a top surface, a bottom surface and openings extending between the top and bottom surfaces, attaching a compliant layer to the top surface of the plate, the compliant layer having openings that are aligned with the openings extending through the plate, and providing electrically conductive features on the compliant layer. After making the subassembly, the bottom surface of the plate is attached with the top surface of a semiconductor wafer so that the openings extending through the plate are aligned with contacts on the wafer. At least some of the electrically conductive features on the compliant layer are electrically interconnected with the contacts on the semiconductor wafer.
摘要:
A compliant structure is provided on a semiconductor wafer. The compliant structure includes cavities. The compliant structure and the wafer seal the cavities during process steps used to form conductive elements on the compliant structure. After processing, vents are opened to connect the cavities to the exterior of the assembly. The vents may be formed by severing the wafer and compliant structure to form individual units, so that the severance planes intersect channels or other voids communicating with the cavities. Alternatively, the vents may be formed by forming holes in the compliant structure, or by opening bores extending through the wafer.