公开(公告)号：US11264459B2

公开(公告)日：2022-03-01

申请号：US16712120

申请日：2019-12-12

Applicant: Infineon Technologies AG

Inventor： Roman Baburske ,  Moriz Jelinek ,  Franz-Josef Niedernostheide ,  Frank Dieter Pfirsch ,  Christian Philipp Sandow ,  Hans-Joachim Schulze

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66 ,  H01L21/265 ,  H01L21/324 ,  H01L29/739

Abstract: A power semiconductor device includes a semiconductor body having front and back sides. The semiconductor body includes drift, field stop and emitter adjustment regions each of a first conductivity type. The field stop region is arranged between the drift region and the backside and has dopants of the first conductivity type at a higher dopant concentration than the drift region. The emitter adjustment region is arranged between the field stop region and the backside and has dopants of the first conductivity type at a higher dopant concentration than the field stop region. The semiconductor body has a concentration of interstitial oxygen of at least 1E17 cm−3. The field stop region includes a region where the dopant concentration is higher than that in the drift region at least by a factor of three. At least 20% of the dopants of the first conductivity type in the region are oxygen-induced thermal donors.

公开(公告)号：US11257914B2

公开(公告)日：2022-02-22

申请号：US17066954

申请日：2020-10-09

Applicant: Infineon Technologies AG

Inventor： Vera Van Treek ,  Roman Baburske ,  Christian Jaeger ,  Christian Robert Mueller ,  Franz-Josef Niedernostheide ,  Frank Dieter Pfirsch ,  Alexander Philippou ,  Judith Specht

IPC: H01L29/417 ,  H01L29/06 ,  H01L23/535 ,  H01L23/00 ,  H01L29/739

Abstract: A semiconductor die includes a semiconductor body having first and second active portions. The first active portion includes first source regions. The second active portion includes second source regions. A gate structure extends from a first surface into the semiconductor body and has a longitudinal gate extension along a lateral first direction. A first load pad and the first source regions are electrically connected. A second load pad and the second source regions are electrically connected. A gap laterally separates the first and second load pads. A lateral longitudinal extension of the gap is parallel to the first direction or deviates therefrom by not more than 60 degree. A connection structure electrically connects the first and second load pads. The connection structure is formed in a groove extending from the first surface into the semiconductor body and/or in a wiring layer formed on the first surface.

公开(公告)号：US11081544B2

公开(公告)日：2021-08-03

申请号：US16202752

申请日：2018-11-28

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Franz-Josef Niedernostheide ,  Oana Julia Spulber ,  Stephan Voss

IPC: H01L29/06 ,  H01L21/265 ,  H01L29/66 ,  H01L29/10 ,  H01L21/324 ,  H01L29/36 ,  H01L29/167 ,  H01L29/861

Abstract: A method of manufacturing a device in a semiconductor body includes forming a first field stop zone portion of a first conductivity type and a drift zone of the first conductivity type on the first field stop zone portion. An average doping concentration of the drift zone is smaller than 80% of that of the first field stop zone portion. The semiconductor body is processed at a first surface and thinned by removing material from a second surface. A second field stop zone portion of the first conductivity type is formed by implanting protons at one or more energies through the second surface. A deepest end-of-range peak of the protons is set in the first field stop zone portion at a vertical distance to a transition between the drift zone and first field stop zone portion in a range from 3 μm to 60 μm. The semiconductor body is annealed.

公开(公告)号：US10483384B2

公开(公告)日：2019-11-19

申请号：US15682807

申请日：2017-08-22

Applicant: Infineon Technologies AG

Inventor： Riteshkumar Bhojani ,  Franz-Josef Niedernostheide ,  Hans-Joachim Schulze ,  Josef Lutz ,  Roman Baburske

IPC: H01L29/739 ,  H01L27/02 ,  H01L29/36 ,  H03K17/16 ,  H01L29/06 ,  H01L29/08

Abstract: A transistor device includes a first emitter region of a first doping type, a second emitter region of a second doping type, a body of the second doping type, a drift region of the first doping type, a field-stop region of the first doping type, at least one boost structure, and a gate electrode. The boost structure is arranged between the field-stop region and the second emitter region. The at least one boost structure includes a base region of the first doping type and at least one auxiliary emitter region of the second doping type separated from the second emitter region by the base region. An overall dopant dose in the drift region and the field-stop region in a current flow direction of the transistor device is higher than a breakthrough charge of a semiconductor material of the drift region and the field-stop region.

公开(公告)号：US20190237575A1

公开(公告)日：2019-08-01

申请号：US16263244

申请日：2019-01-31

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Hans-Joachim Schulze ,  Matteo Dainese ,  Elmar Falck ,  Franz-Josef Niedernostheide ,  Manfred Pfaffenlehner

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/40

CPC classification number: H01L29/7811 ,  H01L29/0619 ,  H01L29/1095 ,  H01L29/402

Abstract: A semiconductor component includes a semiconductor body having opposing first surface and second surfaces, and a side surface surrounding the semiconductor body. The semiconductor component also includes an active region including a first semiconductor region of a first conductivity type, which is electrically contacted via the first surface, and a second semiconductor region of a second conductivity type, which is electrically contacted via the second surface. The semiconductor component further includes an edge termination region arranged in a lateral direction between the first semiconductor region of the active region and the side surface, and includes a first edge termination structure and a second edge termination structure. The second edge termination structure is arranged in the lateral direction between the first edge termination structure and the side surface and extends from the first surface in a vertical direction more deeply into the semiconductor body than the first edge termination structure.

公开(公告)号：US10367057B2

公开(公告)日：2019-07-30

申请号：US16196373

申请日：2018-11-20

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Franz-Josef Niedernostheide ,  Frank Dieter Pfirsch ,  Christian Philipp Sandow

IPC: H03K3/00 ,  H01L29/06 ,  H01L29/08 ,  H01L29/739 ,  H01L29/40 ,  H01L29/78 ,  H01L29/10 ,  H03K17/567

Abstract: A power semiconductor device is disclosed. The device includes a semiconductor body coupled to a first load terminal structure and a second load terminal structure, a first cell and a second cell. A first mesa is included in the first cell, the first mesa including: a first port region and a first channel region. A second mesa included in the second cell, the second mesa including a second port region. A third cell is electrically connected to the second load terminal structure and electrically connected to a drift region. The third cell includes a third mesa comprising: a third port region, a third channel region, and a third control electrode.

公开(公告)号：US20190198610A1

公开(公告)日：2019-06-27

申请号：US16227854

申请日：2018-12-20

Applicant: Infineon Technologies AG

Inventor： Elmar Falck ,  Franz-Josef Niedernostheide ,  Hans-Joachim Schulze

IPC: H01L29/06 ,  H01L21/266 ,  H01L21/225 ,  H01L21/265

CPC classification number: H01L29/0638 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/2253 ,  H01L21/26513 ,  H01L21/266 ,  H01L29/0619 ,  H01L29/66333 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7811

Abstract: A channel stopper region extending from a first main surface into a component layer of a first conductivity type is formed in an edge region of a component region, the edge region being adjacent to a sawing track region. Afterward, a doped region extending from the first main surface into the component layer is formed in the component region. The channel stopper region is formed by a photolithographic method that is carried out before a first photolithographic method for introducing dopants into a section of the component region outside the channel stopper region.

公开(公告)号：US20190081142A1

公开(公告)日：2019-03-14

申请号：US16189858

申请日：2018-11-13

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Franz-Josef Niedernostheide ,  Christian Philipp Sandow

IPC: H01L29/06 ,  H01L29/40 ,  H01L29/78 ,  H01L29/10 ,  H01L29/739 ,  H01L29/423 ,  H01L29/417 ,  H01L29/36

CPC classification number: H01L29/0696 ,  H01L29/0692 ,  H01L29/1033 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41708 ,  H01L29/41741 ,  H01L29/42364 ,  H01L29/42376 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7813

Abstract: A power semiconductor device includes a semiconductor body coupled to first and second load terminal structures, first and second cells electrically connected to the first load terminal structure and to a drift region, the drift region having a first conductivity type; a first mesa in the first cell and including: a port region electrically connected to the first load terminal structure, and a channel region coupled to the drift region; a second mesa in the second cell and including: a port region of the opposite conductivity type and electrically connected to the first load terminal structure, and a channel region coupled to the drift region. Each mesa is spatially confined, in a direction perpendicular to a direction of the load current within the respective mesa, by an insulation structure. The insulation structure houses a control electrode structure, and a guidance electrode arranged between the mesas.

公开(公告)号：US20180138301A1

公开(公告)日：2018-05-17

申请号：US15854478

申请日：2017-12-26

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Franz-Josef Niedernostheide ,  Christian Philipp Sandow

IPC: H01L29/739 ,  H01L29/10 ,  H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/7397 ,  H01L29/0607 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/0865 ,  H01L29/1033 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7813

Abstract: A power semiconductor transistor includes a trench extending into a semiconductor body along a vertical direction and having first and second trench sidewalls and a trench bottom, an electrode in the trench electrically insulated from the semiconductor body, drift and source regions of a first conductivity type, a semiconductor channel region of a second conductivity type laterally adjacent the first trench sidewall and separating the source and drift regions, and a guidance zone. The guidance zone includes a bar section of the second conductivity type extending along the second trench sidewall or along a sidewall of another trench in the vertical direction to a depth in the semiconductor body deeper than the trench bottom, and a plateau section of the second conductivity type adjoining the bar section and extending under the trench bottom towards the semiconductor channel region. The plateau section has at least one opening below the channel region.

公开(公告)号：US09899377B2

公开(公告)日：2018-02-20

申请号：US15299645

申请日：2016-10-21

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Franz-Josef Niedernostheide ,  Frank Dieter Pfirsch ,  Francisco Javier Santos Rodriguez ,  Stephan Voss ,  Wolfgang Wagner

IPC: H01L27/088 ,  H01L21/8234 ,  H01L27/082 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L29/739 ,  H01L29/66 ,  H01L29/749 ,  H01L29/08 ,  H01L27/06

CPC classification number: H01L27/088 ,  H01L21/823418 ,  H01L21/82345 ,  H01L21/823475 ,  H01L27/0629 ,  H01L27/082 ,  H01L29/0607 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/4983 ,  H01L29/6634 ,  H01L29/66348 ,  H01L29/66363 ,  H01L29/7393 ,  H01L29/7396 ,  H01L29/7397 ,  H01L29/749

Abstract: A semiconductor device and a method for producing thereof is provided. The semiconductor device includes a plurality of device cells, each comprising a body region, a source region, and a gate electrode adjacent to the body region and dielectrically insulated from the body region by a gate dielectric; and an electrically conductive gate layer comprising the gate electrodes or electrically connected to the gate electrodes of the plurality of device cells. The gate layer is electrically connected to a gate conductor and includes at least one of an increased resistance region and a decreased resistance region.