Nonvolatile semiconductor memory device
    42.
    发明申请
    Nonvolatile semiconductor memory device 有权
    非易失性半导体存储器件

    公开(公告)号:US20070249120A1

    公开(公告)日:2007-10-25

    申请号:US11785694

    申请日:2007-04-19

    IPC分类号: H01L21/336 H01L29/94

    CPC分类号: H01L27/115 H01L27/11521

    摘要: A nonvolatile semiconductor memory device includes a first dielectric layer formed on the major surface of a semiconductor substrate, a floating gate electrode layer formed on the first dielectric layer, a second dielectric layer obtained by sequentially forming, on the floating gate electrode layer, a lower dielectric film mainly containing silicon and nitrogen, an intermediate dielectric film, and an upper dielectric film mainly containing silicon and nitrogen, a control gate electrode layer formed on the second dielectric layer, and a buried dielectric layer formed by covering the two side surfaces in the gate width direction of the stacked structure including the above-mentioned layers. The nonvolatile semiconductor memory device further includes a silicon oxide film formed near the buried dielectric layer in the interface between the floating gate electrode layer and lower dielectric film.

    摘要翻译: 非易失性半导体存储器件包括形成在半导体衬底的主表面上的第一电介质层,形成在第一电介质层上的浮栅电极层,通过在浮栅电极层上依次形成下层 主要含有硅和氮的电介质膜,中间电介质膜和主要含有硅和氮的上电介质膜,形成在第二介电层上的控制栅极电极层和通过覆盖第二电介质层中的两个侧表面而形成的掩埋电介质层 包括上述层的层叠结构的栅极宽度方向。 非易失性半导体存储器件还包括在浮置栅极电极层和下部电介质膜之间的界面中形成在掩埋电介质层附近的氧化硅膜。

    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    43.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体存储器件及其制造方法

    公开(公告)号:US20070235799A1

    公开(公告)日:2007-10-11

    申请号:US11763070

    申请日:2007-06-14

    IPC分类号: H01L29/788

    摘要: A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.

    摘要翻译: 半导体存储器件包括半导体衬底,隔离绝缘膜,填充在形成于半导体衬底中的多个沟槽中,以限定多个元件形成区域;多晶硅浮置栅极,通过第一绝缘层设置在每个元件形成区域上; 设置在浮置栅极上的第二绝缘膜,包含设置在第二绝缘膜上的金属元件,多晶硅控制栅极和设置在半导体衬底中的源极/漏极区域,包含金属的多晶硅导电层 元件和由浮置栅极中包含的硅元素和控制栅极组成的混合氧化物材料的硅酸盐层和包含在第二绝缘膜中的金属元素构成的互扩散层设置在每个浮动栅极的表面上 门和控制门。

    Nonvolatile semiconductor memory and manufacturing method for the same
    44.
    发明授权
    Nonvolatile semiconductor memory and manufacturing method for the same 有权
    非易失性半导体存储器及其制造方法相同

    公开(公告)号:US07247916B2

    公开(公告)日:2007-07-24

    申请号:US11267334

    申请日:2005-11-07

    IPC分类号: H01L29/76

    摘要: The memory cell matrix encompasses (a) a plurality device isolation films running along column direction, (b) first conductive layers arranged along row and column-directions, adjacent groups of the first conductive layers are isolated from each other by the device isolation film disposed between the adjacent groups, (c) lower inter-electrode dielectrics arranged respectively on crests of the corresponding first conductive layers, (d) an upper inter-electrode dielectric arranged on the lower inter-electrode dielectric made of insulating material different from the lower inter-electrode dielectrics, and (e) second conductive layers running along the row-direction, arranged on the upper inter-electrode dielectric.

    摘要翻译: 存储单元矩阵包括(a)沿着列方向延伸的多个器件隔离膜,(b)沿着行和列方向布置的第一导电层,相邻的第一导电层组通过设置的隔离膜相互隔离 (c)分别布置在相应的第一导电层的顶部上的下部电极间电介质,(d)布置在由绝缘材料制成的下部电极间电介质上的上部电极间电介质, - 电极介质,和(e)布置在上部电极间电介质上的沿着行方向延伸的第二导电层。

    Vacuum pumping system and method for monitoring of the same
    46.
    发明申请
    Vacuum pumping system and method for monitoring of the same 审中-公开
    真空泵系统及其监控方法

    公开(公告)号:US20050260081A1

    公开(公告)日:2005-11-24

    申请号:US11190941

    申请日:2005-07-28

    CPC分类号: C23C16/4412

    摘要: A vacuum pumping system includes: an evacuation conduit, having a sequence of monitoring zones serially assigned in an exhaust direction; sensors respectively provided to the monitoring zones and independently detecting the conditions of the monitoring zones; heaters respectively provided to the monitoring zones and being paired with the sensors; and a control unit receiving data signals from the sensors, comparing the data signals with a threshold value, and when the data signals from a specific sensor exceed the threshold value, selectively supplying heating power to a heater of the monitoring zone where the specific sensor is provided.

    摘要翻译: 真空泵系统包括:排气管,具有在排气方向上串联排列的一系列监测区; 传感器分别提供给监控区并独立检测监控区的状况; 加热器分别设置在监控区域并与传感器配对; 以及控制单元,其从所述传感器接收数据信号,将所述数据信号与阈值进行比较,并且当来自特定传感器的数据信号超过所述阈值时,选择性地向所述监测区域的加热器供应加热功率, 提供。

    Nonvolatile semiconductor memory and manufacturing method for the same
    48.
    发明申请
    Nonvolatile semiconductor memory and manufacturing method for the same 有权
    非易失性半导体存储器及其制造方法相同

    公开(公告)号:US20050002231A1

    公开(公告)日:2005-01-06

    申请号:US10724103

    申请日:2003-12-01

    摘要: The memory cell matrix encompasses (a) a plurality device isolation films running along column direction, (b) first conductive layers arranged along row and column-directions, adjacent groups of the first conductive layers are isolated from each other by the device isolation film disposed between the adjacent groups, (c) lower inter-electrode dielectrics arranged respectively on crests of the corresponding first conductive layers, (d) an upper inter-electrode dielectric arranged on the lower inter-electrode dielectric made of insulating material different from the lower inter-electrode dielectrics, and (e) second conductive layers running along the row-direction, arranged on the upper inter-electrode dielectric.

    摘要翻译: 存储单元矩阵包括(a)沿着列方向延伸的多个器件隔离膜,(b)沿着行和列方向布置的第一导电层,相邻的第一导电层组通过设置的隔离膜相互隔离 (c)分别布置在相应的第一导电层的顶部上的下部电极间电介质,(d)布置在由绝缘材料制成的下部电极间电介质上的上部电极间电介质, - 电极介质,和(e)布置在上部电极间电介质上的沿着行方向延伸的第二导电层。