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公开(公告)号:US12028962B2
公开(公告)日:2024-07-02
申请号:US17819716
申请日:2022-08-15
Applicant: Micron Technology, Inc.
Inventor: Xiaopeng Qu , Hyunsuk Chun
IPC: H05K1/02 , H01L23/467 , H01L23/473 , H01R12/71 , H01R12/72 , H01R12/73 , H05K7/20 , H05K3/36
CPC classification number: H05K1/0203 , H01L23/473 , H01R12/724 , H05K7/20145 , H01L23/467 , H01R12/716 , H01R12/737 , H05K7/20163 , H05K7/20309 , H05K7/20318 , H05K7/20327 , H05K7/205
Abstract: A semiconductor component system includes a motherboard and a cooling system mounted to the motherboard. The cooling system includes sidewalls projecting from the motherboard. A sub-motherboard extends between the sidewalls and is spaced apart from the motherboard. The sidewalls and the sub-motherboard define a cooling channel over the motherboard. A connector is attached to the sub-motherboard and is configured to receive a semiconductor device daughterboard. The connector has contacts to electrically couple the semiconductor device daughterboard to the sub-motherboard.
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公开(公告)号:US12015011B2
公开(公告)日:2024-06-18
申请号:US17562290
申请日:2021-12-27
Applicant: Micron Technology, Inc.
Inventor: Hyunsuk Chun , Xiaopeng Qu
IPC: H01L21/31 , H01L21/56 , H01L23/31 , H01L23/373 , H01L25/00 , H01L25/065
CPC classification number: H01L25/0657 , H01L21/56 , H01L23/3128 , H01L23/373 , H01L25/50 , H01L2225/06589
Abstract: Semiconductor device assemblies are provided with one or more layers of thermally conductive material disposed between adjacent semiconductor dies in a vertical stack. The thermally conductive material can be configured to conduct heat generated by one or more of the semiconductor dies in laterally outward towards an outer edge of the assembly. The layer of thermally conductive material can comprise one or more allotropes of carbon, such as diamond, graphene, graphite, carbon nanotubes, or a combination thereof. The layer of thermally conductive material can be provided via deposition (e.g., sputtering, PVD, CVD, or ALD), or via adhering a film comprising the layer of thermally conductive material to one or more of the semiconductor dies.
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43.
公开(公告)号:US20230154823A1
公开(公告)日:2023-05-18
申请号:US18154615
申请日:2023-01-13
Applicant: Micron Technology, Inc.
Inventor: Hyunsuk Chun , Xiaopeng Qu , Chan H. Yoo
IPC: H01L23/373 , H01L23/00 , H01L23/367 , H01L23/498
CPC classification number: H01L23/373 , H01L24/16 , H01L23/367 , H01L23/498 , H01L21/481
Abstract: Semiconductor device assemblies are provided with a package substrate including one or more layers of thermally conductive material configured to conduct heat generated by one or more of semiconductor dies of the assemblies laterally outward towards an outer edge of the assembly. The layer of thermally conductive material can comprise one or more allotropes of carbon, such as diamond, graphene, graphite, carbon nanotubes, or a combination thereof. The layer of thermally conductive material can be provided via deposition (e.g., sputtering, PVD, CVD, or ALD), via adhering a film comprising the layer of thermally conductive material to an outer surface of the package substrate, or via embedding a film comprising the layer of thermally conductive material to within the package substrate.
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公开(公告)号:US11617284B2
公开(公告)日:2023-03-28
申请号:US17201085
申请日:2021-03-15
Applicant: Micron Technology, Inc.
Inventor: Xiaopeng Qu
Abstract: Assemblies include at least one substrate, at least one electronic device coupled to the substrate, and heat dissipation elements. The heat dissipation elements comprise at least one heat spreader in communication with the at least one electronic device and at least one heat sink in communication with the at least one heat spreader. Methods of dissipating heat energy include transferring heat energy from memory devices to heat spreaders positioned adjacent to the memory devices and transferring the heat energy from the heat spreaders to a heat sink.
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公开(公告)号:US11419239B2
公开(公告)日:2022-08-16
申请号:US16941212
申请日:2020-07-28
Applicant: Micron Technology, Inc.
Inventor: Xiaopeng Qu , Hyunsuk Chun
IPC: H05K7/20 , H01L23/473 , H01R12/72 , H01L23/467 , H05K1/02
Abstract: A semiconductor component system includes a motherboard and a cooling system mounted to the motherboard. The cooling system includes sidewalls projecting from the motherboard. A sub-motherboard extends between the sidewalls and is spaced apart from the motherboard. The sidewalls and the sub-motherboard define a cooling channel over the motherboard. A connector is attached to the sub-motherboard and is configured to receive a semiconductor device daughterboard. The connector has contacts to electrically couple the semiconductor device daughterboard to the sub-motherboard.
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公开(公告)号:US11372043B2
公开(公告)日:2022-06-28
申请号:US16546648
申请日:2019-08-21
Applicant: Micron Technology, Inc.
Inventor: Xiaopeng Qu , Amy R. Griffin , Wesley J. Orme
IPC: G01R31/28
Abstract: Heat spreaders for use in semiconductor device testing, such as burn-in testing, are disclosed herein. In one embodiment, a heat spreader is configured to be coupled to a burn-in testing board including a plurality of sockets. The heat spreader includes (i) a frame having a plurality of apertures, and (ii) a plurality of heat sinks movably positioned within corresponding ones of the apertures. When the heat spreader is coupled to the burn-in testing board, the heat sinks are configured to extend into corresponding ones of the sockets to thermally contact semiconductor devices positioned within the sockets. The heat spreader can promote a uniform temperature gradient across the burn-in board during testing of the semiconductor devices.
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47.
公开(公告)号:US11348857B2
公开(公告)日:2022-05-31
申请号:US16902390
申请日:2020-06-16
Applicant: Micron Technology, Inc.
Inventor: Xiaopeng Qu
IPC: H01L23/367 , H01L23/31 , H01L23/373 , H01L23/538 , H01L21/50
Abstract: A microelectronic device package may include one or more semiconductor dice coupled to a substrate. The microelectronic device package may further include a lid coupled to the substrate, the lid defining a volume over and around the one or more semiconductor die. The microelectronic device package may further include a thermally conductive dielectric filler material substantially filling the volume defined around the semiconductor die.
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公开(公告)号:US20210407964A1
公开(公告)日:2021-12-30
申请号:US16939449
申请日:2020-07-27
Applicant: Micron Technology, Inc.
Inventor: Hyunsuk Chun , Xiaopeng Qu
IPC: H01L25/065 , H01L23/31 , H01L23/373 , H01L25/00 , H01L21/56
Abstract: Semiconductor device assemblies are provided with one or more layers of thermally conductive material disposed between adjacent semiconductor dies in a vertical stack. The thermally conductive material can be configured to conduct heat generated by one or more of the semiconductor dies in laterally outward towards an outer edge of the assembly. The layer of thermally conductive material can comprise one or more allotropes of carbon, such as diamond, graphene, graphite, carbon nanotubes, or a combination thereof. The layer of thermally conductive material can be provided via deposition (e.g., sputtering, PVD, CVD, or ALD), or via adhering a film comprising the layer of thermally conductive material to one or more of the semiconductor dies.
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公开(公告)号:US20210384042A1
公开(公告)日:2021-12-09
申请号:US16895751
申请日:2020-06-08
Applicant: Micron Technology, Inc.
Inventor: Xiaopeng Qu , Hyunsuk Chun , Brandon P. Wirz , Andrew M. Bayless
IPC: H01L21/447 , H01L21/67 , H01L21/033
Abstract: This patent application relates to methods and apparatus for temperature modification and reduction of contamination in bonding stacked microelectronic devices with heat applied from a bond head of a thermocompression bonding tool. The stack is substantially enclosed within a skirt carried by the bond head to reduce heat loss and contaminants from the stack, and heat may be added from the skirt.
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公开(公告)号:US11011452B2
公开(公告)日:2021-05-18
申请号:US16205151
申请日:2018-11-29
Applicant: Micron Technology, Inc.
Inventor: Xiaopeng Qu , Amy R. Griffin , Hyunsuk Chun
IPC: H01L23/433 , H01L23/367 , H01L23/31
Abstract: A memory system having heat spreaders with different arrangements of projections are provided. In some embodiments, the memory system comprises a substrate, a first semiconductor device attached to a first side of the substrate, a second semiconductor device attached to a second side of the substrate, a first heat spreader attached to the first semiconductor device, and a second heat spreader attached to the second semiconductor device. The first heat spreader has a plurality of first projections facing a first direction and positioned in a first arrangement, and the second heat spreader has a plurality of second projections facing a second direction and positioned in a second arrangement different than the first arrangement. In some embodiments, the first projections are aligned with a majority of the second projections in a first direction and are offset with a majority of the second projections in a second direction.
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