公开(公告)号：US20120205761A1

公开(公告)日：2012-08-16

申请号：US13453928

申请日：2012-04-23

Applicant: Rajiv Yadav Ranjan ,  Parviz Keshtbod

Inventor： Rajiv Yadav Ranjan ,  Parviz Keshtbod

IPC: H01L29/82

CPC classification number: H01L43/10 ,  B82Y10/00 ,  G11C11/161 ,  G11C11/1675 ,  H01L27/228

Abstract: A non-volatile current-switching magnetic memory element includes a bottom electrode, a pinning layer formed on top of the bottom electrode, and a fixed layer formed on top of the pinning layer. The memory element further includes a tunnel layer formed on top of the pinning layer, a first free layer formed on top of the tunnel layer, a granular film layer formed on top of the free layer, a second free layer formed on top of the granular film layer, a cap layer formed on top of the second layer and a top electrode formed on top of the cap layer.

Abstract translation: 非易失性电流切换磁存储元件包括底电极，形成在底电极顶部的钉扎层和形成在钉扎层顶部上的固定层。 存储元件还包括形成在钉扎层顶部的隧道层，形成在隧道层顶部上的第一自由层，形成在自由层顶部上的颗粒膜层，形成在颗粒状的顶部上的第二自由层 膜层，形成在第二层的顶部上的盖层和形成在盖层的顶部上的顶部电极。

公开(公告)号：US20120068236A1

公开(公告)日：2012-03-22

申请号：US13305668

申请日：2011-11-28

Applicant: Rajiv Yadav Ranjan ,  Petro Estakhri ,  Mahmud Assar ,  Parviz Keshtbod

Inventor： Rajiv Yadav Ranjan ,  Petro Estakhri ,  Mahmud Assar ,  Parviz Keshtbod

IPC: H01L29/82 ,  H01L43/12

CPC classification number: H01L27/228 ,  B82Y10/00 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  H01L43/08

Abstract: A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.

公开(公告)号：US08120949B2

公开(公告)日：2012-02-21

申请号：US12182996

申请日：2008-07-30

Applicant: Rajiv Yadav Ranjan ,  Parviz Keshtbod ,  Mahmud Assar

Inventor： Rajiv Yadav Ranjan ,  Parviz Keshtbod ,  Mahmud Assar

IPC: G11C11/14

CPC classification number: G06F12/0246 ,  G11C11/15 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1675 ,  G11C14/00 ,  H01L27/105 ,  H01L27/224

Abstract: A flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die.

Abstract translation: 闪存RAM存储器包括形成在单片模块上的非易失性随机存取存储器（RAM）和形成在非易失性RAM，非易失性页面模式存储器和非易失性页面模式存储器之上的非易失性页面模式存储器， 易失性RAM驻留在单片模具上。

公开(公告)号：US20120026785A1

公开(公告)日：2012-02-02

申请号：US13253918

申请日：2011-10-05

Applicant: Rajiv Yadav Ranjan ,  Parviz Keshtbod ,  Roger Klas Malmhall

Inventor： Rajiv Yadav Ranjan ,  Parviz Keshtbod ,  Roger Klas Malmhall

IPC: G11C11/00 ,  H01L29/82

CPC classification number: B82Y25/00 ,  B82Y40/00 ,  G11C11/161 ,  H01F10/3236 ,  H01F10/3254 ,  H01F10/3272 ,  H01F41/303 ,  H01L27/228 ,  H01L43/08

Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.

公开(公告)号：US20090109739A1

公开(公告)日：2009-04-30

申请号：US12255624

申请日：2008-10-21

Applicant: Rajiv Yadav RANJAN ,  Roger Klaus Malmhall ,  Parviz Keshtbod

Inventor： Rajiv Yadav RANJAN ,  Roger Klaus Malmhall ,  Parviz Keshtbod

IPC: G11C11/02

CPC classification number: H01L27/222 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/5607 ,  G11C19/0808 ,  H01L43/08

Abstract: A multi-state low-current-switching magnetic memory element (magnetic memory element) comprising a free layer, two stacks, and a magnetic tunneling junction is disclosed. The stacks and magnetic tunneling junction are disposed upon surfaces of the free layer, with the magnetic tunneling junction located between the stacks. The stacks pin magnetic domains within the free layer, creating a free layer domain wall. A current passed from stack to stack pushes the domain wall, repositioning the domain wall within the free layer. The position of the domain wall relative to the magnetic tunnel junction corresponds to a unique resistance value, and passing current from a stack to the magnetic tunnel junction reads the magnetic memory element's resistance. Thus, unique memory states may be achieved by moving the domain wall.

Abstract translation: 公开了一种包括自由层，两个堆叠和磁性隧道结的多状态低电流切换磁存储元件（磁存储元件）。 堆叠和磁性隧道结设置在自由层的表面上，磁性隧道结位于堆叠之间。 堆叠在自由层内引导磁畴，产生自由层畴壁。 从堆栈传递到堆栈的电流推动域壁，重新定位自由层内的域壁。 畴壁相对于磁性隧道结的位置对应于唯一的电阻值，并且将电流从堆叠传递到磁性隧道结读取磁存储元件的电阻。 因此，可以通过移动域壁来实现唯一的记忆状态。

公开(公告)号：US20080191251A1

公开(公告)日：2008-08-14

申请号：US11739648

申请日：2007-04-24

Applicant: Rajiv Yadav Ranjan ,  Parviz Keshtbod

Inventor： Rajiv Yadav Ranjan ,  Parviz Keshtbod

IPC: G11C11/22 ,  H01L43/12

CPC classification number: H01L43/10 ,  B82Y10/00 ,  G11C11/161 ,  G11C11/1675 ,  H01L27/228

Abstract: One embodiment of the present invention includes a an embodiment of the present invention includes a non-volatile current-switching magnetic memory element including a bottom electrode; a pinning layer formed on top of the bottom electrode; a fixed layer formed on top of the pinning layer; a tunnel layer formed on top of the pinning layer; a first free layer formed on top of the tunnel layer; a granular film layer formed on top of the free layer; a second free layer formed on top of the granular film layer; a cap layer formed on top of the second layer; and a top electrode formed on top of the cap layer.

Abstract translation: 本发明的一个实施例包括本发明的一个实施例，其包括一个包括底部电极的非易失性电流切换磁存储元件; 形成在底部电极顶部的钉扎层; 形成在钉扎层顶部的固定层; 形成在钉扎层之上的隧道层; 形成在隧道层顶部的第一自由层; 形成在自由层顶部的粒状膜层; 形成在所述粒状膜层顶部的第二自由层; 盖层，形成在第二层的顶部; 以及形成在盖层顶部上的顶部电极。

公开(公告)号：US06587382B1

公开(公告)日：2003-07-01

申请号：US10175928

申请日：2002-06-19

Applicant: Petro Estakhri ,  Siamack Nemazie ,  Mahmud Assar ,  Parviz Keshtbod

Inventor： Petro Estakhri ,  Siamack Nemazie ,  Mahmud Assar ,  Parviz Keshtbod

IPC: G11C1604

CPC classification number: G11C16/102 ,  G06F3/0604 ,  G06F3/0607 ,  G06F3/064 ,  G06F3/0652 ,  G06F3/0679 ,  G06F11/1068 ,  G06F12/0246 ,  G11C8/12 ,  G11C16/08

Abstract: An embodiment of the present invention is disclosed to include a nonvolatile memory system for controlling erase operations performed on a nonvolatile memory array comprised of rows and columns, the nonvolatile memory array stores digital information organized into blocks with each block having one or more sectors of information and each sector having a user data field and an extension field and each sector stored within a row of the memory array. A controller circuit is coupled to a host circuit and is operative to perform erase operations on the nonvolatile memory array, the controller circuit erases an identified sector of information having a particular user data field and a particular extension field wherein the particular user field and the particular extension field are caused to be erased separately.

公开(公告)号：US09047968B2

公开(公告)日：2015-06-02

申请号：US14212970

申请日：2014-03-14

Applicant: Parviz Keshtbod

Inventor： Parviz Keshtbod

IPC: G11C11/02 ,  G11C11/14 ,  G11C11/15 ,  G11C11/16 ,  B82Y10/00 ,  G11C11/56 ,  H01L27/22 ,  H01L43/08

CPC classification number: G11C11/1675 ,  B82Y10/00 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/5607 ,  G11C2211/5615 ,  H01L27/222 ,  H01L27/228 ,  H01L43/08

Abstract: A multi-state current-switching magnetic memory element includes a stack of magnetic tunneling junction (MTJ) separated by a non-magnetic layer for storing more than one bit of information, wherein different levels of current applied to the memory element cause switching to different states.

Abstract translation: 多状态电流切换磁存储元件包括由用于存储多于一位的信息的非磁性层分开的磁隧道结（MTJ）堆叠，其中施加到存储元件的不同电流电平导致切换到不同的 状态。

公开(公告)号：US08883520B2

公开(公告)日：2014-11-11

申请号：US13530381

申请日：2012-06-22

Applicant: Kimihiro Satoh ,  Dong Ha Jung ,  Ebrahim Abedifard ,  Parviz Keshtbod ,  Yiming Huai ,  Jing Zhang

Inventor： Kimihiro Satoh ,  Dong Ha Jung ,  Ebrahim Abedifard ,  Parviz Keshtbod ,  Yiming Huai ,  Jing Zhang

IPC: H01L21/00

CPC classification number: H01L43/02 ,  H01L27/222 ,  H01L43/12

Abstract: Methods and structures are described to reduce metallic redeposition material in the memory cells, such as MTJ cells, during pillar etching. One embodiment forms metal studs on top of the landing pads in a dielectric layer that otherwise covers the exposed metal surfaces on the wafer. Another embodiment patterns the MTJ and bottom electrode separately. The bottom electrode mask then covers metal under the bottom electrode. Another embodiment divides the pillar etching process into two phases. The first phase etches down to the lower magnetic layer, then the sidewalls of the barrier layer are covered with a dielectric material which is then vertically etched. The second phase of the etching then patterns the remaining layers. Another embodiment uses a hard mask above the top electrode to etch the MTJ pillar until near the end point of the bottom electrode, deposits a dielectric, then vertically etches the remaining bottom electrode.

Abstract translation: 描述了方法和结构以在柱蚀刻期间减少存储器单元（例如MTJ电池）中的金属沉积材料。 一个实施例在位于晶片上暴露的金属表面的电介质层中的着陆焊盘的顶部上形成金属螺柱。 另一个实施例分别对MTJ和底部电极进行图案化。 底部电极掩模然后覆盖底部电极下面的金属。 另一实施例将柱蚀刻工艺分为两个阶段。 第一阶段蚀刻到较低的磁性层，然后阻挡层的侧壁被电介质材料覆盖，然后将其垂直蚀刻。 蚀刻的第二阶段然后对剩余的层进行图案化。 另一个实施例使用顶部电极上方的硬掩模来蚀刻MTJ柱直到靠近底部电极的端点，沉积电介质，然后垂直蚀刻剩余的底部电极。

公开(公告)号：US20140192591A1

公开(公告)日：2014-07-10

申请号：US14212970

申请日：2014-03-14

Applicant: Parviz Keshtbod

Inventor： Parviz Keshtbod

IPC: G11C11/16

CPC classification number: G11C11/1675 ,  B82Y10/00 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/5607 ,  G11C2211/5615 ,  H01L27/222 ,  H01L27/228 ,  H01L43/08

Abstract: A multi-state current-switching magnetic memory element includes a stack of magnetic tunneling junction (MTJ) separated by a non-magnetic layer for storing more than one bit of information, wherein different levels of current applied to the memory element cause switching to different states.

Abstract translation: 多状态电流切换磁存储元件包括由用于存储多于一位的信息的非磁性层分开的磁隧道结（MTJ）堆叠，其中施加到存储元件的不同电流电平导致切换到不同的 状态。