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    SEMICONDUCTOR DEVICE
    41.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20200006567A1

    公开(公告)日：2020-01-02

    申请号：US16484148

    申请日：2018-02-07

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Yuta ENDO ,  Hiromi SAWAI ,  Hajime KIMURA ,  Shunpei YAMAZAKI

    IPC: H01L29/786 ,  H01L29/66 ,  H01L21/02

    Abstract: A high-performance and highly reliable semiconductor device can be provided.The semiconductor device includes a first oxide; a second oxide over the first oxide; a source electrode and a drain electrode over the second oxide; a third oxide over the second oxide, the source electrode, and the drain electrode; a fourth oxide over the third oxide; a gate insulating film over the fourth oxide; and a gate electrode over the gate insulating film. The band gap of the first oxide is substantially the same as the band gap of the fourth oxide, the band gap of the second oxide is substantially the same as the band gap of the third oxide, the band gap of the first oxide is larger than the band gap of the second oxide, and the fourth oxide is less likely to transmit oxygen than the third oxide.

    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    42.
    发明申请
    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开

    公开(公告)号：US20200006402A1

    公开(公告)日：2020-01-02

    申请号：US16565546

    申请日：2019-09-10

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Yuta ENDO

    IPC: H01L27/12 ,  G02F1/1368

    Abstract: A semiconductor device with high aperture ratio is provided. The semiconductor device includes a transistor and a capacitor having a pair of electrodes. An oxide semiconductor layer formed over the same insulating surface is used for a channel formation region of the transistor and one of the electrodes of the capacitor. The other electrode of the capacitor is a transparent conductive film. One electrode of the capacitor is electrically connected to a wiring formed over the insulating surface over which a source electrode or a drain electrode of the transistor is provided, and the other electrode of the capacitor is electrically connected to one of the source electrode and the drain electrode of the transistor.

    SEMICONDUCTOR DEVICE
    43.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20190189622A1

    公开(公告)日：2019-06-20

    申请号：US16275380

    申请日：2019-02-14

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Tomoaki ATSUMI ,  Shuhei NAGATSUKA ,  Tamae MORIWAKA ,  Yuta ENDO

    IPC: H01L27/115 ,  H01L29/24 ,  G11C11/24 ,  H01L27/06 ,  H01L27/1156 ,  H01L29/786 ,  G11C11/408 ,  G11C11/403 ,  G11C8/14 ,  G11C7/16 ,  H01L27/11551

    Abstract: [Problem] To provide a semiconductor device suitable for miniaturization. To provide a highly reliable semiconductor device. To provide a semiconductor device with improved operating speed.[Solving Means] A semiconductor device including a memory cell including first to cth (c is a natural number of 2 or more) sub memory cells, wherein: the jth sub memory cell includes a first transistor, a second transistor, and a capacitor; a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor include an oxide semiconductor; one of terminals of the capacitor is electrically connected to a gate electrode included in the second transistor; the gate electrode included in the second transistor is electrically connected to one of a source electrode and a drain electrode which are included in the first transistor; and when j≥2, the jth sub memory cell is arranged over the j-1th sub memory cell.[Selected Drawing] FIG. 8

    SEMICONDUCTOR DEVICE
    44.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20180269327A1

    公开(公告)日：2018-09-20

    申请号：US15983145

    申请日：2018-05-18

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Yuta ENDO

    IPC: H01L29/786 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/10

    CPC classification number: H01L29/7869 ,  H01L21/823412 ,  H01L27/088 ,  H01L27/1225 ,  H01L29/1033 ,  H01L29/78648 ,  H01L29/78696

    Abstract: A high-performance semiconductor device with high reliability is provided. The semiconductor device includes a first transistor, a second transistor, a first metal oxide covering at least part of the first transistor, an insulating film over the first transistor and the second transistor, and a second metal oxide over the insulating film. The first transistor includes a first gate electrode, a first gate insulating film, a first oxide, a first source electrode, a first drain electrode, a second gate insulating film, and a second gate electrode. The second transistor includes a third gate electrode, a third gate insulating film, a second oxide, a second source electrode, a second drain electrode, a fourth gate insulating film, and a fourth gate electrode. The first gate insulating film and the second gate insulating film are in contact with the first metal oxide.

    SEMICONDUCTOR DEVICE
    49.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20170243874A1

    公开(公告)日：2017-08-24

    申请号：US15591150

    申请日：2017-05-10

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Tomoaki ATSUMI ,  Shuhei NAGATSUKA ,  Tamae MORIWAKA ,  Yuta ENDO

    IPC: H01L27/115 ,  H01L29/24 ,  G11C11/24 ,  H01L29/786

    CPC classification number: H01L27/115 ,  G11C7/16 ,  G11C8/14 ,  G11C11/24 ,  G11C11/403 ,  G11C11/4085 ,  H01L27/0688 ,  H01L27/11551 ,  H01L27/1156 ,  H01L29/24 ,  H01L29/7869

    Abstract: [Problem] To provide a semiconductor device suitable for miniaturization. To provide a highly reliable semiconductor device. To provide a semiconductor device with improved operating speed.[Solving Means] A semiconductor device including a memory cell including first to cth (c is a natural number of 2 or more) sub memory cells, wherein: the jth sub memory cell includes a first transistor, a second transistor, and a capacitor; a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor include an oxide semiconductor; one of terminals of the capacitor is electrically connected to a gate electrode included in the second transistor; the gate electrode included in the second transistor is electrically connected to one of a source electrode and a drain electrode which are included in the first transistor; and when j≧2, the jth sub memory cell is arranged over the j−1th sub memory cell.

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