METHOD OF FORMING A DIELECTRIC LAYER PATTERN AND METHOD OF MANUFACTURING A NON-VOLATILE MEMORY DEVICE USING THE SAME
    41.
    发明申请
    METHOD OF FORMING A DIELECTRIC LAYER PATTERN AND METHOD OF MANUFACTURING A NON-VOLATILE MEMORY DEVICE USING THE SAME 失效
    形成介质层图案的方法和使用其制造非易失性存储器件的方法

    公开(公告)号:US20090155968A1

    公开(公告)日:2009-06-18

    申请号:US12336863

    申请日:2008-12-17

    IPC分类号: H01L21/336 H01L21/311

    摘要: In a method of forming a dielectric layer pattern, lower patterns are formed on a substrate. A first dielectric layer is formed on sidewalls and upper surfaces of the lower patterns and a surface of the substrate. A mask pattern is formed on the first dielectric layer to partially expose the first dielectric layer. The exposed first dielectric layer on upper surfaces and upper sidewalls of the lower patterns is partially removed and the removed first dielectric layer is deposited on surfaces of the first dielectric layer between the lower patterns, to form a second dielectric layer having a thickness greater than that of the first dielectric layer. The second dielectric layer on the sidewalls of the lower patterns and the substrate is etched to form a dielectric layer pattern. Accordingly, damage to the underlying layer may be reduced, and an unnecessary dielectric layer may be completely removed.

    摘要翻译: 在形成电介质层图案的方法中,在基板上形成下图案。 第一电介质层形成在下图案的侧壁和上表面以及基板的表面上。 在第一电介质层上形成掩模图案以部分地暴露第一介电层。 部分地去除在下图案的上表面和上侧壁上的暴露的第一电介质层,并且将去除的第一介电层沉积在下图案之间的第一介电层的表面上,以形成厚度大于其的厚度的第二电介质层。 的第一介电层。 在下图案和衬底的侧壁上的第二电介质层被蚀刻以形成电介质层图案。 因此,可能减少对下层的损伤,并且可以完全去除不需要的介电层。

    METHODS OF FORMING A METAL OXIDE LAYER PATTERN HAVING A DECREASED LINE WIDTH OF A PORTION THEREOF AND METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME
    43.
    发明申请
    METHODS OF FORMING A METAL OXIDE LAYER PATTERN HAVING A DECREASED LINE WIDTH OF A PORTION THEREOF AND METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME 审中-公开
    形成具有其部分的下降线宽度的金属氧化物层图案的方法和使用其制造半导体器件的方法

    公开(公告)号:US20080199975A1

    公开(公告)日:2008-08-21

    申请号:US12032018

    申请日:2008-02-15

    IPC分类号: H01L21/18 H01L21/3065

    摘要: Provided herein are methods of forming a metal oxide layer pattern on a substrate including providing a preliminary metal oxide layer on a substrate; etching the preliminary metal oxide layer to provide a preliminary metal oxide layer pattern, wherein the line width of the preliminary metal oxide layer pattern gradually increases in a vertically downward direction; and etching the preliminary metal oxide layer pattern to form a metal oxide layer pattern in a manner so as to decrease the line width of a lower portion of the preliminary metal oxide layer. The present invention also provides methods of manufacturing a semiconductor device including forming a metal oxide layer and a first conductive layer on a substrate; etching the metal oxide layer to provide a preliminary metal oxide layer pattern, wherein the line width of the preliminary metal oxide layer pattern gradually increase in a vertically downward direction; etching the first conductive layer to provide a first conductive layer pattern; and etching the preliminary metal oxide layer pattern to provide a metal oxide layer pattern in a manner so as to decrease the line width of a lower portion of the preliminary metal oxide layer pattern.

    摘要翻译: 本文提供了在衬底上形成金属氧化物层图案的方法,包括在衬底上提供初步金属氧化物层; 蚀刻初始金属氧化物层以提供初步金属氧化物层图案,其中预备金属氧化物层图案的线宽在垂直向下的方向上逐渐增加; 并且以使得预备金属氧化物层的下部的线宽减小的方式蚀刻初步金属氧化物层图案以形成金属氧化物层图案。 本发明还提供了制造半导体器件的方法,包括在衬底上形成金属氧化物层和第一导电层; 蚀刻金属氧化物层以提供初步金属氧化物层图案,其中初始金属氧化物层图案的线宽在垂直向下的方向上逐渐增加; 蚀刻第一导电层以提供第一导电层图案; 并且蚀刻初步金属氧化物层图案以提供金属氧化物层图案,以便减小初步金属氧化物层图案的下部的线宽度。

    Non-volatile memory devices and methods of manufacturing the same
    44.
    发明申请
    Non-volatile memory devices and methods of manufacturing the same 有权
    非易失性存储器件及其制造方法

    公开(公告)号:US20080150008A1

    公开(公告)日:2008-06-26

    申请号:US12004985

    申请日:2007-12-21

    IPC分类号: H01L29/792 H01L21/28

    CPC分类号: H01L21/28282

    摘要: Non-volatile memory devices include a tunnel insulating layer on a channel region of a substrate, a charge-trapping layer pattern on the tunnel insulating layer and a first blocking layer pattern on the charge-trapping layer pattern. Second blocking layer patterns are on the tunnel insulating layer proximate sidewalls of the charge-trapping layer pattern. The second blocking layer patterns are configured to limit lateral diffusion of electrons trapped in the charge-trapping layer pattern. A gate electrode is on the first blocking layer pattern. The second blocking layer patterns may prevent lateral diffusion of the electrons trapped in the charge-trapping layer pattern.

    摘要翻译: 非易失性存储器件包括在衬底的沟道区上的隧道绝缘层,隧道绝缘层上的电荷俘获层图案和电荷俘获层图案上的第一阻挡层图案。 第二阻挡层图案位于邻近电荷俘获层图案侧壁的隧道绝缘层上。 第二阻挡层图案被配置为限制捕获在电荷俘获层图案中的电子的横向扩散。 栅电极位于第一阻挡层图案上。 第二阻挡层图案可以防止捕获在电荷俘获层图案中的电子的横向扩散。

    Plasma display panel
    45.
    发明申请
    Plasma display panel 审中-公开
    等离子显示面板

    公开(公告)号:US20070120490A1

    公开(公告)日:2007-05-31

    申请号:US11604548

    申请日:2006-11-27

    申请人: Dong-Hyun Kim

    发明人: Dong-Hyun Kim

    IPC分类号: H01J17/02

    摘要: Provided is a plasma display panel that includes a first substrate, a second substrate facing the first substrate, a pair of discharge electrode lines which are disposed between the first substrate and the second substrate and comprise a first discharge electrode line formed by connecting a plurality of sub-electrode lines and a second discharge electrode line that faces the first discharge electrode line and is formed by connecting a plurality of sub-electrode lines, and dielectric layers that bury the discharge electrode lines. Since the dielectric layers include B2O3 and BaO, yellowness caused by the migration of a metal component included in the discharge electrode lines into the dielectric layers during a firing process can be prevented.

    摘要翻译: 提供了一种等离子体显示面板,其包括第一基板,面向第一基板的第二基板,一对放电电极线,设置在第一基板和第二基板之间,并且包括通过连接多个 子电极线和与第一放电电极线相对并且通过连接多个子电极线而形成的第二放电电极线以及掩埋放电电极线的电介质层。 由于介电层包括B 2 O 3和BaO,在烧制过程中由包含在放电电极线中的金属成分迁移到电介质层中引起的黄色可以 被阻止

    Particle adsorption chamber, sampling apparatus having a particle adsorption chamber, and sampling method using the same
    46.
    发明申请
    Particle adsorption chamber, sampling apparatus having a particle adsorption chamber, and sampling method using the same 审中-公开
    颗粒吸附室,具有颗粒吸附室的取样装置,以及采用该吸附室的采样方法

    公开(公告)号:US20070107495A1

    公开(公告)日:2007-05-17

    申请号:US11595976

    申请日:2006-11-13

    IPC分类号: G01N19/10 G01N1/22

    CPC分类号: G01N15/0272

    摘要: A particle adsorption device includes a chamber having an inlet and an outlet by which air can pass through the chamber, a support for supporting an adsorbent plate in the chamber, and at least one porous plate disposed in the chamber to control the air flow through the chamber and over a surface of the adsorbent plate. A sampling apparatus includes a particle counter which has a detector that is operative to count particles of a certain size contained in the air, the particle adsorption device, and a probe by which a sample of air is sequentially or selectively fed to the particle adsorption device and the particle counter. Thus, in a method for use in monitoring a manufacturing environment for potential contamination, particles of a certain size in the air can be counted, and particles in the air can be collected on the surface of the adsorbent plate. The collected particles can be analyzed to determine their shape and composition. Te source of the particles can be traced from data produced using the sampling apparatus.

    摘要翻译: 颗粒吸附装置包括具有入口和出口的室,空气可以通过该室,用于在室中支撑吸附板的支撑件和设置在室中的至少一个多孔板,以控制通过所述室的空气流 并且在吸附板的表面上方。 采样装置包括具有检测器的颗粒计数器,该检测器用于对包含在空气中的一定尺寸的颗粒进行计数,颗粒吸附装置以及将空气样品依次或选择性地供给至颗粒吸附装置的探针 和粒子计数器。 因此,在用于监测潜在污染的制造环境的方法中,可以对空气中的一定尺寸的颗粒进行计数,并且可以在吸附剂板的表面上收集空气中的颗粒。 可以分析收集的颗粒以确定它们的形状和组成。 可以使用采样装置产生的数据追踪颗粒的Te源。

    PLASMA DISPLAY PANEL
    47.
    发明申请
    PLASMA DISPLAY PANEL 失效
    等离子显示面板

    公开(公告)号:US20060284546A1

    公开(公告)日:2006-12-21

    申请号:US11383280

    申请日:2006-05-15

    申请人: Dong-Hyun Kim

    发明人: Dong-Hyun Kim

    IPC分类号: H01J63/04 H01J1/62

    摘要: Provided is a plasma display panel including a first substrate and a second substrate facing each other, barrier ribs that define a plurality of discharge cells, address electrodes which extend across the discharge cells and a plurality of pairs of sustain electrodes which cross the address electrodes and generate a sustain discharge. Two sustain electrodes of a sustain electrode pair each include two or more electrode portions and connection portions for electrically coupling the electrode portions. Each electrode portion has a line width B, and each connection portion has a line width S. The ratio of the line width S to the line width B is 0.20≦S/B≦0.92 to balance improved brightness with reduced power consumption for the plasma display panel. Further, the sustain electrode can be manufactured so the electrode portions are formed integrally with the connection portions to facilitate ease of manufacturing.

    摘要翻译: 提供了一种等离子体显示面板,其包括第一基板和彼此面对的第二基板,限定多个放电单元的阻挡肋,跨越放电单元延伸的寻址电极和跨越寻址电极的多对维持电极,以及 产生维持放电。 维持电极对的两个维持电极各自包括两个或更多个电极部分和用于电耦合电极部分的连接部分。 每个电极部分具有线宽B,并且每个连接部分具有线宽S.线宽S与线宽B的比值为0.20 <= S / B <= 0.92以平衡改善亮度,降低功耗 等离子体显示面板。 此外,可以制造维持电极,使得电极部分与连接部分一体地形成,以便于制造。

    Predistortion apparatus and method for compensating for a nonlinear distortion characteristic of a power amplifier using a look-up table
    49.
    发明申请
    Predistortion apparatus and method for compensating for a nonlinear distortion characteristic of a power amplifier using a look-up table 有权
    用于使用查找表补偿功率放大器的非线性失真特性的预失真装置和方法

    公开(公告)号:US20050180526A1

    公开(公告)日:2005-08-18

    申请号:US11027676

    申请日:2005-01-03

    IPC分类号: H03F1/32 H04L25/03 H04L27/36

    CPC分类号: H04L27/368

    摘要: A polynomial predistortion apparatus and method for compensating for a nonlinear distortion characteristic of a power amplifier is provided. The apparatus and method comprise an adaptation controller for determining polynomial coefficients by calculating an inverse nonlinear distortion characteristic of the power amplifier, and calculating complex predistortion gains for all possible amplitudes of an input signal using the determined polynomial coefficients; and a predistorter for receiving an input signal which is a combination of complex-modulated previous baseband input signal samples and current input signal samples, predistorting the input signal using the complex predistortion gains output from the adaptation controller, and outputting the predistorted input signal to the power amplifier.

    摘要翻译: 提供了一种用于补偿功率放大器的非线性失真特性的多项式预失真装置和方法。 该装置和方法包括:一个自适应控制器,用于通过计算功率放大器的反非线性失真特性来确定多项式系数;以及使用所确定的多项式系数来计算输入信号的所有可能振幅的复数预失真增益; 以及预失真器,用于接收作为复调制的先前基带输入信号样本和当前输入信号采样的组合的输入信号,使用从适配控制器输出的复数预失真增益来预失真输入信号,并将预失真输入信号输出到 功率放大器。