Systems and methods for DSP fast boot

    公开(公告)号:US12022184B2

    公开(公告)日:2024-06-25

    申请号:US18119142

    申请日:2023-03-08

    Applicant: Snap Inc.

    CPC classification number: H04N23/617 H04N23/65 H04N23/71 H04N23/73

    Abstract: System, methods, devices, and instructions are described for fast boot of a processor as part of camera operation. In some embodiments, in response to a camera input, a digital signal processor (DSP) of a device is booted using a first set of instructions. Capture of image sensor data is initiated using the first set of instructions at the DSP. The DSP then receives a second set of instructions and the DSP is programmed using the second set of instructions after at least a first frame of the image sensor data is stored in a memory of the device. The first frame of the image sensor data is processed using the DSP as programmed by the second set of instructions. In some embodiments, the first set of instructions includes only instructions for setting camera sensor values, and the second set of instructions includes instructions for processing raw sensor data into formatted image files.

    CHARGING CABLE PORT DETECTION AND CURRENT ENFORCEMENT

    公开(公告)号:US20230268748A1

    公开(公告)日:2023-08-24

    申请号:US18142326

    申请日:2023-05-02

    Applicant: Snap Inc.

    CPC classification number: H02J7/00304 H02J7/0042 H02J7/007 H01R2103/00

    Abstract: A charging cable configured to obtain power from different power supply devices for delivery to a chargeable electronic device, and to techniques and equipment to enable the charging cable to identify current limitation of the connected power supply device and to enforce that current limit via the charging cable. The charging cable has a logic circuit coupled to signal pins to detect a signal indicating a power limitation of the power supply device. The logic circuit controls a current limiter connected in the power delivery bus of the charging cable to limit current flowing through the charging cable.

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